board.h 1.3 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-11-5 SummerGift change to new framework
  9. */
  10. #ifndef __BOARD_H__
  11. #define __BOARD_H__
  12. #include <rtthread.h>
  13. #include <stm32f1xx.h>
  14. #include "drv_common.h"
  15. #ifdef BSP_USING_GPIO
  16. #include "drv_gpio.h"
  17. /* Board Pin definitions */
  18. #define LED0_PIN GET_PIN(C, 0)
  19. #define LED1_PIN GET_PIN(C, 1)
  20. #endif
  21. #define STM32_FLASH_START_ADRESS ((uint32_t)0x08000000)
  22. #define STM32_FLASH_SIZE (128 * 1024)
  23. #define STM32_FLASH_END_ADDRESS ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
  24. /* Internal SRAM memory size[Kbytes] <8-64>, Default: 64*/
  25. #define STM32_SRAM_SIZE 20
  26. #define STM32_SRAM_END (0x20000000 + STM32_SRAM_SIZE * 1024)
  27. #ifdef __CC_ARM
  28. extern int Image$$RW_IRAM1$$ZI$$Limit;
  29. #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
  30. #elif __ICCARM__
  31. #pragma section="CSTACK"
  32. #define HEAP_BEGIN (__segment_end("CSTACK"))
  33. #else
  34. extern int __bss_end;
  35. #define HEAP_BEGIN ((void *)&__bss_end)
  36. #endif
  37. #define HEAP_END STM32_SRAM_END
  38. void SystemClock_Config(void);
  39. void MX_GPIO_Init(void);
  40. #endif /* __BOARD_H__ */