drv_uart.c 8.8 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2013-05-18 Bernard The first version for LPC40xx
  9. */
  10. #include <rthw.h>
  11. #include <rtthread.h>
  12. #include <rtdevice.h>
  13. #include "board.h"
  14. #include "drv_uart.h"
  15. struct lpc_uart
  16. {
  17. LPC_USARTn_Type *USART;
  18. IRQn_Type USART_IRQn;
  19. };
  20. static rt_err_t lpc_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  21. {
  22. // struct lpc_uart *uart;
  23. RT_ASSERT(serial != RT_NULL);
  24. // uart = (struct lpc_uart *)serial->parent.user_data;
  25. // Initialize FIFO for UART0 peripheral
  26. // UART_FIFOConfig(uart->USART, &UARTFIFOConfigStruct);
  27. // UART_TxCmd(uart->USART, ENABLE);
  28. return RT_EOK;
  29. }
  30. static rt_err_t lpc_control(struct rt_serial_device *serial, int cmd, void *arg)
  31. {
  32. struct lpc_uart *uart;
  33. RT_ASSERT(serial != RT_NULL);
  34. uart = (struct lpc_uart *)serial->parent.user_data;
  35. switch (cmd)
  36. {
  37. case RT_DEVICE_CTRL_CLR_INT:
  38. /* disable rx irq */
  39. uart->USART->IER &= ~UART_IER_RBRINT_EN;
  40. break;
  41. case RT_DEVICE_CTRL_SET_INT:
  42. /* enable rx irq */
  43. uart->USART->IER |= UART_IER_RBRINT_EN;
  44. break;
  45. }
  46. return RT_EOK;
  47. }
  48. static int lpc_putc(struct rt_serial_device *serial, char c)
  49. {
  50. struct lpc_uart *uart;
  51. uart = (struct lpc_uart *)serial->parent.user_data;
  52. while (!(uart->USART->LSR & 0x20));
  53. uart->USART->THR = c;
  54. return 1;
  55. }
  56. static int lpc_getc(struct rt_serial_device *serial)
  57. {
  58. struct lpc_uart *uart;
  59. uart = (struct lpc_uart *)serial->parent.user_data;
  60. if (uart->USART->LSR & 0x01)
  61. {
  62. return (uart->USART->RBR);
  63. }
  64. return -1;
  65. }
  66. static const struct rt_uart_ops lpc_uart_ops =
  67. {
  68. lpc_configure,
  69. lpc_control,
  70. lpc_putc,
  71. lpc_getc,
  72. };
  73. #if defined(RT_USING_UART0)
  74. /* UART0 device driver structure */
  75. struct lpc_uart uart0 =
  76. {
  77. LPC_USART0,
  78. USART0_IRQn,
  79. };
  80. struct rt_serial_device serial0;
  81. void UART0_IRQHandler(void)
  82. {
  83. struct lpc_uart *uart;
  84. volatile uint32_t intsrc, temp;
  85. uart = &uart0;
  86. /* enter interrupt */
  87. rt_interrupt_enter();
  88. /* Determine the interrupt source */
  89. intsrc = uart->USART->IIR & UART_IIR_INTID_MASK;
  90. switch (intsrc)
  91. {
  92. case UART_IIR_INTID_RLS: /* Receive Line Status interrupt*/
  93. /* read the line status */
  94. intsrc = uart->USART->LSR;
  95. /* Receive an error data */
  96. if (intsrc & UART_LSR_PE)
  97. {
  98. temp = LPC_USART0->RBR;
  99. }
  100. break;
  101. case UART_IIR_INTID_RDA: /* Receive data */
  102. case UART_IIR_INTID_CTI: /* Receive data timeout */
  103. /* read the data to buffer */
  104. while (uart->USART->LSR & UART_LSR_RDR)
  105. {
  106. rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND);
  107. }
  108. break;
  109. default:
  110. break;
  111. }
  112. /* leave interrupt */
  113. rt_interrupt_leave();
  114. }
  115. #endif
  116. #if defined(RT_USING_UART2)
  117. /* UART2 device driver structure */
  118. struct lpc_uart uart2 =
  119. {
  120. LPC_USART2,
  121. USART2_IRQn,
  122. };
  123. struct rt_serial_device serial2;
  124. void UART2_IRQHandler(void)
  125. {
  126. struct lpc_uart *uart;
  127. uint32_t intsrc, temp;
  128. uart = &uart2;
  129. /* enter interrupt */
  130. rt_interrupt_enter();
  131. /* Determine the interrupt source */
  132. intsrc = uart->USART->IIR & UART_IIR_INTID_MASK;
  133. switch (intsrc)
  134. {
  135. case UART_IIR_INTID_RLS: /* Receive Line Status interrupt*/
  136. /* read the line status */
  137. intsrc = uart->USART->LSR;
  138. /* Receive an error data */
  139. if (intsrc & UART_LSR_PE)
  140. {
  141. temp = LPC_USART0->RBR;
  142. }
  143. break;
  144. case UART_IIR_INTID_RDA: /* Receive data */
  145. case UART_IIR_INTID_CTI: /* Receive data timeout */
  146. /* read the data to buffer */
  147. while (uart->USART->LSR & UART_LSR_RDR)
  148. {
  149. rt_hw_serial_isr(&serial0, RT_SERIAL_EVENT_RX_IND);
  150. }
  151. break;
  152. default:
  153. break;
  154. }
  155. /* leave interrupt */
  156. rt_interrupt_leave();
  157. }
  158. #endif
  159. void rt_hw_uart_init(void)
  160. {
  161. struct lpc_uart *uart;
  162. struct serial_configure config;
  163. #ifdef RT_USING_UART0
  164. uart = &uart0;
  165. config.baud_rate = BAUD_RATE_115200;
  166. config.bit_order = BIT_ORDER_LSB;
  167. config.data_bits = DATA_BITS_8;
  168. config.parity = PARITY_NONE;
  169. config.stop_bits = STOP_BITS_1;
  170. config.invert = NRZ_NORMAL;
  171. config.bufsz = RT_SERIAL_RB_BUFSZ;
  172. serial0.ops = &lpc_uart_ops;
  173. serial0.config = config;
  174. /* Enable GPIO register interface clock */
  175. LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
  176. while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
  177. /* Enable USART1 peripheral clock */
  178. LPC_CCU2->CLK_APB0_USART0_CFG |= 0x01;
  179. while (!(LPC_CCU2->CLK_APB0_USART0_STAT & 0x01));
  180. /* Enable USART1 register interface clock */
  181. LPC_CCU1->CLK_M4_USART0_CFG |= 0x01;
  182. while (!(LPC_CCU1->CLK_M4_USART0_STAT & 0x01));
  183. /* Init GPIO pins */
  184. LPC_SCU->SFSP6_4 = (1 << 6) | /* Input buffer enabled */
  185. (1 << 4) | /* Pull-up disabled */
  186. (2 << 0) ; /* Pin P6_4 used as U0_TXD */
  187. LPC_SCU->SFSP6_5 = (1 << 6) | /* Input buffer enabled */
  188. (1 << 4) | /* Pull-up disabled */
  189. (2 << 0) ; /* Pin P6_5 used as U0_RXD */
  190. /* Init USART0 */
  191. LPC_USART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
  192. LPC_USART0->DLL = 0x06; /* 115200 Baudrate @ 12 MHz IRC */
  193. LPC_USART0->DLM = 0x00;
  194. LPC_USART0->FDR = 0xC1;
  195. LPC_USART0->LCR = 0x03; /* DLAB = 0 */
  196. /* preemption = 1, sub-priority = 1 */
  197. NVIC_SetPriority(uart->USART_IRQn, ((0x01 << 3) | 0x01));
  198. /* Enable Interrupt for UART channel */
  199. NVIC_EnableIRQ(uart->USART_IRQn);
  200. /* register UART1 device */
  201. rt_hw_serial_register(&serial0, "uart0",
  202. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  203. uart);
  204. #endif
  205. #ifdef RT_USING_UART2
  206. uart = &uart2;
  207. config.baud_rate = BAUD_RATE_115200;
  208. config.bit_order = BIT_ORDER_LSB;
  209. config.data_bits = DATA_BITS_8;
  210. config.parity = PARITY_NONE;
  211. config.stop_bits = STOP_BITS_1;
  212. config.invert = NRZ_NORMAL;
  213. config.bufsz = RT_SERIAL_RB_BUFSZ;
  214. serial2.ops = &lpc_uart_ops;
  215. serial2.config = config;
  216. /* Enable GPIO register interface clock */
  217. LPC_CCU1->CLK_M4_GPIO_CFG |= 0x01;
  218. while (!(LPC_CCU1->CLK_M4_GPIO_STAT & 0x01));
  219. /* Enable USART1 peripheral clock */
  220. LPC_CCU2->CLK_APB0_USART0_CFG |= 0x01;
  221. while (!(LPC_CCU2->CLK_APB2_USART2_STAT & 0x01));
  222. /* Enable USART2 register interface clock */
  223. LPC_CCU1->CLK_M4_USART0_CFG |= 0x01;
  224. while (!(LPC_CCU1->CLK_M4_USART2_STAT & 0x01));
  225. /* Init GPIO pins */
  226. LPC_SCU->SFSP1_15 = (1 << 6) | /* Input buffer enabled */
  227. (1 << 4) | /* Pull-up disabled */
  228. (1 << 0) ; /* Pin P1_15 used as U2_TXD */
  229. LPC_SCU->SFSP1_16 = (1 << 6) | /* Input buffer enabled */
  230. (1 << 4) | /* Pull-up disabled */
  231. (1 << 0) ; /* Pin P1_16 used as U2_RXD */
  232. /* Init USART2 */
  233. LPC_USART2->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
  234. LPC_USART2->DLL = 0x06; /* 115200 Baudrate @ 12 MHz IRC */
  235. LPC_USART2->DLM = 0x00;
  236. LPC_USART2->FDR = 0xC1;
  237. LPC_USART2->LCR = 0x03; /* DLAB = 0 */
  238. /* preemption = 1, sub-priority = 1 */
  239. NVIC_SetPriority(uart->USART_IRQn, ((0x01 << 3) | 0x01));
  240. /* Enable Interrupt for UART channel */
  241. NVIC_EnableIRQ(uart->USART_IRQn);
  242. /* register UART1 device */
  243. rt_hw_serial_register(&serial2, "uart2",
  244. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  245. uart);
  246. #endif
  247. }