drv_adc.c 9.1 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-12-05 zylx first version
  9. * 2018-12-12 greedyhao Porting for stm32f7xx
  10. * 2019-02-01 yuneizhilin fix the stm32_adc_init function initialization issue
  11. * 2020-06-17 thread-liu Porting for stm32mp1xx
  12. * 2020-10-14 Dozingfiretruck Porting for stm32wbxx
  13. */
  14. #include <board.h>
  15. #if defined(BSP_USING_ADC1) || defined(BSP_USING_ADC2) || defined(BSP_USING_ADC3)
  16. #include "drv_config.h"
  17. //#define DRV_DEBUG
  18. #define LOG_TAG "drv.adc"
  19. #include <drv_log.h>
  20. static ADC_HandleTypeDef adc_config[] =
  21. {
  22. #ifdef BSP_USING_ADC1
  23. ADC1_CONFIG,
  24. #endif
  25. #ifdef BSP_USING_ADC2
  26. ADC2_CONFIG,
  27. #endif
  28. #ifdef BSP_USING_ADC3
  29. ADC3_CONFIG,
  30. #endif
  31. };
  32. struct stm32_adc
  33. {
  34. ADC_HandleTypeDef ADC_Handler;
  35. struct rt_adc_device stm32_adc_device;
  36. };
  37. static struct stm32_adc stm32_adc_obj[sizeof(adc_config) / sizeof(adc_config[0])];
  38. static rt_err_t stm32_adc_enabled(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
  39. {
  40. ADC_HandleTypeDef *stm32_adc_handler;
  41. RT_ASSERT(device != RT_NULL);
  42. stm32_adc_handler = device->parent.user_data;
  43. if (enabled)
  44. {
  45. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined (SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7) || defined (SOC_SERIES_STM32WB)
  46. ADC_Enable(stm32_adc_handler);
  47. #else
  48. __HAL_ADC_ENABLE(stm32_adc_handler);
  49. #endif
  50. }
  51. else
  52. {
  53. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined (SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7) || defined (SOC_SERIES_STM32WB)
  54. ADC_Disable(stm32_adc_handler);
  55. #else
  56. __HAL_ADC_DISABLE(stm32_adc_handler);
  57. #endif
  58. }
  59. return RT_EOK;
  60. }
  61. static rt_uint8_t stm32_adc_get_resolution(struct rt_adc_device *device)
  62. {
  63. ADC_HandleTypeDef *stm32_adc_handler;
  64. RT_ASSERT(device != RT_NULL);
  65. stm32_adc_handler = device->parent.user_data;
  66. switch(stm32_adc_handler->Init.Resolution)
  67. {
  68. case ADC_RESOLUTION_12B:
  69. return 12;
  70. case ADC_RESOLUTION_10B:
  71. return 10;
  72. case ADC_RESOLUTION_8B:
  73. return 8;
  74. case ADC_RESOLUTION_6B:
  75. return 6;
  76. default:
  77. return 0;
  78. }
  79. }
  80. static rt_uint32_t stm32_adc_get_channel(rt_uint32_t channel)
  81. {
  82. rt_uint32_t stm32_channel = 0;
  83. switch (channel)
  84. {
  85. case 0:
  86. stm32_channel = ADC_CHANNEL_0;
  87. break;
  88. case 1:
  89. stm32_channel = ADC_CHANNEL_1;
  90. break;
  91. case 2:
  92. stm32_channel = ADC_CHANNEL_2;
  93. break;
  94. case 3:
  95. stm32_channel = ADC_CHANNEL_3;
  96. break;
  97. case 4:
  98. stm32_channel = ADC_CHANNEL_4;
  99. break;
  100. case 5:
  101. stm32_channel = ADC_CHANNEL_5;
  102. break;
  103. case 6:
  104. stm32_channel = ADC_CHANNEL_6;
  105. break;
  106. case 7:
  107. stm32_channel = ADC_CHANNEL_7;
  108. break;
  109. case 8:
  110. stm32_channel = ADC_CHANNEL_8;
  111. break;
  112. case 9:
  113. stm32_channel = ADC_CHANNEL_9;
  114. break;
  115. case 10:
  116. stm32_channel = ADC_CHANNEL_10;
  117. break;
  118. case 11:
  119. stm32_channel = ADC_CHANNEL_11;
  120. break;
  121. case 12:
  122. stm32_channel = ADC_CHANNEL_12;
  123. break;
  124. case 13:
  125. stm32_channel = ADC_CHANNEL_13;
  126. break;
  127. case 14:
  128. stm32_channel = ADC_CHANNEL_14;
  129. break;
  130. case 15:
  131. stm32_channel = ADC_CHANNEL_15;
  132. break;
  133. #ifdef ADC_CHANNEL_16
  134. case 16:
  135. stm32_channel = ADC_CHANNEL_16;
  136. break;
  137. #endif
  138. case 17:
  139. stm32_channel = ADC_CHANNEL_17;
  140. break;
  141. #ifdef ADC_CHANNEL_18
  142. case 18:
  143. stm32_channel = ADC_CHANNEL_18;
  144. break;
  145. #endif
  146. #ifdef ADC_CHANNEL_19
  147. case 19:
  148. stm32_channel = ADC_CHANNEL_19;
  149. break;
  150. #endif
  151. }
  152. return stm32_channel;
  153. }
  154. static rt_err_t stm32_adc_get_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
  155. {
  156. ADC_ChannelConfTypeDef ADC_ChanConf;
  157. ADC_HandleTypeDef *stm32_adc_handler;
  158. RT_ASSERT(device != RT_NULL);
  159. RT_ASSERT(value != RT_NULL);
  160. stm32_adc_handler = device->parent.user_data;
  161. rt_memset(&ADC_ChanConf, 0, sizeof(ADC_ChanConf));
  162. #ifndef ADC_CHANNEL_16
  163. if (channel == 16)
  164. {
  165. LOG_E("ADC channel must not be 16.");
  166. return -RT_ERROR;
  167. }
  168. #endif
  169. /* ADC channel number is up to 17 */
  170. #if !defined(ADC_CHANNEL_18)
  171. if (channel <= 17)
  172. /* ADC channel number is up to 19 */
  173. #elif defined(ADC_CHANNEL_19)
  174. if (channel <= 19)
  175. /* ADC channel number is up to 18 */
  176. #else
  177. if (channel <= 18)
  178. #endif
  179. {
  180. /* set stm32 ADC channel */
  181. ADC_ChanConf.Channel = stm32_adc_get_channel(channel);
  182. }
  183. else
  184. {
  185. #if !defined(ADC_CHANNEL_18)
  186. LOG_E("ADC channel must be between 0 and 17.");
  187. #elif defined(ADC_CHANNEL_19)
  188. LOG_E("ADC channel must be between 0 and 19.");
  189. #else
  190. LOG_E("ADC channel must be between 0 and 18.");
  191. #endif
  192. return -RT_ERROR;
  193. }
  194. #if defined(SOC_SERIES_STM32MP1) || defined (SOC_SERIES_STM32H7) || defined (SOC_SERIES_STM32WB)
  195. ADC_ChanConf.Rank = ADC_REGULAR_RANK_1;
  196. #else
  197. ADC_ChanConf.Rank = 1;
  198. #endif
  199. #if defined(SOC_SERIES_STM32F0)
  200. ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_71CYCLES_5;
  201. #elif defined(SOC_SERIES_STM32F1)
  202. ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_55CYCLES_5;
  203. #elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  204. ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_112CYCLES;
  205. #elif defined(SOC_SERIES_STM32L4)
  206. ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_247CYCLES_5;
  207. #elif defined(SOC_SERIES_STM32MP1)
  208. ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_810CYCLES_5;
  209. #elif defined(SOC_SERIES_STM32H7)
  210. ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_64CYCLES_5;
  211. #elif defined (SOC_SERIES_STM32WB)
  212. ADC_ChanConf.SamplingTime = ADC_SAMPLETIME_2CYCLES_5;
  213. #endif
  214. #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) || defined (SOC_SERIES_STM32WB)
  215. ADC_ChanConf.Offset = 0;
  216. #endif
  217. #if defined(SOC_SERIES_STM32L4)
  218. ADC_ChanConf.OffsetNumber = ADC_OFFSET_NONE;
  219. ADC_ChanConf.SingleDiff = LL_ADC_SINGLE_ENDED;
  220. #elif defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7) || defined (SOC_SERIES_STM32WB)
  221. ADC_ChanConf.OffsetNumber = ADC_OFFSET_NONE; /* ADC channel affected to offset number */
  222. ADC_ChanConf.Offset = 0;
  223. ADC_ChanConf.SingleDiff = ADC_SINGLE_ENDED; /* ADC channel differential mode */
  224. #endif
  225. HAL_ADC_ConfigChannel(stm32_adc_handler, &ADC_ChanConf);
  226. /* perform an automatic ADC calibration to improve the conversion accuracy */
  227. #if defined(SOC_SERIES_STM32L4) || defined (SOC_SERIES_STM32WB)
  228. if (HAL_ADCEx_Calibration_Start(stm32_adc_handler, ADC_ChanConf.SingleDiff) != HAL_OK)
  229. {
  230. LOG_E("ADC calibration error!\n");
  231. return -RT_ERROR;
  232. }
  233. #elif defined(SOC_SERIES_STM32MP1) || defined(SOC_SERIES_STM32H7)
  234. /* Run the ADC linear calibration in single-ended mode */
  235. if (HAL_ADCEx_Calibration_Start(stm32_adc_handler, ADC_CALIB_OFFSET_LINEARITY, ADC_ChanConf.SingleDiff) != HAL_OK)
  236. {
  237. LOG_E("ADC open linear calibration error!\n");
  238. /* Calibration Error */
  239. return -RT_ERROR;
  240. }
  241. #endif
  242. /* start ADC */
  243. HAL_ADC_Start(stm32_adc_handler);
  244. /* Wait for the ADC to convert */
  245. HAL_ADC_PollForConversion(stm32_adc_handler, 100);
  246. /* get ADC value */
  247. *value = (rt_uint32_t)HAL_ADC_GetValue(stm32_adc_handler);
  248. return RT_EOK;
  249. }
  250. static const struct rt_adc_ops stm_adc_ops =
  251. {
  252. .enabled = stm32_adc_enabled,
  253. .convert = stm32_adc_get_value,
  254. .get_resolution = stm32_adc_get_resolution,
  255. };
  256. static int stm32_adc_init(void)
  257. {
  258. int result = RT_EOK;
  259. /* save adc name */
  260. char name_buf[5] = {'a', 'd', 'c', '0', 0};
  261. int i = 0;
  262. for (i = 0; i < sizeof(adc_config) / sizeof(adc_config[0]); i++)
  263. {
  264. /* ADC init */
  265. name_buf[3] = '0';
  266. stm32_adc_obj[i].ADC_Handler = adc_config[i];
  267. #if defined(ADC1)
  268. if (stm32_adc_obj[i].ADC_Handler.Instance == ADC1)
  269. {
  270. name_buf[3] = '1';
  271. }
  272. #endif
  273. #if defined(ADC2)
  274. if (stm32_adc_obj[i].ADC_Handler.Instance == ADC2)
  275. {
  276. name_buf[3] = '2';
  277. }
  278. #endif
  279. #if defined(ADC3)
  280. if (stm32_adc_obj[i].ADC_Handler.Instance == ADC3)
  281. {
  282. name_buf[3] = '3';
  283. }
  284. #endif
  285. if (HAL_ADC_Init(&stm32_adc_obj[i].ADC_Handler) != HAL_OK)
  286. {
  287. LOG_E("%s init failed", name_buf);
  288. result = -RT_ERROR;
  289. }
  290. else
  291. {
  292. /* register ADC device */
  293. if (rt_hw_adc_register(&stm32_adc_obj[i].stm32_adc_device, name_buf, &stm_adc_ops, &stm32_adc_obj[i].ADC_Handler) == RT_EOK)
  294. {
  295. LOG_D("%s init success", name_buf);
  296. }
  297. else
  298. {
  299. LOG_E("%s register failed", name_buf);
  300. result = -RT_ERROR;
  301. }
  302. }
  303. }
  304. return result;
  305. }
  306. INIT_BOARD_EXPORT(stm32_adc_init);
  307. #endif /* BSP_USING_ADC */