display_controller.h 1.8 KB

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  1. /*
  2. * File : display_controller.h
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006-2011, RT-Thread Develop Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2011-08-08 lgnq first version for LS1B
  13. */
  14. #ifndef __DISPLAY_CONTROLLER_H__
  15. #define __DISPLAY_CONTROLLER_H__
  16. #include <rtthread.h>
  17. #include "ls1b.h"
  18. #define DC_BASE 0xBC301240 //Display Controller
  19. /* Frame Buffer registers */
  20. #define DC_FB_CONFIG __REG32(DC_BASE + 0x000)
  21. #define DC_FB_BUFFER_ADDR0 __REG32(DC_BASE + 0x020)
  22. #define DC_FB_BUFFER_STRIDE __REG32(DC_BASE + 0x040)
  23. #define DC_FB_BUFFER_ORIGIN __REG32(DC_BASE + 0x060)
  24. #define DC_DITHER_CONFIG __REG32(DC_BASE + 0x120)
  25. #define DC_DITHER_TABLE_LOW __REG32(DC_BASE + 0x140)
  26. #define DC_DITHER_TABLE_HIGH __REG32(DC_BASE + 0x160)
  27. #define DC_PANEL_CONFIG __REG32(DC_BASE + 0x180)
  28. #define DC_PANEL_TIMING __REG32(DC_BASE + 0x1A0)
  29. #define DC_HDISPLAY __REG32(DC_BASE + 0x1C0)
  30. #define DC_HSYNC __REG32(DC_BASE + 0x1E0)
  31. #define DC_VDISPLAY __REG32(DC_BASE + 0x240)
  32. #define DC_VSYNC __REG32(DC_BASE + 0x260)
  33. #define DC_FB_BUFFER_ADDR1 __REG32(DC_BASE + 0x340)
  34. /* Display Controller driver for 1024x768 16bit */
  35. #define FB_XSIZE 1024
  36. #define FB_YSIZE 768
  37. #define CONFIG_VIDEO_16BPP
  38. #define APB_CLK 33333333
  39. #define K1BASE 0xA0000000
  40. #define KSEG1(addr) ((void *)(K1BASE | (rt_uint32_t)(addr)))
  41. #define HW_FB_ADDR KSEG1(_rt_framebuffer)
  42. #define HW_FB_PIXEL(x, y) *(volatile rt_uint16_t*)((rt_uint8_t*)HW_FB_ADDR + (y * FB_XSIZE * 2) + x * 2)
  43. struct vga_struct
  44. {
  45. long pclk;
  46. int hr,hss,hse,hfl;
  47. int vr,vss,vse,vfl;
  48. };
  49. #endif