gh_crypto.h 31 KB

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  1. /*!
  2. *******************************************************************************
  3. **
  4. ** \file gh_crypto.h
  5. **
  6. ** \brief Cryptography Engine.
  7. **
  8. ** Copyright: 2012 - 2013 (C) GoKe Microelectronics ShangHai Branch
  9. **
  10. ** \attention THIS SAMPLE CODE IS PROVIDED AS IS. GOKE MICROELECTRONICS
  11. ** ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR
  12. ** OMMISSIONS.
  13. **
  14. ** \note Do not modify this file as it is generated automatically.
  15. **
  16. ******************************************************************************/
  17. #ifndef _GH_CRYPTO_H
  18. #define _GH_CRYPTO_H
  19. #ifdef __LINUX__
  20. #include "reg4linux.h"
  21. #else
  22. #define FIO_ADDRESS(block,address) (address)
  23. #define FIO_MOFFSET(block,moffset) (moffset)
  24. #endif
  25. #ifndef __LINUX__
  26. #include "gtypes.h" /* global type definitions */
  27. #include "gh_lib_cfg.h" /* configuration */
  28. #endif
  29. #define GH_CRYPTO_ENABLE_DEBUG_PRINT 0
  30. #ifdef __LINUX__
  31. #define GH_CRYPTO_DEBUG_PRINT_FUNCTION printk
  32. #else
  33. #define GH_CRYPTO_DEBUG_PRINT_FUNCTION printf
  34. #endif
  35. #ifndef __LINUX__
  36. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  37. #include <stdio.h>
  38. #endif
  39. #endif
  40. /* check configuration */
  41. #ifndef GH_INLINE_LEVEL
  42. #error "GH_INLINE_LEVEL is not defined!"
  43. #endif
  44. #if GH_INLINE_LEVEL > 2
  45. #error "GH_INLINE_LEVEL must be set 0, 1 or 2!"
  46. #endif
  47. #ifndef GH_INLINE
  48. #error "GH_INLINE is not defined!"
  49. #endif
  50. /* disable inlining for debugging */
  51. #ifdef DEBUG
  52. #undef GH_INLINE_LEVEL
  53. #define GH_INLINE_LEVEL 0
  54. #endif
  55. /*----------------------------------------------------------------------------*/
  56. /* registers */
  57. /*----------------------------------------------------------------------------*/
  58. #define REG_CRYPTO_DES_KEY FIO_ADDRESS(CRYPTO,0x9000500C) /* read/write */
  59. #define REG_CRYPTO_DES_INPUT FIO_ADDRESS(CRYPTO,0x90005014) /* read/write */
  60. #define REG_CRYPTO_DES_OPCODE FIO_ADDRESS(CRYPTO,0x90005004) /* read/write */
  61. #define REG_CRYPTO_DES_OUTPUT_RDY FIO_ADDRESS(CRYPTO,0x90005018) /* read */
  62. #define REG_CRYPTO_DES_OUTPUT FIO_ADDRESS(CRYPTO,0x90005020) /* read */
  63. #define REG_CRYPTO_DES_INTERRUPT FIO_ADDRESS(CRYPTO,0x90005000) /* read/write */
  64. #define REG_CRYPTO_AES_128_KEY FIO_ADDRESS(CRYPTO,0x90005074) /* read/write */
  65. #define REG_CRYPTO_AES_192_KEY FIO_ADDRESS(CRYPTO,0x90005064) /* read/write */
  66. #define REG_CRYPTO_AES_256_KEY FIO_ADDRESS(CRYPTO,0x9000504C) /* read/write */
  67. #define REG_CRYPTO_AES_INPUT FIO_ADDRESS(CRYPTO,0x90005084) /* read/write */
  68. #define REG_CRYPTO_AES_OPCODE FIO_ADDRESS(CRYPTO,0x9000502C) /* read/write */
  69. #define REG_CRYPTO_AES_OUTPUT_RDY FIO_ADDRESS(CRYPTO,0x90005088) /* read */
  70. #define REG_CRYPTO_AES_OUTPUT FIO_ADDRESS(CRYPTO,0x90005098) /* read */
  71. #define REG_CRYPTO_AES_INTERRUPT FIO_ADDRESS(CRYPTO,0x90005028) /* read/write */
  72. #define REG_CRYPTO_EFUSE_BOOT_SW_DIS FIO_ADDRESS(CRYPTO,0x90005024) /* read/write */
  73. /*----------------------------------------------------------------------------*/
  74. /* bit group structures */
  75. /*----------------------------------------------------------------------------*/
  76. typedef union { /* CRYPTO_DES_Opcode */
  77. U32 all;
  78. struct {
  79. U32 mode : 1;
  80. U32 : 31;
  81. } bitc;
  82. } GH_CRYPTO_DES_OPCODE_S;
  83. typedef union { /* CRYPTO_DES_Output_Rdy */
  84. U32 all;
  85. struct {
  86. U32 rdy : 1;
  87. U32 : 31;
  88. } bitc;
  89. } GH_CRYPTO_DES_OUTPUT_RDY_S;
  90. typedef union { /* CRYPTO_DES_Interrupt */
  91. U32 all;
  92. struct {
  93. U32 en : 1;
  94. U32 : 31;
  95. } bitc;
  96. } GH_CRYPTO_DES_INTERRUPT_S;
  97. typedef union { /* CRYPTO_AES_Opcode */
  98. U32 all;
  99. struct {
  100. U32 mode : 1;
  101. U32 : 31;
  102. } bitc;
  103. } GH_CRYPTO_AES_OPCODE_S;
  104. typedef union { /* CRYPTO_AES_Output_Rdy */
  105. U32 all;
  106. struct {
  107. U32 rdy : 1;
  108. U32 : 31;
  109. } bitc;
  110. } GH_CRYPTO_AES_OUTPUT_RDY_S;
  111. typedef union { /* CRYPTO_AES_Interrupt */
  112. U32 all;
  113. struct {
  114. U32 en : 1;
  115. U32 : 31;
  116. } bitc;
  117. } GH_CRYPTO_AES_INTERRUPT_S;
  118. typedef union { /* CRYPTO_EFUSE_BOOT_SW_DIS */
  119. U32 all;
  120. struct {
  121. U32 efuse_boot_dis : 1;
  122. U32 efuse_boot_sw : 1;
  123. U32 : 30;
  124. } bitc;
  125. } GH_CRYPTO_EFUSE_BOOT_SW_DIS_S;
  126. /*----------------------------------------------------------------------------*/
  127. /* mirror variables */
  128. /*----------------------------------------------------------------------------*/
  129. #ifdef __cplusplus
  130. extern "C" {
  131. #endif
  132. /*----------------------------------------------------------------------------*/
  133. /* register CRYPTO_DES_Key (read/write) */
  134. /*----------------------------------------------------------------------------*/
  135. #if GH_INLINE_LEVEL == 0
  136. /*! \brief Writes the register 'CRYPTO_DES_Key'. */
  137. void GH_CRYPTO_set_DES_Key(U8 index, U32 data);
  138. /*! \brief Reads the register 'CRYPTO_DES_Key'. */
  139. U32 GH_CRYPTO_get_DES_Key(U8 index);
  140. #else /* GH_INLINE_LEVEL == 0 */
  141. GH_INLINE void GH_CRYPTO_set_DES_Key(U8 index, U32 data)
  142. {
  143. *(volatile U32 *)(REG_CRYPTO_DES_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)) = data;
  144. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  145. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_DES_Key] <-- 0x%08x\n",
  146. (REG_CRYPTO_DES_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)),data,data);
  147. #endif
  148. }
  149. GH_INLINE U32 GH_CRYPTO_get_DES_Key(U8 index)
  150. {
  151. U32 value = (*(volatile U32 *)(REG_CRYPTO_DES_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)));
  152. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  153. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_DES_Key] --> 0x%08x\n",
  154. (REG_CRYPTO_DES_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)),value);
  155. #endif
  156. return value;
  157. }
  158. #endif /* GH_INLINE_LEVEL == 0 */
  159. /*----------------------------------------------------------------------------*/
  160. /* register CRYPTO_DES_Input (read/write) */
  161. /*----------------------------------------------------------------------------*/
  162. #if GH_INLINE_LEVEL == 0
  163. /*! \brief Writes the register 'CRYPTO_DES_Input'. */
  164. void GH_CRYPTO_set_DES_Input(U8 index, U32 data);
  165. /*! \brief Reads the register 'CRYPTO_DES_Input'. */
  166. U32 GH_CRYPTO_get_DES_Input(U8 index);
  167. #else /* GH_INLINE_LEVEL == 0 */
  168. GH_INLINE void GH_CRYPTO_set_DES_Input(U8 index, U32 data)
  169. {
  170. *(volatile U32 *)(REG_CRYPTO_DES_INPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)) = data;
  171. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  172. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_DES_Input] <-- 0x%08x\n",
  173. (REG_CRYPTO_DES_INPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)),data,data);
  174. #endif
  175. }
  176. GH_INLINE U32 GH_CRYPTO_get_DES_Input(U8 index)
  177. {
  178. U32 value = (*(volatile U32 *)(REG_CRYPTO_DES_INPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)));
  179. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  180. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_DES_Input] --> 0x%08x\n",
  181. (REG_CRYPTO_DES_INPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)),value);
  182. #endif
  183. return value;
  184. }
  185. #endif /* GH_INLINE_LEVEL == 0 */
  186. /*----------------------------------------------------------------------------*/
  187. /* register CRYPTO_DES_Opcode (read/write) */
  188. /*----------------------------------------------------------------------------*/
  189. #if GH_INLINE_LEVEL == 0
  190. /*! \brief Writes the register 'CRYPTO_DES_Opcode'. */
  191. void GH_CRYPTO_set_DES_Opcode(U32 data);
  192. /*! \brief Reads the register 'CRYPTO_DES_Opcode'. */
  193. U32 GH_CRYPTO_get_DES_Opcode(void);
  194. /*! \brief Writes the bit group 'mode' of register 'CRYPTO_DES_Opcode'. */
  195. void GH_CRYPTO_set_DES_Opcode_mode(U8 data);
  196. /*! \brief Reads the bit group 'mode' of register 'CRYPTO_DES_Opcode'. */
  197. U8 GH_CRYPTO_get_DES_Opcode_mode(void);
  198. #else /* GH_INLINE_LEVEL == 0 */
  199. GH_INLINE void GH_CRYPTO_set_DES_Opcode(U32 data)
  200. {
  201. *(volatile U32 *)REG_CRYPTO_DES_OPCODE = data;
  202. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  203. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_DES_Opcode] <-- 0x%08x\n",
  204. REG_CRYPTO_DES_OPCODE,data,data);
  205. #endif
  206. }
  207. GH_INLINE U32 GH_CRYPTO_get_DES_Opcode(void)
  208. {
  209. U32 value = (*(volatile U32 *)REG_CRYPTO_DES_OPCODE);
  210. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  211. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_DES_Opcode] --> 0x%08x\n",
  212. REG_CRYPTO_DES_OPCODE,value);
  213. #endif
  214. return value;
  215. }
  216. GH_INLINE void GH_CRYPTO_set_DES_Opcode_mode(U8 data)
  217. {
  218. GH_CRYPTO_DES_OPCODE_S d;
  219. d.all = *(volatile U32 *)REG_CRYPTO_DES_OPCODE;
  220. d.bitc.mode = data;
  221. *(volatile U32 *)REG_CRYPTO_DES_OPCODE = d.all;
  222. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  223. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_DES_Opcode_mode] <-- 0x%08x\n",
  224. REG_CRYPTO_DES_OPCODE,d.all,d.all);
  225. #endif
  226. }
  227. GH_INLINE U8 GH_CRYPTO_get_DES_Opcode_mode(void)
  228. {
  229. GH_CRYPTO_DES_OPCODE_S tmp_value;
  230. U32 value = (*(volatile U32 *)REG_CRYPTO_DES_OPCODE);
  231. tmp_value.all = value;
  232. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  233. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_DES_Opcode_mode] --> 0x%08x\n",
  234. REG_CRYPTO_DES_OPCODE,value);
  235. #endif
  236. return tmp_value.bitc.mode;
  237. }
  238. #endif /* GH_INLINE_LEVEL == 0 */
  239. /*----------------------------------------------------------------------------*/
  240. /* register CRYPTO_DES_Output_Rdy (read) */
  241. /*----------------------------------------------------------------------------*/
  242. #if GH_INLINE_LEVEL == 0
  243. /*! \brief Reads the register 'CRYPTO_DES_Output_Rdy'. */
  244. U32 GH_CRYPTO_get_DES_Output_Rdy(void);
  245. /*! \brief Reads the bit group 'Rdy' of register 'CRYPTO_DES_Output_Rdy'. */
  246. U8 GH_CRYPTO_get_DES_Output_Rdy_Rdy(void);
  247. #else /* GH_INLINE_LEVEL == 0 */
  248. GH_INLINE U32 GH_CRYPTO_get_DES_Output_Rdy(void)
  249. {
  250. U32 value = (*(volatile U32 *)REG_CRYPTO_DES_OUTPUT_RDY);
  251. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  252. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_DES_Output_Rdy] --> 0x%08x\n",
  253. REG_CRYPTO_DES_OUTPUT_RDY,value);
  254. #endif
  255. return value;
  256. }
  257. GH_INLINE U8 GH_CRYPTO_get_DES_Output_Rdy_Rdy(void)
  258. {
  259. GH_CRYPTO_DES_OUTPUT_RDY_S tmp_value;
  260. U32 value = (*(volatile U32 *)REG_CRYPTO_DES_OUTPUT_RDY);
  261. tmp_value.all = value;
  262. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  263. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_DES_Output_Rdy_Rdy] --> 0x%08x\n",
  264. REG_CRYPTO_DES_OUTPUT_RDY,value);
  265. #endif
  266. return tmp_value.bitc.rdy;
  267. }
  268. #endif /* GH_INLINE_LEVEL == 0 */
  269. /*----------------------------------------------------------------------------*/
  270. /* register CRYPTO_DES_Output (read) */
  271. /*----------------------------------------------------------------------------*/
  272. #if GH_INLINE_LEVEL == 0
  273. /*! \brief Reads the register 'CRYPTO_DES_Output'. */
  274. U32 GH_CRYPTO_get_DES_Output(U8 index);
  275. #else /* GH_INLINE_LEVEL == 0 */
  276. GH_INLINE U32 GH_CRYPTO_get_DES_Output(U8 index)
  277. {
  278. U32 value = (*(volatile U32 *)(REG_CRYPTO_DES_OUTPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)));
  279. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  280. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_DES_Output] --> 0x%08x\n",
  281. (REG_CRYPTO_DES_OUTPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)),value);
  282. #endif
  283. return value;
  284. }
  285. #endif /* GH_INLINE_LEVEL == 0 */
  286. /*----------------------------------------------------------------------------*/
  287. /* register CRYPTO_DES_Interrupt (read/write) */
  288. /*----------------------------------------------------------------------------*/
  289. #if GH_INLINE_LEVEL == 0
  290. /*! \brief Writes the register 'CRYPTO_DES_Interrupt'. */
  291. void GH_CRYPTO_set_DES_Interrupt(U32 data);
  292. /*! \brief Reads the register 'CRYPTO_DES_Interrupt'. */
  293. U32 GH_CRYPTO_get_DES_Interrupt(void);
  294. /*! \brief Writes the bit group 'En' of register 'CRYPTO_DES_Interrupt'. */
  295. void GH_CRYPTO_set_DES_Interrupt_En(U8 data);
  296. /*! \brief Reads the bit group 'En' of register 'CRYPTO_DES_Interrupt'. */
  297. U8 GH_CRYPTO_get_DES_Interrupt_En(void);
  298. #else /* GH_INLINE_LEVEL == 0 */
  299. GH_INLINE void GH_CRYPTO_set_DES_Interrupt(U32 data)
  300. {
  301. *(volatile U32 *)REG_CRYPTO_DES_INTERRUPT = data;
  302. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  303. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_DES_Interrupt] <-- 0x%08x\n",
  304. REG_CRYPTO_DES_INTERRUPT,data,data);
  305. #endif
  306. }
  307. GH_INLINE U32 GH_CRYPTO_get_DES_Interrupt(void)
  308. {
  309. U32 value = (*(volatile U32 *)REG_CRYPTO_DES_INTERRUPT);
  310. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  311. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_DES_Interrupt] --> 0x%08x\n",
  312. REG_CRYPTO_DES_INTERRUPT,value);
  313. #endif
  314. return value;
  315. }
  316. GH_INLINE void GH_CRYPTO_set_DES_Interrupt_En(U8 data)
  317. {
  318. GH_CRYPTO_DES_INTERRUPT_S d;
  319. d.all = *(volatile U32 *)REG_CRYPTO_DES_INTERRUPT;
  320. d.bitc.en = data;
  321. *(volatile U32 *)REG_CRYPTO_DES_INTERRUPT = d.all;
  322. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  323. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_DES_Interrupt_En] <-- 0x%08x\n",
  324. REG_CRYPTO_DES_INTERRUPT,d.all,d.all);
  325. #endif
  326. }
  327. GH_INLINE U8 GH_CRYPTO_get_DES_Interrupt_En(void)
  328. {
  329. GH_CRYPTO_DES_INTERRUPT_S tmp_value;
  330. U32 value = (*(volatile U32 *)REG_CRYPTO_DES_INTERRUPT);
  331. tmp_value.all = value;
  332. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  333. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_DES_Interrupt_En] --> 0x%08x\n",
  334. REG_CRYPTO_DES_INTERRUPT,value);
  335. #endif
  336. return tmp_value.bitc.en;
  337. }
  338. #endif /* GH_INLINE_LEVEL == 0 */
  339. /*----------------------------------------------------------------------------*/
  340. /* register CRYPTO_AES_128_Key (read/write) */
  341. /*----------------------------------------------------------------------------*/
  342. #if GH_INLINE_LEVEL == 0
  343. /*! \brief Writes the register 'CRYPTO_AES_128_Key'. */
  344. void GH_CRYPTO_set_AES_128_Key(U8 index, U32 data);
  345. /*! \brief Reads the register 'CRYPTO_AES_128_Key'. */
  346. U32 GH_CRYPTO_get_AES_128_Key(U8 index);
  347. #else /* GH_INLINE_LEVEL == 0 */
  348. GH_INLINE void GH_CRYPTO_set_AES_128_Key(U8 index, U32 data)
  349. {
  350. *(volatile U32 *)(REG_CRYPTO_AES_128_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)) = data;
  351. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  352. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_AES_128_Key] <-- 0x%08x\n",
  353. (REG_CRYPTO_AES_128_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)),data,data);
  354. #endif
  355. }
  356. GH_INLINE U32 GH_CRYPTO_get_AES_128_Key(U8 index)
  357. {
  358. U32 value = (*(volatile U32 *)(REG_CRYPTO_AES_128_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)));
  359. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  360. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_128_Key] --> 0x%08x\n",
  361. (REG_CRYPTO_AES_128_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)),value);
  362. #endif
  363. return value;
  364. }
  365. #endif /* GH_INLINE_LEVEL == 0 */
  366. /*----------------------------------------------------------------------------*/
  367. /* register CRYPTO_AES_192_Key (read/write) */
  368. /*----------------------------------------------------------------------------*/
  369. #if GH_INLINE_LEVEL == 0
  370. /*! \brief Writes the register 'CRYPTO_AES_192_Key'. */
  371. void GH_CRYPTO_set_AES_192_Key(U8 index, U32 data);
  372. /*! \brief Reads the register 'CRYPTO_AES_192_Key'. */
  373. U32 GH_CRYPTO_get_AES_192_Key(U8 index);
  374. #else /* GH_INLINE_LEVEL == 0 */
  375. GH_INLINE void GH_CRYPTO_set_AES_192_Key(U8 index, U32 data)
  376. {
  377. *(volatile U32 *)(REG_CRYPTO_AES_192_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)) = data;
  378. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  379. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_AES_192_Key] <-- 0x%08x\n",
  380. (REG_CRYPTO_AES_192_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)),data,data);
  381. #endif
  382. }
  383. GH_INLINE U32 GH_CRYPTO_get_AES_192_Key(U8 index)
  384. {
  385. U32 value = (*(volatile U32 *)(REG_CRYPTO_AES_192_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)));
  386. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  387. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_192_Key] --> 0x%08x\n",
  388. (REG_CRYPTO_AES_192_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)),value);
  389. #endif
  390. return value;
  391. }
  392. #endif /* GH_INLINE_LEVEL == 0 */
  393. /*----------------------------------------------------------------------------*/
  394. /* register CRYPTO_AES_256_Key (read/write) */
  395. /*----------------------------------------------------------------------------*/
  396. #if GH_INLINE_LEVEL == 0
  397. /*! \brief Writes the register 'CRYPTO_AES_256_Key'. */
  398. void GH_CRYPTO_set_AES_256_Key(U8 index, U32 data);
  399. /*! \brief Reads the register 'CRYPTO_AES_256_Key'. */
  400. U32 GH_CRYPTO_get_AES_256_Key(U8 index);
  401. #else /* GH_INLINE_LEVEL == 0 */
  402. GH_INLINE void GH_CRYPTO_set_AES_256_Key(U8 index, U32 data)
  403. {
  404. *(volatile U32 *)(REG_CRYPTO_AES_256_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)) = data;
  405. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  406. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_AES_256_Key] <-- 0x%08x\n",
  407. (REG_CRYPTO_AES_256_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)),data,data);
  408. #endif
  409. }
  410. GH_INLINE U32 GH_CRYPTO_get_AES_256_Key(U8 index)
  411. {
  412. U32 value = (*(volatile U32 *)(REG_CRYPTO_AES_256_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)));
  413. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  414. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_256_Key] --> 0x%08x\n",
  415. (REG_CRYPTO_AES_256_KEY - index * FIO_MOFFSET(CRYPTO,0x00000004)),value);
  416. #endif
  417. return value;
  418. }
  419. #endif /* GH_INLINE_LEVEL == 0 */
  420. /*----------------------------------------------------------------------------*/
  421. /* register CRYPTO_AES_Input (read/write) */
  422. /*----------------------------------------------------------------------------*/
  423. #if GH_INLINE_LEVEL == 0
  424. /*! \brief Writes the register 'CRYPTO_AES_Input'. */
  425. void GH_CRYPTO_set_AES_Input(U8 index, U32 data);
  426. /*! \brief Reads the register 'CRYPTO_AES_Input'. */
  427. U32 GH_CRYPTO_get_AES_Input(U8 index);
  428. #else /* GH_INLINE_LEVEL == 0 */
  429. GH_INLINE void GH_CRYPTO_set_AES_Input(U8 index, U32 data)
  430. {
  431. *(volatile U32 *)(REG_CRYPTO_AES_INPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)) = data;
  432. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  433. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_AES_Input] <-- 0x%08x\n",
  434. (REG_CRYPTO_AES_INPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)),data,data);
  435. #endif
  436. }
  437. GH_INLINE U32 GH_CRYPTO_get_AES_Input(U8 index)
  438. {
  439. U32 value = (*(volatile U32 *)(REG_CRYPTO_AES_INPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)));
  440. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  441. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_Input] --> 0x%08x\n",
  442. (REG_CRYPTO_AES_INPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)),value);
  443. #endif
  444. return value;
  445. }
  446. #endif /* GH_INLINE_LEVEL == 0 */
  447. /*----------------------------------------------------------------------------*/
  448. /* register CRYPTO_AES_Opcode (read/write) */
  449. /*----------------------------------------------------------------------------*/
  450. #if GH_INLINE_LEVEL == 0
  451. /*! \brief Writes the register 'CRYPTO_AES_Opcode'. */
  452. void GH_CRYPTO_set_AES_Opcode(U32 data);
  453. /*! \brief Reads the register 'CRYPTO_AES_Opcode'. */
  454. U32 GH_CRYPTO_get_AES_Opcode(void);
  455. /*! \brief Writes the bit group 'mode' of register 'CRYPTO_AES_Opcode'. */
  456. void GH_CRYPTO_set_AES_Opcode_mode(U8 data);
  457. /*! \brief Reads the bit group 'mode' of register 'CRYPTO_AES_Opcode'. */
  458. U8 GH_CRYPTO_get_AES_Opcode_mode(void);
  459. #else /* GH_INLINE_LEVEL == 0 */
  460. GH_INLINE void GH_CRYPTO_set_AES_Opcode(U32 data)
  461. {
  462. *(volatile U32 *)REG_CRYPTO_AES_OPCODE = data;
  463. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  464. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_AES_Opcode] <-- 0x%08x\n",
  465. REG_CRYPTO_AES_OPCODE,data,data);
  466. #endif
  467. }
  468. GH_INLINE U32 GH_CRYPTO_get_AES_Opcode(void)
  469. {
  470. U32 value = (*(volatile U32 *)REG_CRYPTO_AES_OPCODE);
  471. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  472. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_Opcode] --> 0x%08x\n",
  473. REG_CRYPTO_AES_OPCODE,value);
  474. #endif
  475. return value;
  476. }
  477. GH_INLINE void GH_CRYPTO_set_AES_Opcode_mode(U8 data)
  478. {
  479. GH_CRYPTO_AES_OPCODE_S d;
  480. d.all = *(volatile U32 *)REG_CRYPTO_AES_OPCODE;
  481. d.bitc.mode = data;
  482. *(volatile U32 *)REG_CRYPTO_AES_OPCODE = d.all;
  483. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  484. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_AES_Opcode_mode] <-- 0x%08x\n",
  485. REG_CRYPTO_AES_OPCODE,d.all,d.all);
  486. #endif
  487. }
  488. GH_INLINE U8 GH_CRYPTO_get_AES_Opcode_mode(void)
  489. {
  490. GH_CRYPTO_AES_OPCODE_S tmp_value;
  491. U32 value = (*(volatile U32 *)REG_CRYPTO_AES_OPCODE);
  492. tmp_value.all = value;
  493. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  494. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_Opcode_mode] --> 0x%08x\n",
  495. REG_CRYPTO_AES_OPCODE,value);
  496. #endif
  497. return tmp_value.bitc.mode;
  498. }
  499. #endif /* GH_INLINE_LEVEL == 0 */
  500. /*----------------------------------------------------------------------------*/
  501. /* register CRYPTO_AES_Output_Rdy (read) */
  502. /*----------------------------------------------------------------------------*/
  503. #if GH_INLINE_LEVEL == 0
  504. /*! \brief Reads the register 'CRYPTO_AES_Output_Rdy'. */
  505. U32 GH_CRYPTO_get_AES_Output_Rdy(void);
  506. /*! \brief Reads the bit group 'Rdy' of register 'CRYPTO_AES_Output_Rdy'. */
  507. U8 GH_CRYPTO_get_AES_Output_Rdy_Rdy(void);
  508. #else /* GH_INLINE_LEVEL == 0 */
  509. GH_INLINE U32 GH_CRYPTO_get_AES_Output_Rdy(void)
  510. {
  511. U32 value = (*(volatile U32 *)REG_CRYPTO_AES_OUTPUT_RDY);
  512. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  513. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_Output_Rdy] --> 0x%08x\n",
  514. REG_CRYPTO_AES_OUTPUT_RDY,value);
  515. #endif
  516. return value;
  517. }
  518. GH_INLINE U8 GH_CRYPTO_get_AES_Output_Rdy_Rdy(void)
  519. {
  520. GH_CRYPTO_AES_OUTPUT_RDY_S tmp_value;
  521. U32 value = (*(volatile U32 *)REG_CRYPTO_AES_OUTPUT_RDY);
  522. tmp_value.all = value;
  523. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  524. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_Output_Rdy_Rdy] --> 0x%08x\n",
  525. REG_CRYPTO_AES_OUTPUT_RDY,value);
  526. #endif
  527. return tmp_value.bitc.rdy;
  528. }
  529. #endif /* GH_INLINE_LEVEL == 0 */
  530. /*----------------------------------------------------------------------------*/
  531. /* register CRYPTO_AES_Output (read) */
  532. /*----------------------------------------------------------------------------*/
  533. #if GH_INLINE_LEVEL == 0
  534. /*! \brief Reads the register 'CRYPTO_AES_Output'. */
  535. U32 GH_CRYPTO_get_AES_Output(U8 index);
  536. #else /* GH_INLINE_LEVEL == 0 */
  537. GH_INLINE U32 GH_CRYPTO_get_AES_Output(U8 index)
  538. {
  539. U32 value = (*(volatile U32 *)(REG_CRYPTO_AES_OUTPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)));
  540. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  541. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_Output] --> 0x%08x\n",
  542. (REG_CRYPTO_AES_OUTPUT - index * FIO_MOFFSET(CRYPTO,0x00000004)),value);
  543. #endif
  544. return value;
  545. }
  546. #endif /* GH_INLINE_LEVEL == 0 */
  547. /*----------------------------------------------------------------------------*/
  548. /* register CRYPTO_AES_Interrupt (read/write) */
  549. /*----------------------------------------------------------------------------*/
  550. #if GH_INLINE_LEVEL == 0
  551. /*! \brief Writes the register 'CRYPTO_AES_Interrupt'. */
  552. void GH_CRYPTO_set_AES_Interrupt(U32 data);
  553. /*! \brief Reads the register 'CRYPTO_AES_Interrupt'. */
  554. U32 GH_CRYPTO_get_AES_Interrupt(void);
  555. /*! \brief Writes the bit group 'En' of register 'CRYPTO_AES_Interrupt'. */
  556. void GH_CRYPTO_set_AES_Interrupt_En(U8 data);
  557. /*! \brief Reads the bit group 'En' of register 'CRYPTO_AES_Interrupt'. */
  558. U8 GH_CRYPTO_get_AES_Interrupt_En(void);
  559. #else /* GH_INLINE_LEVEL == 0 */
  560. GH_INLINE void GH_CRYPTO_set_AES_Interrupt(U32 data)
  561. {
  562. *(volatile U32 *)REG_CRYPTO_AES_INTERRUPT = data;
  563. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  564. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_AES_Interrupt] <-- 0x%08x\n",
  565. REG_CRYPTO_AES_INTERRUPT,data,data);
  566. #endif
  567. }
  568. GH_INLINE U32 GH_CRYPTO_get_AES_Interrupt(void)
  569. {
  570. U32 value = (*(volatile U32 *)REG_CRYPTO_AES_INTERRUPT);
  571. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  572. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_Interrupt] --> 0x%08x\n",
  573. REG_CRYPTO_AES_INTERRUPT,value);
  574. #endif
  575. return value;
  576. }
  577. GH_INLINE void GH_CRYPTO_set_AES_Interrupt_En(U8 data)
  578. {
  579. GH_CRYPTO_AES_INTERRUPT_S d;
  580. d.all = *(volatile U32 *)REG_CRYPTO_AES_INTERRUPT;
  581. d.bitc.en = data;
  582. *(volatile U32 *)REG_CRYPTO_AES_INTERRUPT = d.all;
  583. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  584. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_AES_Interrupt_En] <-- 0x%08x\n",
  585. REG_CRYPTO_AES_INTERRUPT,d.all,d.all);
  586. #endif
  587. }
  588. GH_INLINE U8 GH_CRYPTO_get_AES_Interrupt_En(void)
  589. {
  590. GH_CRYPTO_AES_INTERRUPT_S tmp_value;
  591. U32 value = (*(volatile U32 *)REG_CRYPTO_AES_INTERRUPT);
  592. tmp_value.all = value;
  593. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  594. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_AES_Interrupt_En] --> 0x%08x\n",
  595. REG_CRYPTO_AES_INTERRUPT,value);
  596. #endif
  597. return tmp_value.bitc.en;
  598. }
  599. #endif /* GH_INLINE_LEVEL == 0 */
  600. /*----------------------------------------------------------------------------*/
  601. /* register CRYPTO_EFUSE_BOOT_SW_DIS (read/write) */
  602. /*----------------------------------------------------------------------------*/
  603. #if GH_INLINE_LEVEL == 0
  604. /*! \brief Writes the register 'CRYPTO_EFUSE_BOOT_SW_DIS'. */
  605. void GH_CRYPTO_set_EFUSE_BOOT_SW_DIS(U32 data);
  606. /*! \brief Reads the register 'CRYPTO_EFUSE_BOOT_SW_DIS'. */
  607. U32 GH_CRYPTO_get_EFUSE_BOOT_SW_DIS(void);
  608. /*! \brief Writes the bit group 'Efuse_boot_dis' of register 'CRYPTO_EFUSE_BOOT_SW_DIS'. */
  609. void GH_CRYPTO_set_EFUSE_BOOT_SW_DIS_Efuse_boot_dis(U8 data);
  610. /*! \brief Reads the bit group 'Efuse_boot_dis' of register 'CRYPTO_EFUSE_BOOT_SW_DIS'. */
  611. U8 GH_CRYPTO_get_EFUSE_BOOT_SW_DIS_Efuse_boot_dis(void);
  612. /*! \brief Writes the bit group 'Efuse_boot_sw' of register 'CRYPTO_EFUSE_BOOT_SW_DIS'. */
  613. void GH_CRYPTO_set_EFUSE_BOOT_SW_DIS_Efuse_boot_sw(U8 data);
  614. /*! \brief Reads the bit group 'Efuse_boot_sw' of register 'CRYPTO_EFUSE_BOOT_SW_DIS'. */
  615. U8 GH_CRYPTO_get_EFUSE_BOOT_SW_DIS_Efuse_boot_sw(void);
  616. #else /* GH_INLINE_LEVEL == 0 */
  617. GH_INLINE void GH_CRYPTO_set_EFUSE_BOOT_SW_DIS(U32 data)
  618. {
  619. *(volatile U32 *)REG_CRYPTO_EFUSE_BOOT_SW_DIS = data;
  620. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  621. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_EFUSE_BOOT_SW_DIS] <-- 0x%08x\n",
  622. REG_CRYPTO_EFUSE_BOOT_SW_DIS,data,data);
  623. #endif
  624. }
  625. GH_INLINE U32 GH_CRYPTO_get_EFUSE_BOOT_SW_DIS(void)
  626. {
  627. U32 value = (*(volatile U32 *)REG_CRYPTO_EFUSE_BOOT_SW_DIS);
  628. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  629. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_EFUSE_BOOT_SW_DIS] --> 0x%08x\n",
  630. REG_CRYPTO_EFUSE_BOOT_SW_DIS,value);
  631. #endif
  632. return value;
  633. }
  634. GH_INLINE void GH_CRYPTO_set_EFUSE_BOOT_SW_DIS_Efuse_boot_dis(U8 data)
  635. {
  636. GH_CRYPTO_EFUSE_BOOT_SW_DIS_S d;
  637. d.all = *(volatile U32 *)REG_CRYPTO_EFUSE_BOOT_SW_DIS;
  638. d.bitc.efuse_boot_dis = data;
  639. *(volatile U32 *)REG_CRYPTO_EFUSE_BOOT_SW_DIS = d.all;
  640. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  641. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_EFUSE_BOOT_SW_DIS_Efuse_boot_dis] <-- 0x%08x\n",
  642. REG_CRYPTO_EFUSE_BOOT_SW_DIS,d.all,d.all);
  643. #endif
  644. }
  645. GH_INLINE U8 GH_CRYPTO_get_EFUSE_BOOT_SW_DIS_Efuse_boot_dis(void)
  646. {
  647. GH_CRYPTO_EFUSE_BOOT_SW_DIS_S tmp_value;
  648. U32 value = (*(volatile U32 *)REG_CRYPTO_EFUSE_BOOT_SW_DIS);
  649. tmp_value.all = value;
  650. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  651. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_EFUSE_BOOT_SW_DIS_Efuse_boot_dis] --> 0x%08x\n",
  652. REG_CRYPTO_EFUSE_BOOT_SW_DIS,value);
  653. #endif
  654. return tmp_value.bitc.efuse_boot_dis;
  655. }
  656. GH_INLINE void GH_CRYPTO_set_EFUSE_BOOT_SW_DIS_Efuse_boot_sw(U8 data)
  657. {
  658. GH_CRYPTO_EFUSE_BOOT_SW_DIS_S d;
  659. d.all = *(volatile U32 *)REG_CRYPTO_EFUSE_BOOT_SW_DIS;
  660. d.bitc.efuse_boot_sw = data;
  661. *(volatile U32 *)REG_CRYPTO_EFUSE_BOOT_SW_DIS = d.all;
  662. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  663. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_CRYPTO_set_EFUSE_BOOT_SW_DIS_Efuse_boot_sw] <-- 0x%08x\n",
  664. REG_CRYPTO_EFUSE_BOOT_SW_DIS,d.all,d.all);
  665. #endif
  666. }
  667. GH_INLINE U8 GH_CRYPTO_get_EFUSE_BOOT_SW_DIS_Efuse_boot_sw(void)
  668. {
  669. GH_CRYPTO_EFUSE_BOOT_SW_DIS_S tmp_value;
  670. U32 value = (*(volatile U32 *)REG_CRYPTO_EFUSE_BOOT_SW_DIS);
  671. tmp_value.all = value;
  672. #if GH_CRYPTO_ENABLE_DEBUG_PRINT
  673. GH_CRYPTO_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_CRYPTO_get_EFUSE_BOOT_SW_DIS_Efuse_boot_sw] --> 0x%08x\n",
  674. REG_CRYPTO_EFUSE_BOOT_SW_DIS,value);
  675. #endif
  676. return tmp_value.bitc.efuse_boot_sw;
  677. }
  678. #endif /* GH_INLINE_LEVEL == 0 */
  679. /*----------------------------------------------------------------------------*/
  680. /* init function */
  681. /*----------------------------------------------------------------------------*/
  682. /*! \brief Initialises the registers and mirror variables. */
  683. void GH_CRYPTO_init(void);
  684. #ifdef __cplusplus
  685. }
  686. #endif
  687. #endif /* _GH_CRYPTO_H */
  688. /*----------------------------------------------------------------------------*/
  689. /* end of file */
  690. /*----------------------------------------------------------------------------*/