gh_vin.h 125 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220
  1. /*!
  2. *******************************************************************************
  3. **
  4. ** \file gh_vin.h
  5. **
  6. ** \brief Video/Sensor Input.
  7. **
  8. ** Copyright: 2012 - 2013 (C) GoKe Microelectronics ShangHai Branch
  9. **
  10. ** \attention THIS SAMPLE CODE IS PROVIDED AS IS. GOKE MICROELECTRONICS
  11. ** ACCEPTS NO RESPONSIBILITY OR LIABILITY FOR ANY ERRORS OR
  12. ** OMMISSIONS.
  13. **
  14. ** \note Do not modify this file as it is generated automatically.
  15. **
  16. ******************************************************************************/
  17. #ifndef _GH_VIN_H
  18. #define _GH_VIN_H
  19. #ifdef __LINUX__
  20. #include "reg4linux.h"
  21. #else
  22. #define FIO_ADDRESS(block,address) (address)
  23. #define FIO_MOFFSET(block,moffset) (moffset)
  24. #endif
  25. #ifndef __LINUX__
  26. #include "gtypes.h" /* global type definitions */
  27. #include "gh_lib_cfg.h" /* configuration */
  28. #endif
  29. #define GH_VIN_ENABLE_DEBUG_PRINT 0
  30. #ifdef __LINUX__
  31. #define GH_VIN_DEBUG_PRINT_FUNCTION printk
  32. #else
  33. #define GH_VIN_DEBUG_PRINT_FUNCTION printf
  34. #endif
  35. #ifndef __LINUX__
  36. #if GH_VIN_ENABLE_DEBUG_PRINT
  37. #include <stdio.h>
  38. #endif
  39. #endif
  40. /* check configuration */
  41. #ifndef GH_INLINE_LEVEL
  42. #error "GH_INLINE_LEVEL is not defined!"
  43. #endif
  44. #if GH_INLINE_LEVEL > 2
  45. #error "GH_INLINE_LEVEL must be set 0, 1 or 2!"
  46. #endif
  47. #ifndef GH_INLINE
  48. #error "GH_INLINE is not defined!"
  49. #endif
  50. /* disable inlining for debugging */
  51. #ifdef DEBUG
  52. #undef GH_INLINE_LEVEL
  53. #define GH_INLINE_LEVEL 0
  54. #endif
  55. /*----------------------------------------------------------------------------*/
  56. /* registers */
  57. /*----------------------------------------------------------------------------*/
  58. #define REG_VIN_S_CONTROL FIO_ADDRESS(VIN,0x60009000) /* read/write */
  59. #define REG_VIN_S_INPUTCONFIG FIO_ADDRESS(VIN,0x60009004) /* read/write */
  60. #define REG_VIN_S_STATUS FIO_ADDRESS(VIN,0x60009008) /* read/write */
  61. #define REG_VIN_S_VWIDTH FIO_ADDRESS(VIN,0x6000900C) /* read/write */
  62. #define REG_VIN_S_HWIDTH FIO_ADDRESS(VIN,0x60009010) /* read/write */
  63. #define REG_VIN_S_HTOP FIO_ADDRESS(VIN,0x60009014) /* read/write */
  64. #define REG_VIN_S_HBOTTOM FIO_ADDRESS(VIN,0x60009018) /* read/write */
  65. #define REG_VIN_S_V FIO_ADDRESS(VIN,0x6000901C) /* read/write */
  66. #define REG_VIN_S_H FIO_ADDRESS(VIN,0x60009020) /* read/write */
  67. #define REG_VIN_S_MINV FIO_ADDRESS(VIN,0x60009024) /* read/write */
  68. #define REG_VIN_S_MINH FIO_ADDRESS(VIN,0x60009028) /* read/write */
  69. #define REG_VIN_S_TRIGGER0START FIO_ADDRESS(VIN,0x6000902C) /* read/write */
  70. #define REG_VIN_S_TRIGGER0END FIO_ADDRESS(VIN,0x60009030) /* read/write */
  71. #define REG_VIN_S_TRIGGER1START FIO_ADDRESS(VIN,0x60009034) /* read/write */
  72. #define REG_VIN_S_TRIGGER1END FIO_ADDRESS(VIN,0x60009038) /* read/write */
  73. #define REG_VIN_S_VOUTSTART0 FIO_ADDRESS(VIN,0x6000903C) /* read/write */
  74. #define REG_VIN_S_VOUTSTART1 FIO_ADDRESS(VIN,0x60009040) /* read/write */
  75. #define REG_VIN_S_CAPSTARTV FIO_ADDRESS(VIN,0x60009044) /* read/write */
  76. #define REG_VIN_S_CAPSTARTH FIO_ADDRESS(VIN,0x60009048) /* read/write */
  77. #define REG_VIN_S_CAPENDV FIO_ADDRESS(VIN,0x6000904C) /* read/write */
  78. #define REG_VIN_S_CAPENDH FIO_ADDRESS(VIN,0x60009050) /* read/write */
  79. #define REG_VIN_S_BLANKLENGTHH FIO_ADDRESS(VIN,0x60009054) /* read/write */
  80. #define REG_VIN_S_TIMEOUTVLOW FIO_ADDRESS(VIN,0x60009058) /* read/write */
  81. #define REG_VIN_S_TIMEOUTVHIGH FIO_ADDRESS(VIN,0x6000905C) /* read/write */
  82. #define REG_VIN_S_TIMEOUTHLOW FIO_ADDRESS(VIN,0x60009060) /* read/write */
  83. #define REG_VIN_S_TIMEOUTHHIGH FIO_ADDRESS(VIN,0x60009064) /* read/write */
  84. #define REG_VIN_S_DEBUGFIFOCOUNT FIO_ADDRESS(VIN,0x60009080) /* read */
  85. #define REG_VIN_S_DEBUGFIFODATA0 FIO_ADDRESS(VIN,0x60009084) /* read */
  86. #define REG_VIN_S_DEBUGFIFODATA1 FIO_ADDRESS(VIN,0x60009088) /* read */
  87. #define REG_VIN_S_DEBUGSTALL FIO_ADDRESS(VIN,0x6000908C) /* read */
  88. #define REG_VIN_S_SLVSSATUS FIO_ADDRESS(VIN,0x60009090) /* read */
  89. /*----------------------------------------------------------------------------*/
  90. /* bit group structures */
  91. /*----------------------------------------------------------------------------*/
  92. typedef union { /* VIN_S_Control */
  93. U32 all;
  94. struct {
  95. U32 : 1;
  96. U32 enable : 1;
  97. U32 win_en : 1;
  98. U32 data_edge : 1;
  99. U32 slave_mode_enable : 1;
  100. U32 master_mode_enable : 1;
  101. U32 emb_sync : 1;
  102. U32 emb_sync_mode : 1;
  103. U32 emb_sync_loc : 2;
  104. U32 vs_pol : 1;
  105. U32 hs_pol : 1;
  106. U32 field0_pol : 1;
  107. U32 sony_field_mode : 1;
  108. U32 ecc_enable : 1;
  109. U32 hsync_mask : 1;
  110. U32 : 16;
  111. } bitc;
  112. } GH_VIN_S_CONTROL_S;
  113. typedef union { /* VIN_S_InputConfig */
  114. U32 all;
  115. struct {
  116. U32 pad_type : 1;
  117. U32 data_rate : 1;
  118. U32 data_width : 1;
  119. U32 input_source : 1;
  120. U32 rgb_yuv : 1;
  121. U32 pixel_data_width : 2;
  122. U32 yuv_input_order : 2;
  123. U32 slvs_num_lanes : 2;
  124. U32 serial_sensor_interface_mode: 1;
  125. U32 : 20;
  126. } bitc;
  127. } GH_VIN_S_INPUTCONFIG_S;
  128. typedef union { /* VIN_S_Status */
  129. U32 all;
  130. struct {
  131. U32 vsync : 1;
  132. U32 trig0 : 1;
  133. U32 trig1 : 1;
  134. U32 ovfl : 1;
  135. U32 shortl : 1;
  136. U32 shortf : 1;
  137. U32 field : 3;
  138. U32 no_hsync_detected : 1;
  139. U32 no_vsync_detected : 1;
  140. U32 idsp_ahb_vsync : 1;
  141. U32 idsp_ahb_mst_vsync : 1;
  142. U32 idsp_ahb_last_pixel : 1;
  143. U32 ecc_uncorrectable : 1;
  144. U32 program_error : 1;
  145. U32 : 16;
  146. } bitc;
  147. } GH_VIN_S_STATUS_S;
  148. typedef union { /* VIN_S_Vwidth */
  149. U32 all;
  150. struct {
  151. U32 vsync_width : 14;
  152. U32 : 18;
  153. } bitc;
  154. } GH_VIN_S_VWIDTH_S;
  155. typedef union { /* VIN_S_Hwidth */
  156. U32 all;
  157. struct {
  158. U32 hsync_width : 14;
  159. U32 : 18;
  160. } bitc;
  161. } GH_VIN_S_HWIDTH_S;
  162. typedef union { /* VIN_S_Htop */
  163. U32 all;
  164. struct {
  165. U32 hsync_top : 14;
  166. U32 : 18;
  167. } bitc;
  168. } GH_VIN_S_HTOP_S;
  169. typedef union { /* VIN_S_Hbottom */
  170. U32 all;
  171. struct {
  172. U32 hsync_bottom : 14;
  173. U32 : 18;
  174. } bitc;
  175. } GH_VIN_S_HBOTTOM_S;
  176. typedef union { /* VIN_S_V */
  177. U32 all;
  178. struct {
  179. U32 num_lines : 14;
  180. U32 : 18;
  181. } bitc;
  182. } GH_VIN_S_V_S;
  183. typedef union { /* VIN_S_H */
  184. U32 all;
  185. struct {
  186. U32 num_cols : 14;
  187. U32 : 18;
  188. } bitc;
  189. } GH_VIN_S_H_S;
  190. typedef union { /* VIN_S_MinV */
  191. U32 all;
  192. struct {
  193. U32 min_num_lines : 14;
  194. U32 : 18;
  195. } bitc;
  196. } GH_VIN_S_MINV_S;
  197. typedef union { /* VIN_S_MinH */
  198. U32 all;
  199. struct {
  200. U32 min_num_fields : 14;
  201. U32 : 18;
  202. } bitc;
  203. } GH_VIN_S_MINH_S;
  204. typedef union { /* VIN_S_Trigger0Start */
  205. U32 all;
  206. struct {
  207. U32 startline : 14;
  208. U32 pol : 1;
  209. U32 enable : 1;
  210. U32 : 16;
  211. } bitc;
  212. } GH_VIN_S_TRIGGER0START_S;
  213. typedef union { /* VIN_S_Trigger0End */
  214. U32 all;
  215. struct {
  216. U32 endline : 14;
  217. U32 : 18;
  218. } bitc;
  219. } GH_VIN_S_TRIGGER0END_S;
  220. typedef union { /* VIN_S_Trigger1Start */
  221. U32 all;
  222. struct {
  223. U32 startline : 14;
  224. U32 pol : 1;
  225. U32 enable : 1;
  226. U32 : 16;
  227. } bitc;
  228. } GH_VIN_S_TRIGGER1START_S;
  229. typedef union { /* VIN_S_Trigger1End */
  230. U32 all;
  231. struct {
  232. U32 endline : 14;
  233. U32 : 18;
  234. } bitc;
  235. } GH_VIN_S_TRIGGER1END_S;
  236. typedef union { /* VIN_S_VoutStart0 */
  237. U32 all;
  238. struct {
  239. U32 startline : 14;
  240. U32 : 1;
  241. U32 disable_field_check : 1;
  242. U32 : 16;
  243. } bitc;
  244. } GH_VIN_S_VOUTSTART0_S;
  245. typedef union { /* VIN_S_VoutStart1 */
  246. U32 all;
  247. struct {
  248. U32 startline : 14;
  249. U32 : 1;
  250. U32 disable_field_check : 1;
  251. U32 : 16;
  252. } bitc;
  253. } GH_VIN_S_VOUTSTART1_S;
  254. typedef union { /* VIN_S_CapStartV */
  255. U32 all;
  256. struct {
  257. U32 startline : 14;
  258. U32 : 18;
  259. } bitc;
  260. } GH_VIN_S_CAPSTARTV_S;
  261. typedef union { /* VIN_S_CapStartH */
  262. U32 all;
  263. struct {
  264. U32 startcol : 14;
  265. U32 : 18;
  266. } bitc;
  267. } GH_VIN_S_CAPSTARTH_S;
  268. typedef union { /* VIN_S_CapEndV */
  269. U32 all;
  270. struct {
  271. U32 endline : 14;
  272. U32 : 18;
  273. } bitc;
  274. } GH_VIN_S_CAPENDV_S;
  275. typedef union { /* VIN_S_CapEndH */
  276. U32 all;
  277. struct {
  278. U32 endcol : 14;
  279. U32 : 18;
  280. } bitc;
  281. } GH_VIN_S_CAPENDH_S;
  282. typedef union { /* VIN_S_BlankLengthH */
  283. U32 all;
  284. struct {
  285. U32 blank_length : 14;
  286. U32 : 18;
  287. } bitc;
  288. } GH_VIN_S_BLANKLENGTHH_S;
  289. typedef union { /* VIN_S_TimeoutVLow */
  290. U32 all;
  291. struct {
  292. U32 vsync_timeout_low : 16;
  293. U32 : 16;
  294. } bitc;
  295. } GH_VIN_S_TIMEOUTVLOW_S;
  296. typedef union { /* VIN_S_TimeoutVHigh */
  297. U32 all;
  298. struct {
  299. U32 vsync_timeout_high : 16;
  300. U32 : 16;
  301. } bitc;
  302. } GH_VIN_S_TIMEOUTVHIGH_S;
  303. typedef union { /* VIN_S_TimeoutHLow */
  304. U32 all;
  305. struct {
  306. U32 hsync_timeout_low : 16;
  307. U32 : 16;
  308. } bitc;
  309. } GH_VIN_S_TIMEOUTHLOW_S;
  310. typedef union { /* VIN_S_TimeoutHHigh */
  311. U32 all;
  312. struct {
  313. U32 hsync_timeout_high : 16;
  314. U32 : 16;
  315. } bitc;
  316. } GH_VIN_S_TIMEOUTHHIGH_S;
  317. typedef union { /* VIN_S_debugFifoCount */
  318. U32 all;
  319. struct {
  320. U32 num_words_in_fifo : 16;
  321. U32 : 16;
  322. } bitc;
  323. } GH_VIN_S_DEBUGFIFOCOUNT_S;
  324. typedef union { /* VIN_S_debugFifoData0 */
  325. U32 all;
  326. struct {
  327. U32 pixel_0_read_data : 16;
  328. U32 : 16;
  329. } bitc;
  330. } GH_VIN_S_DEBUGFIFODATA0_S;
  331. typedef union { /* VIN_S_debugFifoData1 */
  332. U32 all;
  333. struct {
  334. U32 pixel_1_read_data : 16;
  335. U32 : 16;
  336. } bitc;
  337. } GH_VIN_S_DEBUGFIFODATA1_S;
  338. typedef union { /* VIN_S_debugStall */
  339. U32 all;
  340. struct {
  341. U32 output_interface_stall : 1;
  342. U32 : 31;
  343. } bitc;
  344. } GH_VIN_S_DEBUGSTALL_S;
  345. typedef union { /* VIN_S_slvsSatus */
  346. U32 all;
  347. struct {
  348. U32 slvs_lock_state : 1;
  349. U32 detected_sync_code_match : 1;
  350. U32 detected_start_of_frame : 1;
  351. U32 detected_vsync : 1;
  352. U32 detected_start_of_line : 1;
  353. U32 valid_pixel_generated : 1;
  354. U32 end_of_line_generated : 1;
  355. U32 corrected_error : 1;
  356. U32 : 24;
  357. } bitc;
  358. } GH_VIN_S_SLVSSATUS_S;
  359. /*----------------------------------------------------------------------------*/
  360. /* mirror variables */
  361. /*----------------------------------------------------------------------------*/
  362. #ifdef __cplusplus
  363. extern "C" {
  364. #endif
  365. /*----------------------------------------------------------------------------*/
  366. /* register VIN_S_Control (read/write) */
  367. /*----------------------------------------------------------------------------*/
  368. #if GH_INLINE_LEVEL == 0
  369. /*! \brief Writes the register 'VIN_S_Control'. */
  370. void GH_VIN_set_S_Control(U32 data);
  371. /*! \brief Reads the register 'VIN_S_Control'. */
  372. U32 GH_VIN_get_S_Control(void);
  373. /*! \brief Writes the bit group 'enable' of register 'VIN_S_Control'. */
  374. void GH_VIN_set_S_Control_enable(U8 data);
  375. /*! \brief Reads the bit group 'enable' of register 'VIN_S_Control'. */
  376. U8 GH_VIN_get_S_Control_enable(void);
  377. /*! \brief Writes the bit group 'win_en' of register 'VIN_S_Control'. */
  378. void GH_VIN_set_S_Control_win_en(U8 data);
  379. /*! \brief Reads the bit group 'win_en' of register 'VIN_S_Control'. */
  380. U8 GH_VIN_get_S_Control_win_en(void);
  381. /*! \brief Writes the bit group 'data_edge' of register 'VIN_S_Control'. */
  382. void GH_VIN_set_S_Control_data_edge(U8 data);
  383. /*! \brief Reads the bit group 'data_edge' of register 'VIN_S_Control'. */
  384. U8 GH_VIN_get_S_Control_data_edge(void);
  385. /*! \brief Writes the bit group 'slave_mode_enable' of register 'VIN_S_Control'. */
  386. void GH_VIN_set_S_Control_slave_mode_enable(U8 data);
  387. /*! \brief Reads the bit group 'slave_mode_enable' of register 'VIN_S_Control'. */
  388. U8 GH_VIN_get_S_Control_slave_mode_enable(void);
  389. /*! \brief Writes the bit group 'master_mode_enable' of register 'VIN_S_Control'. */
  390. void GH_VIN_set_S_Control_master_mode_enable(U8 data);
  391. /*! \brief Reads the bit group 'master_mode_enable' of register 'VIN_S_Control'. */
  392. U8 GH_VIN_get_S_Control_master_mode_enable(void);
  393. /*! \brief Writes the bit group 'emb_sync' of register 'VIN_S_Control'. */
  394. void GH_VIN_set_S_Control_emb_sync(U8 data);
  395. /*! \brief Reads the bit group 'emb_sync' of register 'VIN_S_Control'. */
  396. U8 GH_VIN_get_S_Control_emb_sync(void);
  397. /*! \brief Writes the bit group 'emb_sync_mode' of register 'VIN_S_Control'. */
  398. void GH_VIN_set_S_Control_emb_sync_mode(U8 data);
  399. /*! \brief Reads the bit group 'emb_sync_mode' of register 'VIN_S_Control'. */
  400. U8 GH_VIN_get_S_Control_emb_sync_mode(void);
  401. /*! \brief Writes the bit group 'emb_sync_loc' of register 'VIN_S_Control'. */
  402. void GH_VIN_set_S_Control_emb_sync_loc(U8 data);
  403. /*! \brief Reads the bit group 'emb_sync_loc' of register 'VIN_S_Control'. */
  404. U8 GH_VIN_get_S_Control_emb_sync_loc(void);
  405. /*! \brief Writes the bit group 'vs_pol' of register 'VIN_S_Control'. */
  406. void GH_VIN_set_S_Control_vs_pol(U8 data);
  407. /*! \brief Reads the bit group 'vs_pol' of register 'VIN_S_Control'. */
  408. U8 GH_VIN_get_S_Control_vs_pol(void);
  409. /*! \brief Writes the bit group 'hs_pol' of register 'VIN_S_Control'. */
  410. void GH_VIN_set_S_Control_hs_pol(U8 data);
  411. /*! \brief Reads the bit group 'hs_pol' of register 'VIN_S_Control'. */
  412. U8 GH_VIN_get_S_Control_hs_pol(void);
  413. /*! \brief Writes the bit group 'field0_pol' of register 'VIN_S_Control'. */
  414. void GH_VIN_set_S_Control_field0_pol(U8 data);
  415. /*! \brief Reads the bit group 'field0_pol' of register 'VIN_S_Control'. */
  416. U8 GH_VIN_get_S_Control_field0_pol(void);
  417. /*! \brief Writes the bit group 'sony_field_mode' of register 'VIN_S_Control'. */
  418. void GH_VIN_set_S_Control_sony_field_mode(U8 data);
  419. /*! \brief Reads the bit group 'sony_field_mode' of register 'VIN_S_Control'. */
  420. U8 GH_VIN_get_S_Control_sony_field_mode(void);
  421. /*! \brief Writes the bit group 'ecc_enable' of register 'VIN_S_Control'. */
  422. void GH_VIN_set_S_Control_ecc_enable(U8 data);
  423. /*! \brief Reads the bit group 'ecc_enable' of register 'VIN_S_Control'. */
  424. U8 GH_VIN_get_S_Control_ecc_enable(void);
  425. /*! \brief Writes the bit group 'hsync_mask' of register 'VIN_S_Control'. */
  426. void GH_VIN_set_S_Control_hsync_mask(U8 data);
  427. /*! \brief Reads the bit group 'hsync_mask' of register 'VIN_S_Control'. */
  428. U8 GH_VIN_get_S_Control_hsync_mask(void);
  429. #else /* GH_INLINE_LEVEL == 0 */
  430. GH_INLINE void GH_VIN_set_S_Control(U32 data)
  431. {
  432. *(volatile U32 *)REG_VIN_S_CONTROL = data;
  433. #if GH_VIN_ENABLE_DEBUG_PRINT
  434. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Control] <-- 0x%08x\n",
  435. REG_VIN_S_CONTROL,data,data);
  436. #endif
  437. }
  438. GH_INLINE U32 GH_VIN_get_S_Control(void)
  439. {
  440. U32 value = (*(volatile U32 *)REG_VIN_S_CONTROL);
  441. #if GH_VIN_ENABLE_DEBUG_PRINT
  442. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Control] --> 0x%08x\n",
  443. REG_VIN_S_CONTROL,value);
  444. #endif
  445. return value;
  446. }
  447. GH_INLINE void GH_VIN_set_S_Control_enable(U8 data)
  448. {
  449. GH_VIN_S_CONTROL_S d;
  450. d.all = *(volatile U32 *)REG_VIN_S_CONTROL;
  451. d.bitc.enable = data;
  452. *(volatile U32 *)REG_VIN_S_CONTROL = d.all;
  453. #if GH_VIN_ENABLE_DEBUG_PRINT
  454. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Control_enable] <-- 0x%08x\n",
  455. REG_VIN_S_CONTROL,d.all,d.all);
  456. #endif
  457. }
  458. GH_INLINE U8 GH_VIN_get_S_Control_enable(void)
  459. {
  460. GH_VIN_S_CONTROL_S tmp_value;
  461. U32 value = (*(volatile U32 *)REG_VIN_S_CONTROL);
  462. tmp_value.all = value;
  463. #if GH_VIN_ENABLE_DEBUG_PRINT
  464. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Control_enable] --> 0x%08x\n",
  465. REG_VIN_S_CONTROL,value);
  466. #endif
  467. return tmp_value.bitc.enable;
  468. }
  469. GH_INLINE void GH_VIN_set_S_Control_win_en(U8 data)
  470. {
  471. GH_VIN_S_CONTROL_S d;
  472. d.all = *(volatile U32 *)REG_VIN_S_CONTROL;
  473. d.bitc.win_en = data;
  474. *(volatile U32 *)REG_VIN_S_CONTROL = d.all;
  475. #if GH_VIN_ENABLE_DEBUG_PRINT
  476. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Control_win_en] <-- 0x%08x\n",
  477. REG_VIN_S_CONTROL,d.all,d.all);
  478. #endif
  479. }
  480. GH_INLINE U8 GH_VIN_get_S_Control_win_en(void)
  481. {
  482. GH_VIN_S_CONTROL_S tmp_value;
  483. U32 value = (*(volatile U32 *)REG_VIN_S_CONTROL);
  484. tmp_value.all = value;
  485. #if GH_VIN_ENABLE_DEBUG_PRINT
  486. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Control_win_en] --> 0x%08x\n",
  487. REG_VIN_S_CONTROL,value);
  488. #endif
  489. return tmp_value.bitc.win_en;
  490. }
  491. GH_INLINE void GH_VIN_set_S_Control_data_edge(U8 data)
  492. {
  493. GH_VIN_S_CONTROL_S d;
  494. d.all = *(volatile U32 *)REG_VIN_S_CONTROL;
  495. d.bitc.data_edge = data;
  496. *(volatile U32 *)REG_VIN_S_CONTROL = d.all;
  497. #if GH_VIN_ENABLE_DEBUG_PRINT
  498. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Control_data_edge] <-- 0x%08x\n",
  499. REG_VIN_S_CONTROL,d.all,d.all);
  500. #endif
  501. }
  502. GH_INLINE U8 GH_VIN_get_S_Control_data_edge(void)
  503. {
  504. GH_VIN_S_CONTROL_S tmp_value;
  505. U32 value = (*(volatile U32 *)REG_VIN_S_CONTROL);
  506. tmp_value.all = value;
  507. #if GH_VIN_ENABLE_DEBUG_PRINT
  508. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Control_data_edge] --> 0x%08x\n",
  509. REG_VIN_S_CONTROL,value);
  510. #endif
  511. return tmp_value.bitc.data_edge;
  512. }
  513. GH_INLINE void GH_VIN_set_S_Control_slave_mode_enable(U8 data)
  514. {
  515. GH_VIN_S_CONTROL_S d;
  516. d.all = *(volatile U32 *)REG_VIN_S_CONTROL;
  517. d.bitc.slave_mode_enable = data;
  518. *(volatile U32 *)REG_VIN_S_CONTROL = d.all;
  519. #if GH_VIN_ENABLE_DEBUG_PRINT
  520. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Control_slave_mode_enable] <-- 0x%08x\n",
  521. REG_VIN_S_CONTROL,d.all,d.all);
  522. #endif
  523. }
  524. GH_INLINE U8 GH_VIN_get_S_Control_slave_mode_enable(void)
  525. {
  526. GH_VIN_S_CONTROL_S tmp_value;
  527. U32 value = (*(volatile U32 *)REG_VIN_S_CONTROL);
  528. tmp_value.all = value;
  529. #if GH_VIN_ENABLE_DEBUG_PRINT
  530. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Control_slave_mode_enable] --> 0x%08x\n",
  531. REG_VIN_S_CONTROL,value);
  532. #endif
  533. return tmp_value.bitc.slave_mode_enable;
  534. }
  535. GH_INLINE void GH_VIN_set_S_Control_master_mode_enable(U8 data)
  536. {
  537. GH_VIN_S_CONTROL_S d;
  538. d.all = *(volatile U32 *)REG_VIN_S_CONTROL;
  539. d.bitc.master_mode_enable = data;
  540. *(volatile U32 *)REG_VIN_S_CONTROL = d.all;
  541. #if GH_VIN_ENABLE_DEBUG_PRINT
  542. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Control_master_mode_enable] <-- 0x%08x\n",
  543. REG_VIN_S_CONTROL,d.all,d.all);
  544. #endif
  545. }
  546. GH_INLINE U8 GH_VIN_get_S_Control_master_mode_enable(void)
  547. {
  548. GH_VIN_S_CONTROL_S tmp_value;
  549. U32 value = (*(volatile U32 *)REG_VIN_S_CONTROL);
  550. tmp_value.all = value;
  551. #if GH_VIN_ENABLE_DEBUG_PRINT
  552. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Control_master_mode_enable] --> 0x%08x\n",
  553. REG_VIN_S_CONTROL,value);
  554. #endif
  555. return tmp_value.bitc.master_mode_enable;
  556. }
  557. GH_INLINE void GH_VIN_set_S_Control_emb_sync(U8 data)
  558. {
  559. GH_VIN_S_CONTROL_S d;
  560. d.all = *(volatile U32 *)REG_VIN_S_CONTROL;
  561. d.bitc.emb_sync = data;
  562. *(volatile U32 *)REG_VIN_S_CONTROL = d.all;
  563. #if GH_VIN_ENABLE_DEBUG_PRINT
  564. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Control_emb_sync] <-- 0x%08x\n",
  565. REG_VIN_S_CONTROL,d.all,d.all);
  566. #endif
  567. }
  568. GH_INLINE U8 GH_VIN_get_S_Control_emb_sync(void)
  569. {
  570. GH_VIN_S_CONTROL_S tmp_value;
  571. U32 value = (*(volatile U32 *)REG_VIN_S_CONTROL);
  572. tmp_value.all = value;
  573. #if GH_VIN_ENABLE_DEBUG_PRINT
  574. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Control_emb_sync] --> 0x%08x\n",
  575. REG_VIN_S_CONTROL,value);
  576. #endif
  577. return tmp_value.bitc.emb_sync;
  578. }
  579. GH_INLINE void GH_VIN_set_S_Control_emb_sync_mode(U8 data)
  580. {
  581. GH_VIN_S_CONTROL_S d;
  582. d.all = *(volatile U32 *)REG_VIN_S_CONTROL;
  583. d.bitc.emb_sync_mode = data;
  584. *(volatile U32 *)REG_VIN_S_CONTROL = d.all;
  585. #if GH_VIN_ENABLE_DEBUG_PRINT
  586. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Control_emb_sync_mode] <-- 0x%08x\n",
  587. REG_VIN_S_CONTROL,d.all,d.all);
  588. #endif
  589. }
  590. GH_INLINE U8 GH_VIN_get_S_Control_emb_sync_mode(void)
  591. {
  592. GH_VIN_S_CONTROL_S tmp_value;
  593. U32 value = (*(volatile U32 *)REG_VIN_S_CONTROL);
  594. tmp_value.all = value;
  595. #if GH_VIN_ENABLE_DEBUG_PRINT
  596. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Control_emb_sync_mode] --> 0x%08x\n",
  597. REG_VIN_S_CONTROL,value);
  598. #endif
  599. return tmp_value.bitc.emb_sync_mode;
  600. }
  601. GH_INLINE void GH_VIN_set_S_Control_emb_sync_loc(U8 data)
  602. {
  603. GH_VIN_S_CONTROL_S d;
  604. d.all = *(volatile U32 *)REG_VIN_S_CONTROL;
  605. d.bitc.emb_sync_loc = data;
  606. *(volatile U32 *)REG_VIN_S_CONTROL = d.all;
  607. #if GH_VIN_ENABLE_DEBUG_PRINT
  608. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Control_emb_sync_loc] <-- 0x%08x\n",
  609. REG_VIN_S_CONTROL,d.all,d.all);
  610. #endif
  611. }
  612. GH_INLINE U8 GH_VIN_get_S_Control_emb_sync_loc(void)
  613. {
  614. GH_VIN_S_CONTROL_S tmp_value;
  615. U32 value = (*(volatile U32 *)REG_VIN_S_CONTROL);
  616. tmp_value.all = value;
  617. #if GH_VIN_ENABLE_DEBUG_PRINT
  618. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Control_emb_sync_loc] --> 0x%08x\n",
  619. REG_VIN_S_CONTROL,value);
  620. #endif
  621. return tmp_value.bitc.emb_sync_loc;
  622. }
  623. GH_INLINE void GH_VIN_set_S_Control_vs_pol(U8 data)
  624. {
  625. GH_VIN_S_CONTROL_S d;
  626. d.all = *(volatile U32 *)REG_VIN_S_CONTROL;
  627. d.bitc.vs_pol = data;
  628. *(volatile U32 *)REG_VIN_S_CONTROL = d.all;
  629. #if GH_VIN_ENABLE_DEBUG_PRINT
  630. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Control_vs_pol] <-- 0x%08x\n",
  631. REG_VIN_S_CONTROL,d.all,d.all);
  632. #endif
  633. }
  634. GH_INLINE U8 GH_VIN_get_S_Control_vs_pol(void)
  635. {
  636. GH_VIN_S_CONTROL_S tmp_value;
  637. U32 value = (*(volatile U32 *)REG_VIN_S_CONTROL);
  638. tmp_value.all = value;
  639. #if GH_VIN_ENABLE_DEBUG_PRINT
  640. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Control_vs_pol] --> 0x%08x\n",
  641. REG_VIN_S_CONTROL,value);
  642. #endif
  643. return tmp_value.bitc.vs_pol;
  644. }
  645. GH_INLINE void GH_VIN_set_S_Control_hs_pol(U8 data)
  646. {
  647. GH_VIN_S_CONTROL_S d;
  648. d.all = *(volatile U32 *)REG_VIN_S_CONTROL;
  649. d.bitc.hs_pol = data;
  650. *(volatile U32 *)REG_VIN_S_CONTROL = d.all;
  651. #if GH_VIN_ENABLE_DEBUG_PRINT
  652. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Control_hs_pol] <-- 0x%08x\n",
  653. REG_VIN_S_CONTROL,d.all,d.all);
  654. #endif
  655. }
  656. GH_INLINE U8 GH_VIN_get_S_Control_hs_pol(void)
  657. {
  658. GH_VIN_S_CONTROL_S tmp_value;
  659. U32 value = (*(volatile U32 *)REG_VIN_S_CONTROL);
  660. tmp_value.all = value;
  661. #if GH_VIN_ENABLE_DEBUG_PRINT
  662. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Control_hs_pol] --> 0x%08x\n",
  663. REG_VIN_S_CONTROL,value);
  664. #endif
  665. return tmp_value.bitc.hs_pol;
  666. }
  667. GH_INLINE void GH_VIN_set_S_Control_field0_pol(U8 data)
  668. {
  669. GH_VIN_S_CONTROL_S d;
  670. d.all = *(volatile U32 *)REG_VIN_S_CONTROL;
  671. d.bitc.field0_pol = data;
  672. *(volatile U32 *)REG_VIN_S_CONTROL = d.all;
  673. #if GH_VIN_ENABLE_DEBUG_PRINT
  674. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Control_field0_pol] <-- 0x%08x\n",
  675. REG_VIN_S_CONTROL,d.all,d.all);
  676. #endif
  677. }
  678. GH_INLINE U8 GH_VIN_get_S_Control_field0_pol(void)
  679. {
  680. GH_VIN_S_CONTROL_S tmp_value;
  681. U32 value = (*(volatile U32 *)REG_VIN_S_CONTROL);
  682. tmp_value.all = value;
  683. #if GH_VIN_ENABLE_DEBUG_PRINT
  684. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Control_field0_pol] --> 0x%08x\n",
  685. REG_VIN_S_CONTROL,value);
  686. #endif
  687. return tmp_value.bitc.field0_pol;
  688. }
  689. GH_INLINE void GH_VIN_set_S_Control_sony_field_mode(U8 data)
  690. {
  691. GH_VIN_S_CONTROL_S d;
  692. d.all = *(volatile U32 *)REG_VIN_S_CONTROL;
  693. d.bitc.sony_field_mode = data;
  694. *(volatile U32 *)REG_VIN_S_CONTROL = d.all;
  695. #if GH_VIN_ENABLE_DEBUG_PRINT
  696. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Control_sony_field_mode] <-- 0x%08x\n",
  697. REG_VIN_S_CONTROL,d.all,d.all);
  698. #endif
  699. }
  700. GH_INLINE U8 GH_VIN_get_S_Control_sony_field_mode(void)
  701. {
  702. GH_VIN_S_CONTROL_S tmp_value;
  703. U32 value = (*(volatile U32 *)REG_VIN_S_CONTROL);
  704. tmp_value.all = value;
  705. #if GH_VIN_ENABLE_DEBUG_PRINT
  706. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Control_sony_field_mode] --> 0x%08x\n",
  707. REG_VIN_S_CONTROL,value);
  708. #endif
  709. return tmp_value.bitc.sony_field_mode;
  710. }
  711. GH_INLINE void GH_VIN_set_S_Control_ecc_enable(U8 data)
  712. {
  713. GH_VIN_S_CONTROL_S d;
  714. d.all = *(volatile U32 *)REG_VIN_S_CONTROL;
  715. d.bitc.ecc_enable = data;
  716. *(volatile U32 *)REG_VIN_S_CONTROL = d.all;
  717. #if GH_VIN_ENABLE_DEBUG_PRINT
  718. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Control_ecc_enable] <-- 0x%08x\n",
  719. REG_VIN_S_CONTROL,d.all,d.all);
  720. #endif
  721. }
  722. GH_INLINE U8 GH_VIN_get_S_Control_ecc_enable(void)
  723. {
  724. GH_VIN_S_CONTROL_S tmp_value;
  725. U32 value = (*(volatile U32 *)REG_VIN_S_CONTROL);
  726. tmp_value.all = value;
  727. #if GH_VIN_ENABLE_DEBUG_PRINT
  728. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Control_ecc_enable] --> 0x%08x\n",
  729. REG_VIN_S_CONTROL,value);
  730. #endif
  731. return tmp_value.bitc.ecc_enable;
  732. }
  733. GH_INLINE void GH_VIN_set_S_Control_hsync_mask(U8 data)
  734. {
  735. GH_VIN_S_CONTROL_S d;
  736. d.all = *(volatile U32 *)REG_VIN_S_CONTROL;
  737. d.bitc.hsync_mask = data;
  738. *(volatile U32 *)REG_VIN_S_CONTROL = d.all;
  739. #if GH_VIN_ENABLE_DEBUG_PRINT
  740. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Control_hsync_mask] <-- 0x%08x\n",
  741. REG_VIN_S_CONTROL,d.all,d.all);
  742. #endif
  743. }
  744. GH_INLINE U8 GH_VIN_get_S_Control_hsync_mask(void)
  745. {
  746. GH_VIN_S_CONTROL_S tmp_value;
  747. U32 value = (*(volatile U32 *)REG_VIN_S_CONTROL);
  748. tmp_value.all = value;
  749. #if GH_VIN_ENABLE_DEBUG_PRINT
  750. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Control_hsync_mask] --> 0x%08x\n",
  751. REG_VIN_S_CONTROL,value);
  752. #endif
  753. return tmp_value.bitc.hsync_mask;
  754. }
  755. #endif /* GH_INLINE_LEVEL == 0 */
  756. /*----------------------------------------------------------------------------*/
  757. /* register VIN_S_InputConfig (read/write) */
  758. /*----------------------------------------------------------------------------*/
  759. #if GH_INLINE_LEVEL == 0
  760. /*! \brief Writes the register 'VIN_S_InputConfig'. */
  761. void GH_VIN_set_S_InputConfig(U32 data);
  762. /*! \brief Reads the register 'VIN_S_InputConfig'. */
  763. U32 GH_VIN_get_S_InputConfig(void);
  764. /*! \brief Writes the bit group 'pad_type' of register 'VIN_S_InputConfig'. */
  765. void GH_VIN_set_S_InputConfig_pad_type(U8 data);
  766. /*! \brief Reads the bit group 'pad_type' of register 'VIN_S_InputConfig'. */
  767. U8 GH_VIN_get_S_InputConfig_pad_type(void);
  768. /*! \brief Writes the bit group 'data_rate' of register 'VIN_S_InputConfig'. */
  769. void GH_VIN_set_S_InputConfig_data_rate(U8 data);
  770. /*! \brief Reads the bit group 'data_rate' of register 'VIN_S_InputConfig'. */
  771. U8 GH_VIN_get_S_InputConfig_data_rate(void);
  772. /*! \brief Writes the bit group 'data_width' of register 'VIN_S_InputConfig'. */
  773. void GH_VIN_set_S_InputConfig_data_width(U8 data);
  774. /*! \brief Reads the bit group 'data_width' of register 'VIN_S_InputConfig'. */
  775. U8 GH_VIN_get_S_InputConfig_data_width(void);
  776. /*! \brief Writes the bit group 'input_source' of register 'VIN_S_InputConfig'. */
  777. void GH_VIN_set_S_InputConfig_input_source(U8 data);
  778. /*! \brief Reads the bit group 'input_source' of register 'VIN_S_InputConfig'. */
  779. U8 GH_VIN_get_S_InputConfig_input_source(void);
  780. /*! \brief Writes the bit group 'rgb_yuv' of register 'VIN_S_InputConfig'. */
  781. void GH_VIN_set_S_InputConfig_rgb_yuv(U8 data);
  782. /*! \brief Reads the bit group 'rgb_yuv' of register 'VIN_S_InputConfig'. */
  783. U8 GH_VIN_get_S_InputConfig_rgb_yuv(void);
  784. /*! \brief Writes the bit group 'pixel_data_width' of register 'VIN_S_InputConfig'. */
  785. void GH_VIN_set_S_InputConfig_pixel_data_width(U8 data);
  786. /*! \brief Reads the bit group 'pixel_data_width' of register 'VIN_S_InputConfig'. */
  787. U8 GH_VIN_get_S_InputConfig_pixel_data_width(void);
  788. /*! \brief Writes the bit group 'yuv_input_order' of register 'VIN_S_InputConfig'. */
  789. void GH_VIN_set_S_InputConfig_yuv_input_order(U8 data);
  790. /*! \brief Reads the bit group 'yuv_input_order' of register 'VIN_S_InputConfig'. */
  791. U8 GH_VIN_get_S_InputConfig_yuv_input_order(void);
  792. /*! \brief Writes the bit group 'slvs_num_lanes' of register 'VIN_S_InputConfig'. */
  793. void GH_VIN_set_S_InputConfig_slvs_num_lanes(U8 data);
  794. /*! \brief Reads the bit group 'slvs_num_lanes' of register 'VIN_S_InputConfig'. */
  795. U8 GH_VIN_get_S_InputConfig_slvs_num_lanes(void);
  796. /*! \brief Writes the bit group 'serial_sensor_interface_mode' of register 'VIN_S_InputConfig'. */
  797. void GH_VIN_set_S_InputConfig_serial_sensor_interface_mode(U8 data);
  798. /*! \brief Reads the bit group 'serial_sensor_interface_mode' of register 'VIN_S_InputConfig'. */
  799. U8 GH_VIN_get_S_InputConfig_serial_sensor_interface_mode(void);
  800. #else /* GH_INLINE_LEVEL == 0 */
  801. GH_INLINE void GH_VIN_set_S_InputConfig(U32 data)
  802. {
  803. *(volatile U32 *)REG_VIN_S_INPUTCONFIG = data;
  804. #if GH_VIN_ENABLE_DEBUG_PRINT
  805. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_InputConfig] <-- 0x%08x\n",
  806. REG_VIN_S_INPUTCONFIG,data,data);
  807. #endif
  808. }
  809. GH_INLINE U32 GH_VIN_get_S_InputConfig(void)
  810. {
  811. U32 value = (*(volatile U32 *)REG_VIN_S_INPUTCONFIG);
  812. #if GH_VIN_ENABLE_DEBUG_PRINT
  813. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_InputConfig] --> 0x%08x\n",
  814. REG_VIN_S_INPUTCONFIG,value);
  815. #endif
  816. return value;
  817. }
  818. GH_INLINE void GH_VIN_set_S_InputConfig_pad_type(U8 data)
  819. {
  820. GH_VIN_S_INPUTCONFIG_S d;
  821. d.all = *(volatile U32 *)REG_VIN_S_INPUTCONFIG;
  822. d.bitc.pad_type = data;
  823. *(volatile U32 *)REG_VIN_S_INPUTCONFIG = d.all;
  824. #if GH_VIN_ENABLE_DEBUG_PRINT
  825. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_InputConfig_pad_type] <-- 0x%08x\n",
  826. REG_VIN_S_INPUTCONFIG,d.all,d.all);
  827. #endif
  828. }
  829. GH_INLINE U8 GH_VIN_get_S_InputConfig_pad_type(void)
  830. {
  831. GH_VIN_S_INPUTCONFIG_S tmp_value;
  832. U32 value = (*(volatile U32 *)REG_VIN_S_INPUTCONFIG);
  833. tmp_value.all = value;
  834. #if GH_VIN_ENABLE_DEBUG_PRINT
  835. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_InputConfig_pad_type] --> 0x%08x\n",
  836. REG_VIN_S_INPUTCONFIG,value);
  837. #endif
  838. return tmp_value.bitc.pad_type;
  839. }
  840. GH_INLINE void GH_VIN_set_S_InputConfig_data_rate(U8 data)
  841. {
  842. GH_VIN_S_INPUTCONFIG_S d;
  843. d.all = *(volatile U32 *)REG_VIN_S_INPUTCONFIG;
  844. d.bitc.data_rate = data;
  845. *(volatile U32 *)REG_VIN_S_INPUTCONFIG = d.all;
  846. #if GH_VIN_ENABLE_DEBUG_PRINT
  847. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_InputConfig_data_rate] <-- 0x%08x\n",
  848. REG_VIN_S_INPUTCONFIG,d.all,d.all);
  849. #endif
  850. }
  851. GH_INLINE U8 GH_VIN_get_S_InputConfig_data_rate(void)
  852. {
  853. GH_VIN_S_INPUTCONFIG_S tmp_value;
  854. U32 value = (*(volatile U32 *)REG_VIN_S_INPUTCONFIG);
  855. tmp_value.all = value;
  856. #if GH_VIN_ENABLE_DEBUG_PRINT
  857. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_InputConfig_data_rate] --> 0x%08x\n",
  858. REG_VIN_S_INPUTCONFIG,value);
  859. #endif
  860. return tmp_value.bitc.data_rate;
  861. }
  862. GH_INLINE void GH_VIN_set_S_InputConfig_data_width(U8 data)
  863. {
  864. GH_VIN_S_INPUTCONFIG_S d;
  865. d.all = *(volatile U32 *)REG_VIN_S_INPUTCONFIG;
  866. d.bitc.data_width = data;
  867. *(volatile U32 *)REG_VIN_S_INPUTCONFIG = d.all;
  868. #if GH_VIN_ENABLE_DEBUG_PRINT
  869. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_InputConfig_data_width] <-- 0x%08x\n",
  870. REG_VIN_S_INPUTCONFIG,d.all,d.all);
  871. #endif
  872. }
  873. GH_INLINE U8 GH_VIN_get_S_InputConfig_data_width(void)
  874. {
  875. GH_VIN_S_INPUTCONFIG_S tmp_value;
  876. U32 value = (*(volatile U32 *)REG_VIN_S_INPUTCONFIG);
  877. tmp_value.all = value;
  878. #if GH_VIN_ENABLE_DEBUG_PRINT
  879. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_InputConfig_data_width] --> 0x%08x\n",
  880. REG_VIN_S_INPUTCONFIG,value);
  881. #endif
  882. return tmp_value.bitc.data_width;
  883. }
  884. GH_INLINE void GH_VIN_set_S_InputConfig_input_source(U8 data)
  885. {
  886. GH_VIN_S_INPUTCONFIG_S d;
  887. d.all = *(volatile U32 *)REG_VIN_S_INPUTCONFIG;
  888. d.bitc.input_source = data;
  889. *(volatile U32 *)REG_VIN_S_INPUTCONFIG = d.all;
  890. #if GH_VIN_ENABLE_DEBUG_PRINT
  891. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_InputConfig_input_source] <-- 0x%08x\n",
  892. REG_VIN_S_INPUTCONFIG,d.all,d.all);
  893. #endif
  894. }
  895. GH_INLINE U8 GH_VIN_get_S_InputConfig_input_source(void)
  896. {
  897. GH_VIN_S_INPUTCONFIG_S tmp_value;
  898. U32 value = (*(volatile U32 *)REG_VIN_S_INPUTCONFIG);
  899. tmp_value.all = value;
  900. #if GH_VIN_ENABLE_DEBUG_PRINT
  901. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_InputConfig_input_source] --> 0x%08x\n",
  902. REG_VIN_S_INPUTCONFIG,value);
  903. #endif
  904. return tmp_value.bitc.input_source;
  905. }
  906. GH_INLINE void GH_VIN_set_S_InputConfig_rgb_yuv(U8 data)
  907. {
  908. GH_VIN_S_INPUTCONFIG_S d;
  909. d.all = *(volatile U32 *)REG_VIN_S_INPUTCONFIG;
  910. d.bitc.rgb_yuv = data;
  911. *(volatile U32 *)REG_VIN_S_INPUTCONFIG = d.all;
  912. #if GH_VIN_ENABLE_DEBUG_PRINT
  913. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_InputConfig_rgb_yuv] <-- 0x%08x\n",
  914. REG_VIN_S_INPUTCONFIG,d.all,d.all);
  915. #endif
  916. }
  917. GH_INLINE U8 GH_VIN_get_S_InputConfig_rgb_yuv(void)
  918. {
  919. GH_VIN_S_INPUTCONFIG_S tmp_value;
  920. U32 value = (*(volatile U32 *)REG_VIN_S_INPUTCONFIG);
  921. tmp_value.all = value;
  922. #if GH_VIN_ENABLE_DEBUG_PRINT
  923. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_InputConfig_rgb_yuv] --> 0x%08x\n",
  924. REG_VIN_S_INPUTCONFIG,value);
  925. #endif
  926. return tmp_value.bitc.rgb_yuv;
  927. }
  928. GH_INLINE void GH_VIN_set_S_InputConfig_pixel_data_width(U8 data)
  929. {
  930. GH_VIN_S_INPUTCONFIG_S d;
  931. d.all = *(volatile U32 *)REG_VIN_S_INPUTCONFIG;
  932. d.bitc.pixel_data_width = data;
  933. *(volatile U32 *)REG_VIN_S_INPUTCONFIG = d.all;
  934. #if GH_VIN_ENABLE_DEBUG_PRINT
  935. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_InputConfig_pixel_data_width] <-- 0x%08x\n",
  936. REG_VIN_S_INPUTCONFIG,d.all,d.all);
  937. #endif
  938. }
  939. GH_INLINE U8 GH_VIN_get_S_InputConfig_pixel_data_width(void)
  940. {
  941. GH_VIN_S_INPUTCONFIG_S tmp_value;
  942. U32 value = (*(volatile U32 *)REG_VIN_S_INPUTCONFIG);
  943. tmp_value.all = value;
  944. #if GH_VIN_ENABLE_DEBUG_PRINT
  945. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_InputConfig_pixel_data_width] --> 0x%08x\n",
  946. REG_VIN_S_INPUTCONFIG,value);
  947. #endif
  948. return tmp_value.bitc.pixel_data_width;
  949. }
  950. GH_INLINE void GH_VIN_set_S_InputConfig_yuv_input_order(U8 data)
  951. {
  952. GH_VIN_S_INPUTCONFIG_S d;
  953. d.all = *(volatile U32 *)REG_VIN_S_INPUTCONFIG;
  954. d.bitc.yuv_input_order = data;
  955. *(volatile U32 *)REG_VIN_S_INPUTCONFIG = d.all;
  956. #if GH_VIN_ENABLE_DEBUG_PRINT
  957. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_InputConfig_yuv_input_order] <-- 0x%08x\n",
  958. REG_VIN_S_INPUTCONFIG,d.all,d.all);
  959. #endif
  960. }
  961. GH_INLINE U8 GH_VIN_get_S_InputConfig_yuv_input_order(void)
  962. {
  963. GH_VIN_S_INPUTCONFIG_S tmp_value;
  964. U32 value = (*(volatile U32 *)REG_VIN_S_INPUTCONFIG);
  965. tmp_value.all = value;
  966. #if GH_VIN_ENABLE_DEBUG_PRINT
  967. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_InputConfig_yuv_input_order] --> 0x%08x\n",
  968. REG_VIN_S_INPUTCONFIG,value);
  969. #endif
  970. return tmp_value.bitc.yuv_input_order;
  971. }
  972. GH_INLINE void GH_VIN_set_S_InputConfig_slvs_num_lanes(U8 data)
  973. {
  974. GH_VIN_S_INPUTCONFIG_S d;
  975. d.all = *(volatile U32 *)REG_VIN_S_INPUTCONFIG;
  976. d.bitc.slvs_num_lanes = data;
  977. *(volatile U32 *)REG_VIN_S_INPUTCONFIG = d.all;
  978. #if GH_VIN_ENABLE_DEBUG_PRINT
  979. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_InputConfig_slvs_num_lanes] <-- 0x%08x\n",
  980. REG_VIN_S_INPUTCONFIG,d.all,d.all);
  981. #endif
  982. }
  983. GH_INLINE U8 GH_VIN_get_S_InputConfig_slvs_num_lanes(void)
  984. {
  985. GH_VIN_S_INPUTCONFIG_S tmp_value;
  986. U32 value = (*(volatile U32 *)REG_VIN_S_INPUTCONFIG);
  987. tmp_value.all = value;
  988. #if GH_VIN_ENABLE_DEBUG_PRINT
  989. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_InputConfig_slvs_num_lanes] --> 0x%08x\n",
  990. REG_VIN_S_INPUTCONFIG,value);
  991. #endif
  992. return tmp_value.bitc.slvs_num_lanes;
  993. }
  994. GH_INLINE void GH_VIN_set_S_InputConfig_serial_sensor_interface_mode(U8 data)
  995. {
  996. GH_VIN_S_INPUTCONFIG_S d;
  997. d.all = *(volatile U32 *)REG_VIN_S_INPUTCONFIG;
  998. d.bitc.serial_sensor_interface_mode = data;
  999. *(volatile U32 *)REG_VIN_S_INPUTCONFIG = d.all;
  1000. #if GH_VIN_ENABLE_DEBUG_PRINT
  1001. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_InputConfig_serial_sensor_interface_mode] <-- 0x%08x\n",
  1002. REG_VIN_S_INPUTCONFIG,d.all,d.all);
  1003. #endif
  1004. }
  1005. GH_INLINE U8 GH_VIN_get_S_InputConfig_serial_sensor_interface_mode(void)
  1006. {
  1007. GH_VIN_S_INPUTCONFIG_S tmp_value;
  1008. U32 value = (*(volatile U32 *)REG_VIN_S_INPUTCONFIG);
  1009. tmp_value.all = value;
  1010. #if GH_VIN_ENABLE_DEBUG_PRINT
  1011. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_InputConfig_serial_sensor_interface_mode] --> 0x%08x\n",
  1012. REG_VIN_S_INPUTCONFIG,value);
  1013. #endif
  1014. return tmp_value.bitc.serial_sensor_interface_mode;
  1015. }
  1016. #endif /* GH_INLINE_LEVEL == 0 */
  1017. /*----------------------------------------------------------------------------*/
  1018. /* register VIN_S_Status (read/write) */
  1019. /*----------------------------------------------------------------------------*/
  1020. #if GH_INLINE_LEVEL == 0
  1021. /*! \brief Writes the register 'VIN_S_Status'. */
  1022. void GH_VIN_set_S_Status(U32 data);
  1023. /*! \brief Reads the register 'VIN_S_Status'. */
  1024. U32 GH_VIN_get_S_Status(void);
  1025. /*! \brief Writes the bit group 'vsync' of register 'VIN_S_Status'. */
  1026. void GH_VIN_set_S_Status_vsync(U8 data);
  1027. /*! \brief Reads the bit group 'vsync' of register 'VIN_S_Status'. */
  1028. U8 GH_VIN_get_S_Status_vsync(void);
  1029. /*! \brief Writes the bit group 'trig0' of register 'VIN_S_Status'. */
  1030. void GH_VIN_set_S_Status_trig0(U8 data);
  1031. /*! \brief Reads the bit group 'trig0' of register 'VIN_S_Status'. */
  1032. U8 GH_VIN_get_S_Status_trig0(void);
  1033. /*! \brief Writes the bit group 'trig1' of register 'VIN_S_Status'. */
  1034. void GH_VIN_set_S_Status_trig1(U8 data);
  1035. /*! \brief Reads the bit group 'trig1' of register 'VIN_S_Status'. */
  1036. U8 GH_VIN_get_S_Status_trig1(void);
  1037. /*! \brief Writes the bit group 'ovfl' of register 'VIN_S_Status'. */
  1038. void GH_VIN_set_S_Status_ovfl(U8 data);
  1039. /*! \brief Reads the bit group 'ovfl' of register 'VIN_S_Status'. */
  1040. U8 GH_VIN_get_S_Status_ovfl(void);
  1041. /*! \brief Writes the bit group 'shortl' of register 'VIN_S_Status'. */
  1042. void GH_VIN_set_S_Status_shortl(U8 data);
  1043. /*! \brief Reads the bit group 'shortl' of register 'VIN_S_Status'. */
  1044. U8 GH_VIN_get_S_Status_shortl(void);
  1045. /*! \brief Writes the bit group 'shortf' of register 'VIN_S_Status'. */
  1046. void GH_VIN_set_S_Status_shortf(U8 data);
  1047. /*! \brief Reads the bit group 'shortf' of register 'VIN_S_Status'. */
  1048. U8 GH_VIN_get_S_Status_shortf(void);
  1049. /*! \brief Writes the bit group 'field' of register 'VIN_S_Status'. */
  1050. void GH_VIN_set_S_Status_field(U8 data);
  1051. /*! \brief Reads the bit group 'field' of register 'VIN_S_Status'. */
  1052. U8 GH_VIN_get_S_Status_field(void);
  1053. /*! \brief Writes the bit group 'no_hsync_detected' of register 'VIN_S_Status'. */
  1054. void GH_VIN_set_S_Status_no_hsync_detected(U8 data);
  1055. /*! \brief Reads the bit group 'no_hsync_detected' of register 'VIN_S_Status'. */
  1056. U8 GH_VIN_get_S_Status_no_hsync_detected(void);
  1057. /*! \brief Writes the bit group 'no_vsync_detected' of register 'VIN_S_Status'. */
  1058. void GH_VIN_set_S_Status_no_vsync_detected(U8 data);
  1059. /*! \brief Reads the bit group 'no_vsync_detected' of register 'VIN_S_Status'. */
  1060. U8 GH_VIN_get_S_Status_no_vsync_detected(void);
  1061. /*! \brief Writes the bit group 'idsp_ahb_vsync' of register 'VIN_S_Status'. */
  1062. void GH_VIN_set_S_Status_idsp_ahb_vsync(U8 data);
  1063. /*! \brief Reads the bit group 'idsp_ahb_vsync' of register 'VIN_S_Status'. */
  1064. U8 GH_VIN_get_S_Status_idsp_ahb_vsync(void);
  1065. /*! \brief Writes the bit group 'idsp_ahb_mst_vsync' of register 'VIN_S_Status'. */
  1066. void GH_VIN_set_S_Status_idsp_ahb_mst_vsync(U8 data);
  1067. /*! \brief Reads the bit group 'idsp_ahb_mst_vsync' of register 'VIN_S_Status'. */
  1068. U8 GH_VIN_get_S_Status_idsp_ahb_mst_vsync(void);
  1069. /*! \brief Writes the bit group 'idsp_ahb_last_pixel' of register 'VIN_S_Status'. */
  1070. void GH_VIN_set_S_Status_idsp_ahb_last_pixel(U8 data);
  1071. /*! \brief Reads the bit group 'idsp_ahb_last_pixel' of register 'VIN_S_Status'. */
  1072. U8 GH_VIN_get_S_Status_idsp_ahb_last_pixel(void);
  1073. /*! \brief Writes the bit group 'ecc_uncorrectable' of register 'VIN_S_Status'. */
  1074. void GH_VIN_set_S_Status_ecc_uncorrectable(U8 data);
  1075. /*! \brief Reads the bit group 'ecc_uncorrectable' of register 'VIN_S_Status'. */
  1076. U8 GH_VIN_get_S_Status_ecc_uncorrectable(void);
  1077. /*! \brief Writes the bit group 'program_error' of register 'VIN_S_Status'. */
  1078. void GH_VIN_set_S_Status_program_error(U8 data);
  1079. /*! \brief Reads the bit group 'program_error' of register 'VIN_S_Status'. */
  1080. U8 GH_VIN_get_S_Status_program_error(void);
  1081. #else /* GH_INLINE_LEVEL == 0 */
  1082. GH_INLINE void GH_VIN_set_S_Status(U32 data)
  1083. {
  1084. *(volatile U32 *)REG_VIN_S_STATUS = data;
  1085. #if GH_VIN_ENABLE_DEBUG_PRINT
  1086. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Status] <-- 0x%08x\n",
  1087. REG_VIN_S_STATUS,data,data);
  1088. #endif
  1089. }
  1090. GH_INLINE U32 GH_VIN_get_S_Status(void)
  1091. {
  1092. U32 value = (*(volatile U32 *)REG_VIN_S_STATUS);
  1093. #if GH_VIN_ENABLE_DEBUG_PRINT
  1094. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Status] --> 0x%08x\n",
  1095. REG_VIN_S_STATUS,value);
  1096. #endif
  1097. return value;
  1098. }
  1099. GH_INLINE void GH_VIN_set_S_Status_vsync(U8 data)
  1100. {
  1101. GH_VIN_S_STATUS_S d;
  1102. d.all = *(volatile U32 *)REG_VIN_S_STATUS;
  1103. d.bitc.vsync = data;
  1104. *(volatile U32 *)REG_VIN_S_STATUS = d.all;
  1105. #if GH_VIN_ENABLE_DEBUG_PRINT
  1106. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Status_vsync] <-- 0x%08x\n",
  1107. REG_VIN_S_STATUS,d.all,d.all);
  1108. #endif
  1109. }
  1110. GH_INLINE U8 GH_VIN_get_S_Status_vsync(void)
  1111. {
  1112. GH_VIN_S_STATUS_S tmp_value;
  1113. U32 value = (*(volatile U32 *)REG_VIN_S_STATUS);
  1114. tmp_value.all = value;
  1115. #if GH_VIN_ENABLE_DEBUG_PRINT
  1116. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Status_vsync] --> 0x%08x\n",
  1117. REG_VIN_S_STATUS,value);
  1118. #endif
  1119. return tmp_value.bitc.vsync;
  1120. }
  1121. GH_INLINE void GH_VIN_set_S_Status_trig0(U8 data)
  1122. {
  1123. GH_VIN_S_STATUS_S d;
  1124. d.all = *(volatile U32 *)REG_VIN_S_STATUS;
  1125. d.bitc.trig0 = data;
  1126. *(volatile U32 *)REG_VIN_S_STATUS = d.all;
  1127. #if GH_VIN_ENABLE_DEBUG_PRINT
  1128. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Status_trig0] <-- 0x%08x\n",
  1129. REG_VIN_S_STATUS,d.all,d.all);
  1130. #endif
  1131. }
  1132. GH_INLINE U8 GH_VIN_get_S_Status_trig0(void)
  1133. {
  1134. GH_VIN_S_STATUS_S tmp_value;
  1135. U32 value = (*(volatile U32 *)REG_VIN_S_STATUS);
  1136. tmp_value.all = value;
  1137. #if GH_VIN_ENABLE_DEBUG_PRINT
  1138. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Status_trig0] --> 0x%08x\n",
  1139. REG_VIN_S_STATUS,value);
  1140. #endif
  1141. return tmp_value.bitc.trig0;
  1142. }
  1143. GH_INLINE void GH_VIN_set_S_Status_trig1(U8 data)
  1144. {
  1145. GH_VIN_S_STATUS_S d;
  1146. d.all = *(volatile U32 *)REG_VIN_S_STATUS;
  1147. d.bitc.trig1 = data;
  1148. *(volatile U32 *)REG_VIN_S_STATUS = d.all;
  1149. #if GH_VIN_ENABLE_DEBUG_PRINT
  1150. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Status_trig1] <-- 0x%08x\n",
  1151. REG_VIN_S_STATUS,d.all,d.all);
  1152. #endif
  1153. }
  1154. GH_INLINE U8 GH_VIN_get_S_Status_trig1(void)
  1155. {
  1156. GH_VIN_S_STATUS_S tmp_value;
  1157. U32 value = (*(volatile U32 *)REG_VIN_S_STATUS);
  1158. tmp_value.all = value;
  1159. #if GH_VIN_ENABLE_DEBUG_PRINT
  1160. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Status_trig1] --> 0x%08x\n",
  1161. REG_VIN_S_STATUS,value);
  1162. #endif
  1163. return tmp_value.bitc.trig1;
  1164. }
  1165. GH_INLINE void GH_VIN_set_S_Status_ovfl(U8 data)
  1166. {
  1167. GH_VIN_S_STATUS_S d;
  1168. d.all = *(volatile U32 *)REG_VIN_S_STATUS;
  1169. d.bitc.ovfl = data;
  1170. *(volatile U32 *)REG_VIN_S_STATUS = d.all;
  1171. #if GH_VIN_ENABLE_DEBUG_PRINT
  1172. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Status_ovfl] <-- 0x%08x\n",
  1173. REG_VIN_S_STATUS,d.all,d.all);
  1174. #endif
  1175. }
  1176. GH_INLINE U8 GH_VIN_get_S_Status_ovfl(void)
  1177. {
  1178. GH_VIN_S_STATUS_S tmp_value;
  1179. U32 value = (*(volatile U32 *)REG_VIN_S_STATUS);
  1180. tmp_value.all = value;
  1181. #if GH_VIN_ENABLE_DEBUG_PRINT
  1182. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Status_ovfl] --> 0x%08x\n",
  1183. REG_VIN_S_STATUS,value);
  1184. #endif
  1185. return tmp_value.bitc.ovfl;
  1186. }
  1187. GH_INLINE void GH_VIN_set_S_Status_shortl(U8 data)
  1188. {
  1189. GH_VIN_S_STATUS_S d;
  1190. d.all = *(volatile U32 *)REG_VIN_S_STATUS;
  1191. d.bitc.shortl = data;
  1192. *(volatile U32 *)REG_VIN_S_STATUS = d.all;
  1193. #if GH_VIN_ENABLE_DEBUG_PRINT
  1194. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Status_shortl] <-- 0x%08x\n",
  1195. REG_VIN_S_STATUS,d.all,d.all);
  1196. #endif
  1197. }
  1198. GH_INLINE U8 GH_VIN_get_S_Status_shortl(void)
  1199. {
  1200. GH_VIN_S_STATUS_S tmp_value;
  1201. U32 value = (*(volatile U32 *)REG_VIN_S_STATUS);
  1202. tmp_value.all = value;
  1203. #if GH_VIN_ENABLE_DEBUG_PRINT
  1204. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Status_shortl] --> 0x%08x\n",
  1205. REG_VIN_S_STATUS,value);
  1206. #endif
  1207. return tmp_value.bitc.shortl;
  1208. }
  1209. GH_INLINE void GH_VIN_set_S_Status_shortf(U8 data)
  1210. {
  1211. GH_VIN_S_STATUS_S d;
  1212. d.all = *(volatile U32 *)REG_VIN_S_STATUS;
  1213. d.bitc.shortf = data;
  1214. *(volatile U32 *)REG_VIN_S_STATUS = d.all;
  1215. #if GH_VIN_ENABLE_DEBUG_PRINT
  1216. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Status_shortf] <-- 0x%08x\n",
  1217. REG_VIN_S_STATUS,d.all,d.all);
  1218. #endif
  1219. }
  1220. GH_INLINE U8 GH_VIN_get_S_Status_shortf(void)
  1221. {
  1222. GH_VIN_S_STATUS_S tmp_value;
  1223. U32 value = (*(volatile U32 *)REG_VIN_S_STATUS);
  1224. tmp_value.all = value;
  1225. #if GH_VIN_ENABLE_DEBUG_PRINT
  1226. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Status_shortf] --> 0x%08x\n",
  1227. REG_VIN_S_STATUS,value);
  1228. #endif
  1229. return tmp_value.bitc.shortf;
  1230. }
  1231. GH_INLINE void GH_VIN_set_S_Status_field(U8 data)
  1232. {
  1233. GH_VIN_S_STATUS_S d;
  1234. d.all = *(volatile U32 *)REG_VIN_S_STATUS;
  1235. d.bitc.field = data;
  1236. *(volatile U32 *)REG_VIN_S_STATUS = d.all;
  1237. #if GH_VIN_ENABLE_DEBUG_PRINT
  1238. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Status_field] <-- 0x%08x\n",
  1239. REG_VIN_S_STATUS,d.all,d.all);
  1240. #endif
  1241. }
  1242. GH_INLINE U8 GH_VIN_get_S_Status_field(void)
  1243. {
  1244. GH_VIN_S_STATUS_S tmp_value;
  1245. U32 value = (*(volatile U32 *)REG_VIN_S_STATUS);
  1246. tmp_value.all = value;
  1247. #if GH_VIN_ENABLE_DEBUG_PRINT
  1248. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Status_field] --> 0x%08x\n",
  1249. REG_VIN_S_STATUS,value);
  1250. #endif
  1251. return tmp_value.bitc.field;
  1252. }
  1253. GH_INLINE void GH_VIN_set_S_Status_no_hsync_detected(U8 data)
  1254. {
  1255. GH_VIN_S_STATUS_S d;
  1256. d.all = *(volatile U32 *)REG_VIN_S_STATUS;
  1257. d.bitc.no_hsync_detected = data;
  1258. *(volatile U32 *)REG_VIN_S_STATUS = d.all;
  1259. #if GH_VIN_ENABLE_DEBUG_PRINT
  1260. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Status_no_hsync_detected] <-- 0x%08x\n",
  1261. REG_VIN_S_STATUS,d.all,d.all);
  1262. #endif
  1263. }
  1264. GH_INLINE U8 GH_VIN_get_S_Status_no_hsync_detected(void)
  1265. {
  1266. GH_VIN_S_STATUS_S tmp_value;
  1267. U32 value = (*(volatile U32 *)REG_VIN_S_STATUS);
  1268. tmp_value.all = value;
  1269. #if GH_VIN_ENABLE_DEBUG_PRINT
  1270. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Status_no_hsync_detected] --> 0x%08x\n",
  1271. REG_VIN_S_STATUS,value);
  1272. #endif
  1273. return tmp_value.bitc.no_hsync_detected;
  1274. }
  1275. GH_INLINE void GH_VIN_set_S_Status_no_vsync_detected(U8 data)
  1276. {
  1277. GH_VIN_S_STATUS_S d;
  1278. d.all = *(volatile U32 *)REG_VIN_S_STATUS;
  1279. d.bitc.no_vsync_detected = data;
  1280. *(volatile U32 *)REG_VIN_S_STATUS = d.all;
  1281. #if GH_VIN_ENABLE_DEBUG_PRINT
  1282. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Status_no_vsync_detected] <-- 0x%08x\n",
  1283. REG_VIN_S_STATUS,d.all,d.all);
  1284. #endif
  1285. }
  1286. GH_INLINE U8 GH_VIN_get_S_Status_no_vsync_detected(void)
  1287. {
  1288. GH_VIN_S_STATUS_S tmp_value;
  1289. U32 value = (*(volatile U32 *)REG_VIN_S_STATUS);
  1290. tmp_value.all = value;
  1291. #if GH_VIN_ENABLE_DEBUG_PRINT
  1292. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Status_no_vsync_detected] --> 0x%08x\n",
  1293. REG_VIN_S_STATUS,value);
  1294. #endif
  1295. return tmp_value.bitc.no_vsync_detected;
  1296. }
  1297. GH_INLINE void GH_VIN_set_S_Status_idsp_ahb_vsync(U8 data)
  1298. {
  1299. GH_VIN_S_STATUS_S d;
  1300. d.all = *(volatile U32 *)REG_VIN_S_STATUS;
  1301. d.bitc.idsp_ahb_vsync = data;
  1302. *(volatile U32 *)REG_VIN_S_STATUS = d.all;
  1303. #if GH_VIN_ENABLE_DEBUG_PRINT
  1304. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Status_idsp_ahb_vsync] <-- 0x%08x\n",
  1305. REG_VIN_S_STATUS,d.all,d.all);
  1306. #endif
  1307. }
  1308. GH_INLINE U8 GH_VIN_get_S_Status_idsp_ahb_vsync(void)
  1309. {
  1310. GH_VIN_S_STATUS_S tmp_value;
  1311. U32 value = (*(volatile U32 *)REG_VIN_S_STATUS);
  1312. tmp_value.all = value;
  1313. #if GH_VIN_ENABLE_DEBUG_PRINT
  1314. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Status_idsp_ahb_vsync] --> 0x%08x\n",
  1315. REG_VIN_S_STATUS,value);
  1316. #endif
  1317. return tmp_value.bitc.idsp_ahb_vsync;
  1318. }
  1319. GH_INLINE void GH_VIN_set_S_Status_idsp_ahb_mst_vsync(U8 data)
  1320. {
  1321. GH_VIN_S_STATUS_S d;
  1322. d.all = *(volatile U32 *)REG_VIN_S_STATUS;
  1323. d.bitc.idsp_ahb_mst_vsync = data;
  1324. *(volatile U32 *)REG_VIN_S_STATUS = d.all;
  1325. #if GH_VIN_ENABLE_DEBUG_PRINT
  1326. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Status_idsp_ahb_mst_vsync] <-- 0x%08x\n",
  1327. REG_VIN_S_STATUS,d.all,d.all);
  1328. #endif
  1329. }
  1330. GH_INLINE U8 GH_VIN_get_S_Status_idsp_ahb_mst_vsync(void)
  1331. {
  1332. GH_VIN_S_STATUS_S tmp_value;
  1333. U32 value = (*(volatile U32 *)REG_VIN_S_STATUS);
  1334. tmp_value.all = value;
  1335. #if GH_VIN_ENABLE_DEBUG_PRINT
  1336. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Status_idsp_ahb_mst_vsync] --> 0x%08x\n",
  1337. REG_VIN_S_STATUS,value);
  1338. #endif
  1339. return tmp_value.bitc.idsp_ahb_mst_vsync;
  1340. }
  1341. GH_INLINE void GH_VIN_set_S_Status_idsp_ahb_last_pixel(U8 data)
  1342. {
  1343. GH_VIN_S_STATUS_S d;
  1344. d.all = *(volatile U32 *)REG_VIN_S_STATUS;
  1345. d.bitc.idsp_ahb_last_pixel = data;
  1346. *(volatile U32 *)REG_VIN_S_STATUS = d.all;
  1347. #if GH_VIN_ENABLE_DEBUG_PRINT
  1348. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Status_idsp_ahb_last_pixel] <-- 0x%08x\n",
  1349. REG_VIN_S_STATUS,d.all,d.all);
  1350. #endif
  1351. }
  1352. GH_INLINE U8 GH_VIN_get_S_Status_idsp_ahb_last_pixel(void)
  1353. {
  1354. GH_VIN_S_STATUS_S tmp_value;
  1355. U32 value = (*(volatile U32 *)REG_VIN_S_STATUS);
  1356. tmp_value.all = value;
  1357. #if GH_VIN_ENABLE_DEBUG_PRINT
  1358. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Status_idsp_ahb_last_pixel] --> 0x%08x\n",
  1359. REG_VIN_S_STATUS,value);
  1360. #endif
  1361. return tmp_value.bitc.idsp_ahb_last_pixel;
  1362. }
  1363. GH_INLINE void GH_VIN_set_S_Status_ecc_uncorrectable(U8 data)
  1364. {
  1365. GH_VIN_S_STATUS_S d;
  1366. d.all = *(volatile U32 *)REG_VIN_S_STATUS;
  1367. d.bitc.ecc_uncorrectable = data;
  1368. *(volatile U32 *)REG_VIN_S_STATUS = d.all;
  1369. #if GH_VIN_ENABLE_DEBUG_PRINT
  1370. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Status_ecc_uncorrectable] <-- 0x%08x\n",
  1371. REG_VIN_S_STATUS,d.all,d.all);
  1372. #endif
  1373. }
  1374. GH_INLINE U8 GH_VIN_get_S_Status_ecc_uncorrectable(void)
  1375. {
  1376. GH_VIN_S_STATUS_S tmp_value;
  1377. U32 value = (*(volatile U32 *)REG_VIN_S_STATUS);
  1378. tmp_value.all = value;
  1379. #if GH_VIN_ENABLE_DEBUG_PRINT
  1380. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Status_ecc_uncorrectable] --> 0x%08x\n",
  1381. REG_VIN_S_STATUS,value);
  1382. #endif
  1383. return tmp_value.bitc.ecc_uncorrectable;
  1384. }
  1385. GH_INLINE void GH_VIN_set_S_Status_program_error(U8 data)
  1386. {
  1387. GH_VIN_S_STATUS_S d;
  1388. d.all = *(volatile U32 *)REG_VIN_S_STATUS;
  1389. d.bitc.program_error = data;
  1390. *(volatile U32 *)REG_VIN_S_STATUS = d.all;
  1391. #if GH_VIN_ENABLE_DEBUG_PRINT
  1392. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Status_program_error] <-- 0x%08x\n",
  1393. REG_VIN_S_STATUS,d.all,d.all);
  1394. #endif
  1395. }
  1396. GH_INLINE U8 GH_VIN_get_S_Status_program_error(void)
  1397. {
  1398. GH_VIN_S_STATUS_S tmp_value;
  1399. U32 value = (*(volatile U32 *)REG_VIN_S_STATUS);
  1400. tmp_value.all = value;
  1401. #if GH_VIN_ENABLE_DEBUG_PRINT
  1402. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Status_program_error] --> 0x%08x\n",
  1403. REG_VIN_S_STATUS,value);
  1404. #endif
  1405. return tmp_value.bitc.program_error;
  1406. }
  1407. #endif /* GH_INLINE_LEVEL == 0 */
  1408. /*----------------------------------------------------------------------------*/
  1409. /* register VIN_S_Vwidth (read/write) */
  1410. /*----------------------------------------------------------------------------*/
  1411. #if GH_INLINE_LEVEL == 0
  1412. /*! \brief Writes the register 'VIN_S_Vwidth'. */
  1413. void GH_VIN_set_S_Vwidth(U32 data);
  1414. /*! \brief Reads the register 'VIN_S_Vwidth'. */
  1415. U32 GH_VIN_get_S_Vwidth(void);
  1416. /*! \brief Writes the bit group 'vsync_width' of register 'VIN_S_Vwidth'. */
  1417. void GH_VIN_set_S_Vwidth_vsync_width(U16 data);
  1418. /*! \brief Reads the bit group 'vsync_width' of register 'VIN_S_Vwidth'. */
  1419. U16 GH_VIN_get_S_Vwidth_vsync_width(void);
  1420. #else /* GH_INLINE_LEVEL == 0 */
  1421. GH_INLINE void GH_VIN_set_S_Vwidth(U32 data)
  1422. {
  1423. *(volatile U32 *)REG_VIN_S_VWIDTH = data;
  1424. #if GH_VIN_ENABLE_DEBUG_PRINT
  1425. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Vwidth] <-- 0x%08x\n",
  1426. REG_VIN_S_VWIDTH,data,data);
  1427. #endif
  1428. }
  1429. GH_INLINE U32 GH_VIN_get_S_Vwidth(void)
  1430. {
  1431. U32 value = (*(volatile U32 *)REG_VIN_S_VWIDTH);
  1432. #if GH_VIN_ENABLE_DEBUG_PRINT
  1433. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Vwidth] --> 0x%08x\n",
  1434. REG_VIN_S_VWIDTH,value);
  1435. #endif
  1436. return value;
  1437. }
  1438. GH_INLINE void GH_VIN_set_S_Vwidth_vsync_width(U16 data)
  1439. {
  1440. GH_VIN_S_VWIDTH_S d;
  1441. d.all = *(volatile U32 *)REG_VIN_S_VWIDTH;
  1442. d.bitc.vsync_width = data;
  1443. *(volatile U32 *)REG_VIN_S_VWIDTH = d.all;
  1444. #if GH_VIN_ENABLE_DEBUG_PRINT
  1445. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Vwidth_vsync_width] <-- 0x%08x\n",
  1446. REG_VIN_S_VWIDTH,d.all,d.all);
  1447. #endif
  1448. }
  1449. GH_INLINE U16 GH_VIN_get_S_Vwidth_vsync_width(void)
  1450. {
  1451. GH_VIN_S_VWIDTH_S tmp_value;
  1452. U32 value = (*(volatile U32 *)REG_VIN_S_VWIDTH);
  1453. tmp_value.all = value;
  1454. #if GH_VIN_ENABLE_DEBUG_PRINT
  1455. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Vwidth_vsync_width] --> 0x%08x\n",
  1456. REG_VIN_S_VWIDTH,value);
  1457. #endif
  1458. return tmp_value.bitc.vsync_width;
  1459. }
  1460. #endif /* GH_INLINE_LEVEL == 0 */
  1461. /*----------------------------------------------------------------------------*/
  1462. /* register VIN_S_Hwidth (read/write) */
  1463. /*----------------------------------------------------------------------------*/
  1464. #if GH_INLINE_LEVEL == 0
  1465. /*! \brief Writes the register 'VIN_S_Hwidth'. */
  1466. void GH_VIN_set_S_Hwidth(U32 data);
  1467. /*! \brief Reads the register 'VIN_S_Hwidth'. */
  1468. U32 GH_VIN_get_S_Hwidth(void);
  1469. /*! \brief Writes the bit group 'hsync_width' of register 'VIN_S_Hwidth'. */
  1470. void GH_VIN_set_S_Hwidth_hsync_width(U16 data);
  1471. /*! \brief Reads the bit group 'hsync_width' of register 'VIN_S_Hwidth'. */
  1472. U16 GH_VIN_get_S_Hwidth_hsync_width(void);
  1473. #else /* GH_INLINE_LEVEL == 0 */
  1474. GH_INLINE void GH_VIN_set_S_Hwidth(U32 data)
  1475. {
  1476. *(volatile U32 *)REG_VIN_S_HWIDTH = data;
  1477. #if GH_VIN_ENABLE_DEBUG_PRINT
  1478. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Hwidth] <-- 0x%08x\n",
  1479. REG_VIN_S_HWIDTH,data,data);
  1480. #endif
  1481. }
  1482. GH_INLINE U32 GH_VIN_get_S_Hwidth(void)
  1483. {
  1484. U32 value = (*(volatile U32 *)REG_VIN_S_HWIDTH);
  1485. #if GH_VIN_ENABLE_DEBUG_PRINT
  1486. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Hwidth] --> 0x%08x\n",
  1487. REG_VIN_S_HWIDTH,value);
  1488. #endif
  1489. return value;
  1490. }
  1491. GH_INLINE void GH_VIN_set_S_Hwidth_hsync_width(U16 data)
  1492. {
  1493. GH_VIN_S_HWIDTH_S d;
  1494. d.all = *(volatile U32 *)REG_VIN_S_HWIDTH;
  1495. d.bitc.hsync_width = data;
  1496. *(volatile U32 *)REG_VIN_S_HWIDTH = d.all;
  1497. #if GH_VIN_ENABLE_DEBUG_PRINT
  1498. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Hwidth_hsync_width] <-- 0x%08x\n",
  1499. REG_VIN_S_HWIDTH,d.all,d.all);
  1500. #endif
  1501. }
  1502. GH_INLINE U16 GH_VIN_get_S_Hwidth_hsync_width(void)
  1503. {
  1504. GH_VIN_S_HWIDTH_S tmp_value;
  1505. U32 value = (*(volatile U32 *)REG_VIN_S_HWIDTH);
  1506. tmp_value.all = value;
  1507. #if GH_VIN_ENABLE_DEBUG_PRINT
  1508. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Hwidth_hsync_width] --> 0x%08x\n",
  1509. REG_VIN_S_HWIDTH,value);
  1510. #endif
  1511. return tmp_value.bitc.hsync_width;
  1512. }
  1513. #endif /* GH_INLINE_LEVEL == 0 */
  1514. /*----------------------------------------------------------------------------*/
  1515. /* register VIN_S_Htop (read/write) */
  1516. /*----------------------------------------------------------------------------*/
  1517. #if GH_INLINE_LEVEL == 0
  1518. /*! \brief Writes the register 'VIN_S_Htop'. */
  1519. void GH_VIN_set_S_Htop(U32 data);
  1520. /*! \brief Reads the register 'VIN_S_Htop'. */
  1521. U32 GH_VIN_get_S_Htop(void);
  1522. /*! \brief Writes the bit group 'hsync_top' of register 'VIN_S_Htop'. */
  1523. void GH_VIN_set_S_Htop_hsync_top(U16 data);
  1524. /*! \brief Reads the bit group 'hsync_top' of register 'VIN_S_Htop'. */
  1525. U16 GH_VIN_get_S_Htop_hsync_top(void);
  1526. #else /* GH_INLINE_LEVEL == 0 */
  1527. GH_INLINE void GH_VIN_set_S_Htop(U32 data)
  1528. {
  1529. *(volatile U32 *)REG_VIN_S_HTOP = data;
  1530. #if GH_VIN_ENABLE_DEBUG_PRINT
  1531. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Htop] <-- 0x%08x\n",
  1532. REG_VIN_S_HTOP,data,data);
  1533. #endif
  1534. }
  1535. GH_INLINE U32 GH_VIN_get_S_Htop(void)
  1536. {
  1537. U32 value = (*(volatile U32 *)REG_VIN_S_HTOP);
  1538. #if GH_VIN_ENABLE_DEBUG_PRINT
  1539. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Htop] --> 0x%08x\n",
  1540. REG_VIN_S_HTOP,value);
  1541. #endif
  1542. return value;
  1543. }
  1544. GH_INLINE void GH_VIN_set_S_Htop_hsync_top(U16 data)
  1545. {
  1546. GH_VIN_S_HTOP_S d;
  1547. d.all = *(volatile U32 *)REG_VIN_S_HTOP;
  1548. d.bitc.hsync_top = data;
  1549. *(volatile U32 *)REG_VIN_S_HTOP = d.all;
  1550. #if GH_VIN_ENABLE_DEBUG_PRINT
  1551. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Htop_hsync_top] <-- 0x%08x\n",
  1552. REG_VIN_S_HTOP,d.all,d.all);
  1553. #endif
  1554. }
  1555. GH_INLINE U16 GH_VIN_get_S_Htop_hsync_top(void)
  1556. {
  1557. GH_VIN_S_HTOP_S tmp_value;
  1558. U32 value = (*(volatile U32 *)REG_VIN_S_HTOP);
  1559. tmp_value.all = value;
  1560. #if GH_VIN_ENABLE_DEBUG_PRINT
  1561. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Htop_hsync_top] --> 0x%08x\n",
  1562. REG_VIN_S_HTOP,value);
  1563. #endif
  1564. return tmp_value.bitc.hsync_top;
  1565. }
  1566. #endif /* GH_INLINE_LEVEL == 0 */
  1567. /*----------------------------------------------------------------------------*/
  1568. /* register VIN_S_Hbottom (read/write) */
  1569. /*----------------------------------------------------------------------------*/
  1570. #if GH_INLINE_LEVEL == 0
  1571. /*! \brief Writes the register 'VIN_S_Hbottom'. */
  1572. void GH_VIN_set_S_Hbottom(U32 data);
  1573. /*! \brief Reads the register 'VIN_S_Hbottom'. */
  1574. U32 GH_VIN_get_S_Hbottom(void);
  1575. /*! \brief Writes the bit group 'hsync_bottom' of register 'VIN_S_Hbottom'. */
  1576. void GH_VIN_set_S_Hbottom_hsync_bottom(U16 data);
  1577. /*! \brief Reads the bit group 'hsync_bottom' of register 'VIN_S_Hbottom'. */
  1578. U16 GH_VIN_get_S_Hbottom_hsync_bottom(void);
  1579. #else /* GH_INLINE_LEVEL == 0 */
  1580. GH_INLINE void GH_VIN_set_S_Hbottom(U32 data)
  1581. {
  1582. *(volatile U32 *)REG_VIN_S_HBOTTOM = data;
  1583. #if GH_VIN_ENABLE_DEBUG_PRINT
  1584. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Hbottom] <-- 0x%08x\n",
  1585. REG_VIN_S_HBOTTOM,data,data);
  1586. #endif
  1587. }
  1588. GH_INLINE U32 GH_VIN_get_S_Hbottom(void)
  1589. {
  1590. U32 value = (*(volatile U32 *)REG_VIN_S_HBOTTOM);
  1591. #if GH_VIN_ENABLE_DEBUG_PRINT
  1592. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Hbottom] --> 0x%08x\n",
  1593. REG_VIN_S_HBOTTOM,value);
  1594. #endif
  1595. return value;
  1596. }
  1597. GH_INLINE void GH_VIN_set_S_Hbottom_hsync_bottom(U16 data)
  1598. {
  1599. GH_VIN_S_HBOTTOM_S d;
  1600. d.all = *(volatile U32 *)REG_VIN_S_HBOTTOM;
  1601. d.bitc.hsync_bottom = data;
  1602. *(volatile U32 *)REG_VIN_S_HBOTTOM = d.all;
  1603. #if GH_VIN_ENABLE_DEBUG_PRINT
  1604. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Hbottom_hsync_bottom] <-- 0x%08x\n",
  1605. REG_VIN_S_HBOTTOM,d.all,d.all);
  1606. #endif
  1607. }
  1608. GH_INLINE U16 GH_VIN_get_S_Hbottom_hsync_bottom(void)
  1609. {
  1610. GH_VIN_S_HBOTTOM_S tmp_value;
  1611. U32 value = (*(volatile U32 *)REG_VIN_S_HBOTTOM);
  1612. tmp_value.all = value;
  1613. #if GH_VIN_ENABLE_DEBUG_PRINT
  1614. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Hbottom_hsync_bottom] --> 0x%08x\n",
  1615. REG_VIN_S_HBOTTOM,value);
  1616. #endif
  1617. return tmp_value.bitc.hsync_bottom;
  1618. }
  1619. #endif /* GH_INLINE_LEVEL == 0 */
  1620. /*----------------------------------------------------------------------------*/
  1621. /* register VIN_S_V (read/write) */
  1622. /*----------------------------------------------------------------------------*/
  1623. #if GH_INLINE_LEVEL == 0
  1624. /*! \brief Writes the register 'VIN_S_V'. */
  1625. void GH_VIN_set_S_V(U32 data);
  1626. /*! \brief Reads the register 'VIN_S_V'. */
  1627. U32 GH_VIN_get_S_V(void);
  1628. /*! \brief Writes the bit group 'num_lines' of register 'VIN_S_V'. */
  1629. void GH_VIN_set_S_V_num_lines(U16 data);
  1630. /*! \brief Reads the bit group 'num_lines' of register 'VIN_S_V'. */
  1631. U16 GH_VIN_get_S_V_num_lines(void);
  1632. #else /* GH_INLINE_LEVEL == 0 */
  1633. GH_INLINE void GH_VIN_set_S_V(U32 data)
  1634. {
  1635. *(volatile U32 *)REG_VIN_S_V = data;
  1636. #if GH_VIN_ENABLE_DEBUG_PRINT
  1637. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_V] <-- 0x%08x\n",
  1638. REG_VIN_S_V,data,data);
  1639. #endif
  1640. }
  1641. GH_INLINE U32 GH_VIN_get_S_V(void)
  1642. {
  1643. U32 value = (*(volatile U32 *)REG_VIN_S_V);
  1644. #if GH_VIN_ENABLE_DEBUG_PRINT
  1645. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_V] --> 0x%08x\n",
  1646. REG_VIN_S_V,value);
  1647. #endif
  1648. return value;
  1649. }
  1650. GH_INLINE void GH_VIN_set_S_V_num_lines(U16 data)
  1651. {
  1652. GH_VIN_S_V_S d;
  1653. d.all = *(volatile U32 *)REG_VIN_S_V;
  1654. d.bitc.num_lines = data;
  1655. *(volatile U32 *)REG_VIN_S_V = d.all;
  1656. #if GH_VIN_ENABLE_DEBUG_PRINT
  1657. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_V_num_lines] <-- 0x%08x\n",
  1658. REG_VIN_S_V,d.all,d.all);
  1659. #endif
  1660. }
  1661. GH_INLINE U16 GH_VIN_get_S_V_num_lines(void)
  1662. {
  1663. GH_VIN_S_V_S tmp_value;
  1664. U32 value = (*(volatile U32 *)REG_VIN_S_V);
  1665. tmp_value.all = value;
  1666. #if GH_VIN_ENABLE_DEBUG_PRINT
  1667. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_V_num_lines] --> 0x%08x\n",
  1668. REG_VIN_S_V,value);
  1669. #endif
  1670. return tmp_value.bitc.num_lines;
  1671. }
  1672. #endif /* GH_INLINE_LEVEL == 0 */
  1673. /*----------------------------------------------------------------------------*/
  1674. /* register VIN_S_H (read/write) */
  1675. /*----------------------------------------------------------------------------*/
  1676. #if GH_INLINE_LEVEL == 0
  1677. /*! \brief Writes the register 'VIN_S_H'. */
  1678. void GH_VIN_set_S_H(U32 data);
  1679. /*! \brief Reads the register 'VIN_S_H'. */
  1680. U32 GH_VIN_get_S_H(void);
  1681. /*! \brief Writes the bit group 'num_cols' of register 'VIN_S_H'. */
  1682. void GH_VIN_set_S_H_num_cols(U16 data);
  1683. /*! \brief Reads the bit group 'num_cols' of register 'VIN_S_H'. */
  1684. U16 GH_VIN_get_S_H_num_cols(void);
  1685. #else /* GH_INLINE_LEVEL == 0 */
  1686. GH_INLINE void GH_VIN_set_S_H(U32 data)
  1687. {
  1688. *(volatile U32 *)REG_VIN_S_H = data;
  1689. #if GH_VIN_ENABLE_DEBUG_PRINT
  1690. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_H] <-- 0x%08x\n",
  1691. REG_VIN_S_H,data,data);
  1692. #endif
  1693. }
  1694. GH_INLINE U32 GH_VIN_get_S_H(void)
  1695. {
  1696. U32 value = (*(volatile U32 *)REG_VIN_S_H);
  1697. #if GH_VIN_ENABLE_DEBUG_PRINT
  1698. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_H] --> 0x%08x\n",
  1699. REG_VIN_S_H,value);
  1700. #endif
  1701. return value;
  1702. }
  1703. GH_INLINE void GH_VIN_set_S_H_num_cols(U16 data)
  1704. {
  1705. GH_VIN_S_H_S d;
  1706. d.all = *(volatile U32 *)REG_VIN_S_H;
  1707. d.bitc.num_cols = data;
  1708. *(volatile U32 *)REG_VIN_S_H = d.all;
  1709. #if GH_VIN_ENABLE_DEBUG_PRINT
  1710. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_H_num_cols] <-- 0x%08x\n",
  1711. REG_VIN_S_H,d.all,d.all);
  1712. #endif
  1713. }
  1714. GH_INLINE U16 GH_VIN_get_S_H_num_cols(void)
  1715. {
  1716. GH_VIN_S_H_S tmp_value;
  1717. U32 value = (*(volatile U32 *)REG_VIN_S_H);
  1718. tmp_value.all = value;
  1719. #if GH_VIN_ENABLE_DEBUG_PRINT
  1720. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_H_num_cols] --> 0x%08x\n",
  1721. REG_VIN_S_H,value);
  1722. #endif
  1723. return tmp_value.bitc.num_cols;
  1724. }
  1725. #endif /* GH_INLINE_LEVEL == 0 */
  1726. /*----------------------------------------------------------------------------*/
  1727. /* register VIN_S_MinV (read/write) */
  1728. /*----------------------------------------------------------------------------*/
  1729. #if GH_INLINE_LEVEL == 0
  1730. /*! \brief Writes the register 'VIN_S_MinV'. */
  1731. void GH_VIN_set_S_MinV(U32 data);
  1732. /*! \brief Reads the register 'VIN_S_MinV'. */
  1733. U32 GH_VIN_get_S_MinV(void);
  1734. /*! \brief Writes the bit group 'min_num_lines' of register 'VIN_S_MinV'. */
  1735. void GH_VIN_set_S_MinV_min_num_lines(U16 data);
  1736. /*! \brief Reads the bit group 'min_num_lines' of register 'VIN_S_MinV'. */
  1737. U16 GH_VIN_get_S_MinV_min_num_lines(void);
  1738. #else /* GH_INLINE_LEVEL == 0 */
  1739. GH_INLINE void GH_VIN_set_S_MinV(U32 data)
  1740. {
  1741. *(volatile U32 *)REG_VIN_S_MINV = data;
  1742. #if GH_VIN_ENABLE_DEBUG_PRINT
  1743. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_MinV] <-- 0x%08x\n",
  1744. REG_VIN_S_MINV,data,data);
  1745. #endif
  1746. }
  1747. GH_INLINE U32 GH_VIN_get_S_MinV(void)
  1748. {
  1749. U32 value = (*(volatile U32 *)REG_VIN_S_MINV);
  1750. #if GH_VIN_ENABLE_DEBUG_PRINT
  1751. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_MinV] --> 0x%08x\n",
  1752. REG_VIN_S_MINV,value);
  1753. #endif
  1754. return value;
  1755. }
  1756. GH_INLINE void GH_VIN_set_S_MinV_min_num_lines(U16 data)
  1757. {
  1758. GH_VIN_S_MINV_S d;
  1759. d.all = *(volatile U32 *)REG_VIN_S_MINV;
  1760. d.bitc.min_num_lines = data;
  1761. *(volatile U32 *)REG_VIN_S_MINV = d.all;
  1762. #if GH_VIN_ENABLE_DEBUG_PRINT
  1763. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_MinV_min_num_lines] <-- 0x%08x\n",
  1764. REG_VIN_S_MINV,d.all,d.all);
  1765. #endif
  1766. }
  1767. GH_INLINE U16 GH_VIN_get_S_MinV_min_num_lines(void)
  1768. {
  1769. GH_VIN_S_MINV_S tmp_value;
  1770. U32 value = (*(volatile U32 *)REG_VIN_S_MINV);
  1771. tmp_value.all = value;
  1772. #if GH_VIN_ENABLE_DEBUG_PRINT
  1773. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_MinV_min_num_lines] --> 0x%08x\n",
  1774. REG_VIN_S_MINV,value);
  1775. #endif
  1776. return tmp_value.bitc.min_num_lines;
  1777. }
  1778. #endif /* GH_INLINE_LEVEL == 0 */
  1779. /*----------------------------------------------------------------------------*/
  1780. /* register VIN_S_MinH (read/write) */
  1781. /*----------------------------------------------------------------------------*/
  1782. #if GH_INLINE_LEVEL == 0
  1783. /*! \brief Writes the register 'VIN_S_MinH'. */
  1784. void GH_VIN_set_S_MinH(U32 data);
  1785. /*! \brief Reads the register 'VIN_S_MinH'. */
  1786. U32 GH_VIN_get_S_MinH(void);
  1787. /*! \brief Writes the bit group 'min_num_fields' of register 'VIN_S_MinH'. */
  1788. void GH_VIN_set_S_MinH_min_num_fields(U16 data);
  1789. /*! \brief Reads the bit group 'min_num_fields' of register 'VIN_S_MinH'. */
  1790. U16 GH_VIN_get_S_MinH_min_num_fields(void);
  1791. #else /* GH_INLINE_LEVEL == 0 */
  1792. GH_INLINE void GH_VIN_set_S_MinH(U32 data)
  1793. {
  1794. *(volatile U32 *)REG_VIN_S_MINH = data;
  1795. #if GH_VIN_ENABLE_DEBUG_PRINT
  1796. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_MinH] <-- 0x%08x\n",
  1797. REG_VIN_S_MINH,data,data);
  1798. #endif
  1799. }
  1800. GH_INLINE U32 GH_VIN_get_S_MinH(void)
  1801. {
  1802. U32 value = (*(volatile U32 *)REG_VIN_S_MINH);
  1803. #if GH_VIN_ENABLE_DEBUG_PRINT
  1804. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_MinH] --> 0x%08x\n",
  1805. REG_VIN_S_MINH,value);
  1806. #endif
  1807. return value;
  1808. }
  1809. GH_INLINE void GH_VIN_set_S_MinH_min_num_fields(U16 data)
  1810. {
  1811. GH_VIN_S_MINH_S d;
  1812. d.all = *(volatile U32 *)REG_VIN_S_MINH;
  1813. d.bitc.min_num_fields = data;
  1814. *(volatile U32 *)REG_VIN_S_MINH = d.all;
  1815. #if GH_VIN_ENABLE_DEBUG_PRINT
  1816. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_MinH_min_num_fields] <-- 0x%08x\n",
  1817. REG_VIN_S_MINH,d.all,d.all);
  1818. #endif
  1819. }
  1820. GH_INLINE U16 GH_VIN_get_S_MinH_min_num_fields(void)
  1821. {
  1822. GH_VIN_S_MINH_S tmp_value;
  1823. U32 value = (*(volatile U32 *)REG_VIN_S_MINH);
  1824. tmp_value.all = value;
  1825. #if GH_VIN_ENABLE_DEBUG_PRINT
  1826. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_MinH_min_num_fields] --> 0x%08x\n",
  1827. REG_VIN_S_MINH,value);
  1828. #endif
  1829. return tmp_value.bitc.min_num_fields;
  1830. }
  1831. #endif /* GH_INLINE_LEVEL == 0 */
  1832. /*----------------------------------------------------------------------------*/
  1833. /* register VIN_S_Trigger0Start (read/write) */
  1834. /*----------------------------------------------------------------------------*/
  1835. #if GH_INLINE_LEVEL == 0
  1836. /*! \brief Writes the register 'VIN_S_Trigger0Start'. */
  1837. void GH_VIN_set_S_Trigger0Start(U32 data);
  1838. /*! \brief Reads the register 'VIN_S_Trigger0Start'. */
  1839. U32 GH_VIN_get_S_Trigger0Start(void);
  1840. /*! \brief Writes the bit group 'startline' of register 'VIN_S_Trigger0Start'. */
  1841. void GH_VIN_set_S_Trigger0Start_startline(U16 data);
  1842. /*! \brief Reads the bit group 'startline' of register 'VIN_S_Trigger0Start'. */
  1843. U16 GH_VIN_get_S_Trigger0Start_startline(void);
  1844. /*! \brief Writes the bit group 'pol' of register 'VIN_S_Trigger0Start'. */
  1845. void GH_VIN_set_S_Trigger0Start_pol(U8 data);
  1846. /*! \brief Reads the bit group 'pol' of register 'VIN_S_Trigger0Start'. */
  1847. U8 GH_VIN_get_S_Trigger0Start_pol(void);
  1848. /*! \brief Writes the bit group 'enable' of register 'VIN_S_Trigger0Start'. */
  1849. void GH_VIN_set_S_Trigger0Start_enable(U8 data);
  1850. /*! \brief Reads the bit group 'enable' of register 'VIN_S_Trigger0Start'. */
  1851. U8 GH_VIN_get_S_Trigger0Start_enable(void);
  1852. #else /* GH_INLINE_LEVEL == 0 */
  1853. GH_INLINE void GH_VIN_set_S_Trigger0Start(U32 data)
  1854. {
  1855. *(volatile U32 *)REG_VIN_S_TRIGGER0START = data;
  1856. #if GH_VIN_ENABLE_DEBUG_PRINT
  1857. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Trigger0Start] <-- 0x%08x\n",
  1858. REG_VIN_S_TRIGGER0START,data,data);
  1859. #endif
  1860. }
  1861. GH_INLINE U32 GH_VIN_get_S_Trigger0Start(void)
  1862. {
  1863. U32 value = (*(volatile U32 *)REG_VIN_S_TRIGGER0START);
  1864. #if GH_VIN_ENABLE_DEBUG_PRINT
  1865. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Trigger0Start] --> 0x%08x\n",
  1866. REG_VIN_S_TRIGGER0START,value);
  1867. #endif
  1868. return value;
  1869. }
  1870. GH_INLINE void GH_VIN_set_S_Trigger0Start_startline(U16 data)
  1871. {
  1872. GH_VIN_S_TRIGGER0START_S d;
  1873. d.all = *(volatile U32 *)REG_VIN_S_TRIGGER0START;
  1874. d.bitc.startline = data;
  1875. *(volatile U32 *)REG_VIN_S_TRIGGER0START = d.all;
  1876. #if GH_VIN_ENABLE_DEBUG_PRINT
  1877. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Trigger0Start_startline] <-- 0x%08x\n",
  1878. REG_VIN_S_TRIGGER0START,d.all,d.all);
  1879. #endif
  1880. }
  1881. GH_INLINE U16 GH_VIN_get_S_Trigger0Start_startline(void)
  1882. {
  1883. GH_VIN_S_TRIGGER0START_S tmp_value;
  1884. U32 value = (*(volatile U32 *)REG_VIN_S_TRIGGER0START);
  1885. tmp_value.all = value;
  1886. #if GH_VIN_ENABLE_DEBUG_PRINT
  1887. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Trigger0Start_startline] --> 0x%08x\n",
  1888. REG_VIN_S_TRIGGER0START,value);
  1889. #endif
  1890. return tmp_value.bitc.startline;
  1891. }
  1892. GH_INLINE void GH_VIN_set_S_Trigger0Start_pol(U8 data)
  1893. {
  1894. GH_VIN_S_TRIGGER0START_S d;
  1895. d.all = *(volatile U32 *)REG_VIN_S_TRIGGER0START;
  1896. d.bitc.pol = data;
  1897. *(volatile U32 *)REG_VIN_S_TRIGGER0START = d.all;
  1898. #if GH_VIN_ENABLE_DEBUG_PRINT
  1899. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Trigger0Start_pol] <-- 0x%08x\n",
  1900. REG_VIN_S_TRIGGER0START,d.all,d.all);
  1901. #endif
  1902. }
  1903. GH_INLINE U8 GH_VIN_get_S_Trigger0Start_pol(void)
  1904. {
  1905. GH_VIN_S_TRIGGER0START_S tmp_value;
  1906. U32 value = (*(volatile U32 *)REG_VIN_S_TRIGGER0START);
  1907. tmp_value.all = value;
  1908. #if GH_VIN_ENABLE_DEBUG_PRINT
  1909. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Trigger0Start_pol] --> 0x%08x\n",
  1910. REG_VIN_S_TRIGGER0START,value);
  1911. #endif
  1912. return tmp_value.bitc.pol;
  1913. }
  1914. GH_INLINE void GH_VIN_set_S_Trigger0Start_enable(U8 data)
  1915. {
  1916. GH_VIN_S_TRIGGER0START_S d;
  1917. d.all = *(volatile U32 *)REG_VIN_S_TRIGGER0START;
  1918. d.bitc.enable = data;
  1919. *(volatile U32 *)REG_VIN_S_TRIGGER0START = d.all;
  1920. #if GH_VIN_ENABLE_DEBUG_PRINT
  1921. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Trigger0Start_enable] <-- 0x%08x\n",
  1922. REG_VIN_S_TRIGGER0START,d.all,d.all);
  1923. #endif
  1924. }
  1925. GH_INLINE U8 GH_VIN_get_S_Trigger0Start_enable(void)
  1926. {
  1927. GH_VIN_S_TRIGGER0START_S tmp_value;
  1928. U32 value = (*(volatile U32 *)REG_VIN_S_TRIGGER0START);
  1929. tmp_value.all = value;
  1930. #if GH_VIN_ENABLE_DEBUG_PRINT
  1931. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Trigger0Start_enable] --> 0x%08x\n",
  1932. REG_VIN_S_TRIGGER0START,value);
  1933. #endif
  1934. return tmp_value.bitc.enable;
  1935. }
  1936. #endif /* GH_INLINE_LEVEL == 0 */
  1937. /*----------------------------------------------------------------------------*/
  1938. /* register VIN_S_Trigger0End (read/write) */
  1939. /*----------------------------------------------------------------------------*/
  1940. #if GH_INLINE_LEVEL == 0
  1941. /*! \brief Writes the register 'VIN_S_Trigger0End'. */
  1942. void GH_VIN_set_S_Trigger0End(U32 data);
  1943. /*! \brief Reads the register 'VIN_S_Trigger0End'. */
  1944. U32 GH_VIN_get_S_Trigger0End(void);
  1945. /*! \brief Writes the bit group 'endline' of register 'VIN_S_Trigger0End'. */
  1946. void GH_VIN_set_S_Trigger0End_endline(U16 data);
  1947. /*! \brief Reads the bit group 'endline' of register 'VIN_S_Trigger0End'. */
  1948. U16 GH_VIN_get_S_Trigger0End_endline(void);
  1949. #else /* GH_INLINE_LEVEL == 0 */
  1950. GH_INLINE void GH_VIN_set_S_Trigger0End(U32 data)
  1951. {
  1952. *(volatile U32 *)REG_VIN_S_TRIGGER0END = data;
  1953. #if GH_VIN_ENABLE_DEBUG_PRINT
  1954. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Trigger0End] <-- 0x%08x\n",
  1955. REG_VIN_S_TRIGGER0END,data,data);
  1956. #endif
  1957. }
  1958. GH_INLINE U32 GH_VIN_get_S_Trigger0End(void)
  1959. {
  1960. U32 value = (*(volatile U32 *)REG_VIN_S_TRIGGER0END);
  1961. #if GH_VIN_ENABLE_DEBUG_PRINT
  1962. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Trigger0End] --> 0x%08x\n",
  1963. REG_VIN_S_TRIGGER0END,value);
  1964. #endif
  1965. return value;
  1966. }
  1967. GH_INLINE void GH_VIN_set_S_Trigger0End_endline(U16 data)
  1968. {
  1969. GH_VIN_S_TRIGGER0END_S d;
  1970. d.all = *(volatile U32 *)REG_VIN_S_TRIGGER0END;
  1971. d.bitc.endline = data;
  1972. *(volatile U32 *)REG_VIN_S_TRIGGER0END = d.all;
  1973. #if GH_VIN_ENABLE_DEBUG_PRINT
  1974. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Trigger0End_endline] <-- 0x%08x\n",
  1975. REG_VIN_S_TRIGGER0END,d.all,d.all);
  1976. #endif
  1977. }
  1978. GH_INLINE U16 GH_VIN_get_S_Trigger0End_endline(void)
  1979. {
  1980. GH_VIN_S_TRIGGER0END_S tmp_value;
  1981. U32 value = (*(volatile U32 *)REG_VIN_S_TRIGGER0END);
  1982. tmp_value.all = value;
  1983. #if GH_VIN_ENABLE_DEBUG_PRINT
  1984. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Trigger0End_endline] --> 0x%08x\n",
  1985. REG_VIN_S_TRIGGER0END,value);
  1986. #endif
  1987. return tmp_value.bitc.endline;
  1988. }
  1989. #endif /* GH_INLINE_LEVEL == 0 */
  1990. /*----------------------------------------------------------------------------*/
  1991. /* register VIN_S_Trigger1Start (read/write) */
  1992. /*----------------------------------------------------------------------------*/
  1993. #if GH_INLINE_LEVEL == 0
  1994. /*! \brief Writes the register 'VIN_S_Trigger1Start'. */
  1995. void GH_VIN_set_S_Trigger1Start(U32 data);
  1996. /*! \brief Reads the register 'VIN_S_Trigger1Start'. */
  1997. U32 GH_VIN_get_S_Trigger1Start(void);
  1998. /*! \brief Writes the bit group 'startline' of register 'VIN_S_Trigger1Start'. */
  1999. void GH_VIN_set_S_Trigger1Start_startline(U16 data);
  2000. /*! \brief Reads the bit group 'startline' of register 'VIN_S_Trigger1Start'. */
  2001. U16 GH_VIN_get_S_Trigger1Start_startline(void);
  2002. /*! \brief Writes the bit group 'pol' of register 'VIN_S_Trigger1Start'. */
  2003. void GH_VIN_set_S_Trigger1Start_pol(U8 data);
  2004. /*! \brief Reads the bit group 'pol' of register 'VIN_S_Trigger1Start'. */
  2005. U8 GH_VIN_get_S_Trigger1Start_pol(void);
  2006. /*! \brief Writes the bit group 'enable' of register 'VIN_S_Trigger1Start'. */
  2007. void GH_VIN_set_S_Trigger1Start_enable(U8 data);
  2008. /*! \brief Reads the bit group 'enable' of register 'VIN_S_Trigger1Start'. */
  2009. U8 GH_VIN_get_S_Trigger1Start_enable(void);
  2010. #else /* GH_INLINE_LEVEL == 0 */
  2011. GH_INLINE void GH_VIN_set_S_Trigger1Start(U32 data)
  2012. {
  2013. *(volatile U32 *)REG_VIN_S_TRIGGER1START = data;
  2014. #if GH_VIN_ENABLE_DEBUG_PRINT
  2015. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Trigger1Start] <-- 0x%08x\n",
  2016. REG_VIN_S_TRIGGER1START,data,data);
  2017. #endif
  2018. }
  2019. GH_INLINE U32 GH_VIN_get_S_Trigger1Start(void)
  2020. {
  2021. U32 value = (*(volatile U32 *)REG_VIN_S_TRIGGER1START);
  2022. #if GH_VIN_ENABLE_DEBUG_PRINT
  2023. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Trigger1Start] --> 0x%08x\n",
  2024. REG_VIN_S_TRIGGER1START,value);
  2025. #endif
  2026. return value;
  2027. }
  2028. GH_INLINE void GH_VIN_set_S_Trigger1Start_startline(U16 data)
  2029. {
  2030. GH_VIN_S_TRIGGER1START_S d;
  2031. d.all = *(volatile U32 *)REG_VIN_S_TRIGGER1START;
  2032. d.bitc.startline = data;
  2033. *(volatile U32 *)REG_VIN_S_TRIGGER1START = d.all;
  2034. #if GH_VIN_ENABLE_DEBUG_PRINT
  2035. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Trigger1Start_startline] <-- 0x%08x\n",
  2036. REG_VIN_S_TRIGGER1START,d.all,d.all);
  2037. #endif
  2038. }
  2039. GH_INLINE U16 GH_VIN_get_S_Trigger1Start_startline(void)
  2040. {
  2041. GH_VIN_S_TRIGGER1START_S tmp_value;
  2042. U32 value = (*(volatile U32 *)REG_VIN_S_TRIGGER1START);
  2043. tmp_value.all = value;
  2044. #if GH_VIN_ENABLE_DEBUG_PRINT
  2045. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Trigger1Start_startline] --> 0x%08x\n",
  2046. REG_VIN_S_TRIGGER1START,value);
  2047. #endif
  2048. return tmp_value.bitc.startline;
  2049. }
  2050. GH_INLINE void GH_VIN_set_S_Trigger1Start_pol(U8 data)
  2051. {
  2052. GH_VIN_S_TRIGGER1START_S d;
  2053. d.all = *(volatile U32 *)REG_VIN_S_TRIGGER1START;
  2054. d.bitc.pol = data;
  2055. *(volatile U32 *)REG_VIN_S_TRIGGER1START = d.all;
  2056. #if GH_VIN_ENABLE_DEBUG_PRINT
  2057. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Trigger1Start_pol] <-- 0x%08x\n",
  2058. REG_VIN_S_TRIGGER1START,d.all,d.all);
  2059. #endif
  2060. }
  2061. GH_INLINE U8 GH_VIN_get_S_Trigger1Start_pol(void)
  2062. {
  2063. GH_VIN_S_TRIGGER1START_S tmp_value;
  2064. U32 value = (*(volatile U32 *)REG_VIN_S_TRIGGER1START);
  2065. tmp_value.all = value;
  2066. #if GH_VIN_ENABLE_DEBUG_PRINT
  2067. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Trigger1Start_pol] --> 0x%08x\n",
  2068. REG_VIN_S_TRIGGER1START,value);
  2069. #endif
  2070. return tmp_value.bitc.pol;
  2071. }
  2072. GH_INLINE void GH_VIN_set_S_Trigger1Start_enable(U8 data)
  2073. {
  2074. GH_VIN_S_TRIGGER1START_S d;
  2075. d.all = *(volatile U32 *)REG_VIN_S_TRIGGER1START;
  2076. d.bitc.enable = data;
  2077. *(volatile U32 *)REG_VIN_S_TRIGGER1START = d.all;
  2078. #if GH_VIN_ENABLE_DEBUG_PRINT
  2079. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Trigger1Start_enable] <-- 0x%08x\n",
  2080. REG_VIN_S_TRIGGER1START,d.all,d.all);
  2081. #endif
  2082. }
  2083. GH_INLINE U8 GH_VIN_get_S_Trigger1Start_enable(void)
  2084. {
  2085. GH_VIN_S_TRIGGER1START_S tmp_value;
  2086. U32 value = (*(volatile U32 *)REG_VIN_S_TRIGGER1START);
  2087. tmp_value.all = value;
  2088. #if GH_VIN_ENABLE_DEBUG_PRINT
  2089. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Trigger1Start_enable] --> 0x%08x\n",
  2090. REG_VIN_S_TRIGGER1START,value);
  2091. #endif
  2092. return tmp_value.bitc.enable;
  2093. }
  2094. #endif /* GH_INLINE_LEVEL == 0 */
  2095. /*----------------------------------------------------------------------------*/
  2096. /* register VIN_S_Trigger1End (read/write) */
  2097. /*----------------------------------------------------------------------------*/
  2098. #if GH_INLINE_LEVEL == 0
  2099. /*! \brief Writes the register 'VIN_S_Trigger1End'. */
  2100. void GH_VIN_set_S_Trigger1End(U32 data);
  2101. /*! \brief Reads the register 'VIN_S_Trigger1End'. */
  2102. U32 GH_VIN_get_S_Trigger1End(void);
  2103. /*! \brief Writes the bit group 'endline' of register 'VIN_S_Trigger1End'. */
  2104. void GH_VIN_set_S_Trigger1End_endline(U16 data);
  2105. /*! \brief Reads the bit group 'endline' of register 'VIN_S_Trigger1End'. */
  2106. U16 GH_VIN_get_S_Trigger1End_endline(void);
  2107. #else /* GH_INLINE_LEVEL == 0 */
  2108. GH_INLINE void GH_VIN_set_S_Trigger1End(U32 data)
  2109. {
  2110. *(volatile U32 *)REG_VIN_S_TRIGGER1END = data;
  2111. #if GH_VIN_ENABLE_DEBUG_PRINT
  2112. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Trigger1End] <-- 0x%08x\n",
  2113. REG_VIN_S_TRIGGER1END,data,data);
  2114. #endif
  2115. }
  2116. GH_INLINE U32 GH_VIN_get_S_Trigger1End(void)
  2117. {
  2118. U32 value = (*(volatile U32 *)REG_VIN_S_TRIGGER1END);
  2119. #if GH_VIN_ENABLE_DEBUG_PRINT
  2120. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Trigger1End] --> 0x%08x\n",
  2121. REG_VIN_S_TRIGGER1END,value);
  2122. #endif
  2123. return value;
  2124. }
  2125. GH_INLINE void GH_VIN_set_S_Trigger1End_endline(U16 data)
  2126. {
  2127. GH_VIN_S_TRIGGER1END_S d;
  2128. d.all = *(volatile U32 *)REG_VIN_S_TRIGGER1END;
  2129. d.bitc.endline = data;
  2130. *(volatile U32 *)REG_VIN_S_TRIGGER1END = d.all;
  2131. #if GH_VIN_ENABLE_DEBUG_PRINT
  2132. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_Trigger1End_endline] <-- 0x%08x\n",
  2133. REG_VIN_S_TRIGGER1END,d.all,d.all);
  2134. #endif
  2135. }
  2136. GH_INLINE U16 GH_VIN_get_S_Trigger1End_endline(void)
  2137. {
  2138. GH_VIN_S_TRIGGER1END_S tmp_value;
  2139. U32 value = (*(volatile U32 *)REG_VIN_S_TRIGGER1END);
  2140. tmp_value.all = value;
  2141. #if GH_VIN_ENABLE_DEBUG_PRINT
  2142. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_Trigger1End_endline] --> 0x%08x\n",
  2143. REG_VIN_S_TRIGGER1END,value);
  2144. #endif
  2145. return tmp_value.bitc.endline;
  2146. }
  2147. #endif /* GH_INLINE_LEVEL == 0 */
  2148. /*----------------------------------------------------------------------------*/
  2149. /* register VIN_S_VoutStart0 (read/write) */
  2150. /*----------------------------------------------------------------------------*/
  2151. #if GH_INLINE_LEVEL == 0
  2152. /*! \brief Writes the register 'VIN_S_VoutStart0'. */
  2153. void GH_VIN_set_S_VoutStart0(U32 data);
  2154. /*! \brief Reads the register 'VIN_S_VoutStart0'. */
  2155. U32 GH_VIN_get_S_VoutStart0(void);
  2156. /*! \brief Writes the bit group 'startline' of register 'VIN_S_VoutStart0'. */
  2157. void GH_VIN_set_S_VoutStart0_startline(U16 data);
  2158. /*! \brief Reads the bit group 'startline' of register 'VIN_S_VoutStart0'. */
  2159. U16 GH_VIN_get_S_VoutStart0_startline(void);
  2160. /*! \brief Writes the bit group 'disable_field_check' of register 'VIN_S_VoutStart0'. */
  2161. void GH_VIN_set_S_VoutStart0_disable_field_check(U8 data);
  2162. /*! \brief Reads the bit group 'disable_field_check' of register 'VIN_S_VoutStart0'. */
  2163. U8 GH_VIN_get_S_VoutStart0_disable_field_check(void);
  2164. #else /* GH_INLINE_LEVEL == 0 */
  2165. GH_INLINE void GH_VIN_set_S_VoutStart0(U32 data)
  2166. {
  2167. *(volatile U32 *)REG_VIN_S_VOUTSTART0 = data;
  2168. #if GH_VIN_ENABLE_DEBUG_PRINT
  2169. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_VoutStart0] <-- 0x%08x\n",
  2170. REG_VIN_S_VOUTSTART0,data,data);
  2171. #endif
  2172. }
  2173. GH_INLINE U32 GH_VIN_get_S_VoutStart0(void)
  2174. {
  2175. U32 value = (*(volatile U32 *)REG_VIN_S_VOUTSTART0);
  2176. #if GH_VIN_ENABLE_DEBUG_PRINT
  2177. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_VoutStart0] --> 0x%08x\n",
  2178. REG_VIN_S_VOUTSTART0,value);
  2179. #endif
  2180. return value;
  2181. }
  2182. GH_INLINE void GH_VIN_set_S_VoutStart0_startline(U16 data)
  2183. {
  2184. GH_VIN_S_VOUTSTART0_S d;
  2185. d.all = *(volatile U32 *)REG_VIN_S_VOUTSTART0;
  2186. d.bitc.startline = data;
  2187. *(volatile U32 *)REG_VIN_S_VOUTSTART0 = d.all;
  2188. #if GH_VIN_ENABLE_DEBUG_PRINT
  2189. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_VoutStart0_startline] <-- 0x%08x\n",
  2190. REG_VIN_S_VOUTSTART0,d.all,d.all);
  2191. #endif
  2192. }
  2193. GH_INLINE U16 GH_VIN_get_S_VoutStart0_startline(void)
  2194. {
  2195. GH_VIN_S_VOUTSTART0_S tmp_value;
  2196. U32 value = (*(volatile U32 *)REG_VIN_S_VOUTSTART0);
  2197. tmp_value.all = value;
  2198. #if GH_VIN_ENABLE_DEBUG_PRINT
  2199. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_VoutStart0_startline] --> 0x%08x\n",
  2200. REG_VIN_S_VOUTSTART0,value);
  2201. #endif
  2202. return tmp_value.bitc.startline;
  2203. }
  2204. GH_INLINE void GH_VIN_set_S_VoutStart0_disable_field_check(U8 data)
  2205. {
  2206. GH_VIN_S_VOUTSTART0_S d;
  2207. d.all = *(volatile U32 *)REG_VIN_S_VOUTSTART0;
  2208. d.bitc.disable_field_check = data;
  2209. *(volatile U32 *)REG_VIN_S_VOUTSTART0 = d.all;
  2210. #if GH_VIN_ENABLE_DEBUG_PRINT
  2211. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_VoutStart0_disable_field_check] <-- 0x%08x\n",
  2212. REG_VIN_S_VOUTSTART0,d.all,d.all);
  2213. #endif
  2214. }
  2215. GH_INLINE U8 GH_VIN_get_S_VoutStart0_disable_field_check(void)
  2216. {
  2217. GH_VIN_S_VOUTSTART0_S tmp_value;
  2218. U32 value = (*(volatile U32 *)REG_VIN_S_VOUTSTART0);
  2219. tmp_value.all = value;
  2220. #if GH_VIN_ENABLE_DEBUG_PRINT
  2221. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_VoutStart0_disable_field_check] --> 0x%08x\n",
  2222. REG_VIN_S_VOUTSTART0,value);
  2223. #endif
  2224. return tmp_value.bitc.disable_field_check;
  2225. }
  2226. #endif /* GH_INLINE_LEVEL == 0 */
  2227. /*----------------------------------------------------------------------------*/
  2228. /* register VIN_S_VoutStart1 (read/write) */
  2229. /*----------------------------------------------------------------------------*/
  2230. #if GH_INLINE_LEVEL == 0
  2231. /*! \brief Writes the register 'VIN_S_VoutStart1'. */
  2232. void GH_VIN_set_S_VoutStart1(U32 data);
  2233. /*! \brief Reads the register 'VIN_S_VoutStart1'. */
  2234. U32 GH_VIN_get_S_VoutStart1(void);
  2235. /*! \brief Writes the bit group 'startline' of register 'VIN_S_VoutStart1'. */
  2236. void GH_VIN_set_S_VoutStart1_startline(U16 data);
  2237. /*! \brief Reads the bit group 'startline' of register 'VIN_S_VoutStart1'. */
  2238. U16 GH_VIN_get_S_VoutStart1_startline(void);
  2239. /*! \brief Writes the bit group 'disable_field_check' of register 'VIN_S_VoutStart1'. */
  2240. void GH_VIN_set_S_VoutStart1_disable_field_check(U8 data);
  2241. /*! \brief Reads the bit group 'disable_field_check' of register 'VIN_S_VoutStart1'. */
  2242. U8 GH_VIN_get_S_VoutStart1_disable_field_check(void);
  2243. #else /* GH_INLINE_LEVEL == 0 */
  2244. GH_INLINE void GH_VIN_set_S_VoutStart1(U32 data)
  2245. {
  2246. *(volatile U32 *)REG_VIN_S_VOUTSTART1 = data;
  2247. #if GH_VIN_ENABLE_DEBUG_PRINT
  2248. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_VoutStart1] <-- 0x%08x\n",
  2249. REG_VIN_S_VOUTSTART1,data,data);
  2250. #endif
  2251. }
  2252. GH_INLINE U32 GH_VIN_get_S_VoutStart1(void)
  2253. {
  2254. U32 value = (*(volatile U32 *)REG_VIN_S_VOUTSTART1);
  2255. #if GH_VIN_ENABLE_DEBUG_PRINT
  2256. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_VoutStart1] --> 0x%08x\n",
  2257. REG_VIN_S_VOUTSTART1,value);
  2258. #endif
  2259. return value;
  2260. }
  2261. GH_INLINE void GH_VIN_set_S_VoutStart1_startline(U16 data)
  2262. {
  2263. GH_VIN_S_VOUTSTART1_S d;
  2264. d.all = *(volatile U32 *)REG_VIN_S_VOUTSTART1;
  2265. d.bitc.startline = data;
  2266. *(volatile U32 *)REG_VIN_S_VOUTSTART1 = d.all;
  2267. #if GH_VIN_ENABLE_DEBUG_PRINT
  2268. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_VoutStart1_startline] <-- 0x%08x\n",
  2269. REG_VIN_S_VOUTSTART1,d.all,d.all);
  2270. #endif
  2271. }
  2272. GH_INLINE U16 GH_VIN_get_S_VoutStart1_startline(void)
  2273. {
  2274. GH_VIN_S_VOUTSTART1_S tmp_value;
  2275. U32 value = (*(volatile U32 *)REG_VIN_S_VOUTSTART1);
  2276. tmp_value.all = value;
  2277. #if GH_VIN_ENABLE_DEBUG_PRINT
  2278. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_VoutStart1_startline] --> 0x%08x\n",
  2279. REG_VIN_S_VOUTSTART1,value);
  2280. #endif
  2281. return tmp_value.bitc.startline;
  2282. }
  2283. GH_INLINE void GH_VIN_set_S_VoutStart1_disable_field_check(U8 data)
  2284. {
  2285. GH_VIN_S_VOUTSTART1_S d;
  2286. d.all = *(volatile U32 *)REG_VIN_S_VOUTSTART1;
  2287. d.bitc.disable_field_check = data;
  2288. *(volatile U32 *)REG_VIN_S_VOUTSTART1 = d.all;
  2289. #if GH_VIN_ENABLE_DEBUG_PRINT
  2290. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_VoutStart1_disable_field_check] <-- 0x%08x\n",
  2291. REG_VIN_S_VOUTSTART1,d.all,d.all);
  2292. #endif
  2293. }
  2294. GH_INLINE U8 GH_VIN_get_S_VoutStart1_disable_field_check(void)
  2295. {
  2296. GH_VIN_S_VOUTSTART1_S tmp_value;
  2297. U32 value = (*(volatile U32 *)REG_VIN_S_VOUTSTART1);
  2298. tmp_value.all = value;
  2299. #if GH_VIN_ENABLE_DEBUG_PRINT
  2300. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_VoutStart1_disable_field_check] --> 0x%08x\n",
  2301. REG_VIN_S_VOUTSTART1,value);
  2302. #endif
  2303. return tmp_value.bitc.disable_field_check;
  2304. }
  2305. #endif /* GH_INLINE_LEVEL == 0 */
  2306. /*----------------------------------------------------------------------------*/
  2307. /* register VIN_S_CapStartV (read/write) */
  2308. /*----------------------------------------------------------------------------*/
  2309. #if GH_INLINE_LEVEL == 0
  2310. /*! \brief Writes the register 'VIN_S_CapStartV'. */
  2311. void GH_VIN_set_S_CapStartV(U32 data);
  2312. /*! \brief Reads the register 'VIN_S_CapStartV'. */
  2313. U32 GH_VIN_get_S_CapStartV(void);
  2314. /*! \brief Writes the bit group 'startline' of register 'VIN_S_CapStartV'. */
  2315. void GH_VIN_set_S_CapStartV_startline(U16 data);
  2316. /*! \brief Reads the bit group 'startline' of register 'VIN_S_CapStartV'. */
  2317. U16 GH_VIN_get_S_CapStartV_startline(void);
  2318. #else /* GH_INLINE_LEVEL == 0 */
  2319. GH_INLINE void GH_VIN_set_S_CapStartV(U32 data)
  2320. {
  2321. *(volatile U32 *)REG_VIN_S_CAPSTARTV = data;
  2322. #if GH_VIN_ENABLE_DEBUG_PRINT
  2323. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_CapStartV] <-- 0x%08x\n",
  2324. REG_VIN_S_CAPSTARTV,data,data);
  2325. #endif
  2326. }
  2327. GH_INLINE U32 GH_VIN_get_S_CapStartV(void)
  2328. {
  2329. U32 value = (*(volatile U32 *)REG_VIN_S_CAPSTARTV);
  2330. #if GH_VIN_ENABLE_DEBUG_PRINT
  2331. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_CapStartV] --> 0x%08x\n",
  2332. REG_VIN_S_CAPSTARTV,value);
  2333. #endif
  2334. return value;
  2335. }
  2336. GH_INLINE void GH_VIN_set_S_CapStartV_startline(U16 data)
  2337. {
  2338. GH_VIN_S_CAPSTARTV_S d;
  2339. d.all = *(volatile U32 *)REG_VIN_S_CAPSTARTV;
  2340. d.bitc.startline = data;
  2341. *(volatile U32 *)REG_VIN_S_CAPSTARTV = d.all;
  2342. #if GH_VIN_ENABLE_DEBUG_PRINT
  2343. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_CapStartV_startline] <-- 0x%08x\n",
  2344. REG_VIN_S_CAPSTARTV,d.all,d.all);
  2345. #endif
  2346. }
  2347. GH_INLINE U16 GH_VIN_get_S_CapStartV_startline(void)
  2348. {
  2349. GH_VIN_S_CAPSTARTV_S tmp_value;
  2350. U32 value = (*(volatile U32 *)REG_VIN_S_CAPSTARTV);
  2351. tmp_value.all = value;
  2352. #if GH_VIN_ENABLE_DEBUG_PRINT
  2353. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_CapStartV_startline] --> 0x%08x\n",
  2354. REG_VIN_S_CAPSTARTV,value);
  2355. #endif
  2356. return tmp_value.bitc.startline;
  2357. }
  2358. #endif /* GH_INLINE_LEVEL == 0 */
  2359. /*----------------------------------------------------------------------------*/
  2360. /* register VIN_S_CapStartH (read/write) */
  2361. /*----------------------------------------------------------------------------*/
  2362. #if GH_INLINE_LEVEL == 0
  2363. /*! \brief Writes the register 'VIN_S_CapStartH'. */
  2364. void GH_VIN_set_S_CapStartH(U32 data);
  2365. /*! \brief Reads the register 'VIN_S_CapStartH'. */
  2366. U32 GH_VIN_get_S_CapStartH(void);
  2367. /*! \brief Writes the bit group 'startcol' of register 'VIN_S_CapStartH'. */
  2368. void GH_VIN_set_S_CapStartH_startcol(U16 data);
  2369. /*! \brief Reads the bit group 'startcol' of register 'VIN_S_CapStartH'. */
  2370. U16 GH_VIN_get_S_CapStartH_startcol(void);
  2371. #else /* GH_INLINE_LEVEL == 0 */
  2372. GH_INLINE void GH_VIN_set_S_CapStartH(U32 data)
  2373. {
  2374. *(volatile U32 *)REG_VIN_S_CAPSTARTH = data;
  2375. #if GH_VIN_ENABLE_DEBUG_PRINT
  2376. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_CapStartH] <-- 0x%08x\n",
  2377. REG_VIN_S_CAPSTARTH,data,data);
  2378. #endif
  2379. }
  2380. GH_INLINE U32 GH_VIN_get_S_CapStartH(void)
  2381. {
  2382. U32 value = (*(volatile U32 *)REG_VIN_S_CAPSTARTH);
  2383. #if GH_VIN_ENABLE_DEBUG_PRINT
  2384. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_CapStartH] --> 0x%08x\n",
  2385. REG_VIN_S_CAPSTARTH,value);
  2386. #endif
  2387. return value;
  2388. }
  2389. GH_INLINE void GH_VIN_set_S_CapStartH_startcol(U16 data)
  2390. {
  2391. GH_VIN_S_CAPSTARTH_S d;
  2392. d.all = *(volatile U32 *)REG_VIN_S_CAPSTARTH;
  2393. d.bitc.startcol = data;
  2394. *(volatile U32 *)REG_VIN_S_CAPSTARTH = d.all;
  2395. #if GH_VIN_ENABLE_DEBUG_PRINT
  2396. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_CapStartH_startcol] <-- 0x%08x\n",
  2397. REG_VIN_S_CAPSTARTH,d.all,d.all);
  2398. #endif
  2399. }
  2400. GH_INLINE U16 GH_VIN_get_S_CapStartH_startcol(void)
  2401. {
  2402. GH_VIN_S_CAPSTARTH_S tmp_value;
  2403. U32 value = (*(volatile U32 *)REG_VIN_S_CAPSTARTH);
  2404. tmp_value.all = value;
  2405. #if GH_VIN_ENABLE_DEBUG_PRINT
  2406. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_CapStartH_startcol] --> 0x%08x\n",
  2407. REG_VIN_S_CAPSTARTH,value);
  2408. #endif
  2409. return tmp_value.bitc.startcol;
  2410. }
  2411. #endif /* GH_INLINE_LEVEL == 0 */
  2412. /*----------------------------------------------------------------------------*/
  2413. /* register VIN_S_CapEndV (read/write) */
  2414. /*----------------------------------------------------------------------------*/
  2415. #if GH_INLINE_LEVEL == 0
  2416. /*! \brief Writes the register 'VIN_S_CapEndV'. */
  2417. void GH_VIN_set_S_CapEndV(U32 data);
  2418. /*! \brief Reads the register 'VIN_S_CapEndV'. */
  2419. U32 GH_VIN_get_S_CapEndV(void);
  2420. /*! \brief Writes the bit group 'endline' of register 'VIN_S_CapEndV'. */
  2421. void GH_VIN_set_S_CapEndV_endline(U16 data);
  2422. /*! \brief Reads the bit group 'endline' of register 'VIN_S_CapEndV'. */
  2423. U16 GH_VIN_get_S_CapEndV_endline(void);
  2424. #else /* GH_INLINE_LEVEL == 0 */
  2425. GH_INLINE void GH_VIN_set_S_CapEndV(U32 data)
  2426. {
  2427. *(volatile U32 *)REG_VIN_S_CAPENDV = data;
  2428. #if GH_VIN_ENABLE_DEBUG_PRINT
  2429. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_CapEndV] <-- 0x%08x\n",
  2430. REG_VIN_S_CAPENDV,data,data);
  2431. #endif
  2432. }
  2433. GH_INLINE U32 GH_VIN_get_S_CapEndV(void)
  2434. {
  2435. U32 value = (*(volatile U32 *)REG_VIN_S_CAPENDV);
  2436. #if GH_VIN_ENABLE_DEBUG_PRINT
  2437. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_CapEndV] --> 0x%08x\n",
  2438. REG_VIN_S_CAPENDV,value);
  2439. #endif
  2440. return value;
  2441. }
  2442. GH_INLINE void GH_VIN_set_S_CapEndV_endline(U16 data)
  2443. {
  2444. GH_VIN_S_CAPENDV_S d;
  2445. d.all = *(volatile U32 *)REG_VIN_S_CAPENDV;
  2446. d.bitc.endline = data;
  2447. *(volatile U32 *)REG_VIN_S_CAPENDV = d.all;
  2448. #if GH_VIN_ENABLE_DEBUG_PRINT
  2449. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_CapEndV_endline] <-- 0x%08x\n",
  2450. REG_VIN_S_CAPENDV,d.all,d.all);
  2451. #endif
  2452. }
  2453. GH_INLINE U16 GH_VIN_get_S_CapEndV_endline(void)
  2454. {
  2455. GH_VIN_S_CAPENDV_S tmp_value;
  2456. U32 value = (*(volatile U32 *)REG_VIN_S_CAPENDV);
  2457. tmp_value.all = value;
  2458. #if GH_VIN_ENABLE_DEBUG_PRINT
  2459. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_CapEndV_endline] --> 0x%08x\n",
  2460. REG_VIN_S_CAPENDV,value);
  2461. #endif
  2462. return tmp_value.bitc.endline;
  2463. }
  2464. #endif /* GH_INLINE_LEVEL == 0 */
  2465. /*----------------------------------------------------------------------------*/
  2466. /* register VIN_S_CapEndH (read/write) */
  2467. /*----------------------------------------------------------------------------*/
  2468. #if GH_INLINE_LEVEL == 0
  2469. /*! \brief Writes the register 'VIN_S_CapEndH'. */
  2470. void GH_VIN_set_S_CapEndH(U32 data);
  2471. /*! \brief Reads the register 'VIN_S_CapEndH'. */
  2472. U32 GH_VIN_get_S_CapEndH(void);
  2473. /*! \brief Writes the bit group 'endcol' of register 'VIN_S_CapEndH'. */
  2474. void GH_VIN_set_S_CapEndH_endcol(U16 data);
  2475. /*! \brief Reads the bit group 'endcol' of register 'VIN_S_CapEndH'. */
  2476. U16 GH_VIN_get_S_CapEndH_endcol(void);
  2477. #else /* GH_INLINE_LEVEL == 0 */
  2478. GH_INLINE void GH_VIN_set_S_CapEndH(U32 data)
  2479. {
  2480. *(volatile U32 *)REG_VIN_S_CAPENDH = data;
  2481. #if GH_VIN_ENABLE_DEBUG_PRINT
  2482. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_CapEndH] <-- 0x%08x\n",
  2483. REG_VIN_S_CAPENDH,data,data);
  2484. #endif
  2485. }
  2486. GH_INLINE U32 GH_VIN_get_S_CapEndH(void)
  2487. {
  2488. U32 value = (*(volatile U32 *)REG_VIN_S_CAPENDH);
  2489. #if GH_VIN_ENABLE_DEBUG_PRINT
  2490. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_CapEndH] --> 0x%08x\n",
  2491. REG_VIN_S_CAPENDH,value);
  2492. #endif
  2493. return value;
  2494. }
  2495. GH_INLINE void GH_VIN_set_S_CapEndH_endcol(U16 data)
  2496. {
  2497. GH_VIN_S_CAPENDH_S d;
  2498. d.all = *(volatile U32 *)REG_VIN_S_CAPENDH;
  2499. d.bitc.endcol = data;
  2500. *(volatile U32 *)REG_VIN_S_CAPENDH = d.all;
  2501. #if GH_VIN_ENABLE_DEBUG_PRINT
  2502. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_CapEndH_endcol] <-- 0x%08x\n",
  2503. REG_VIN_S_CAPENDH,d.all,d.all);
  2504. #endif
  2505. }
  2506. GH_INLINE U16 GH_VIN_get_S_CapEndH_endcol(void)
  2507. {
  2508. GH_VIN_S_CAPENDH_S tmp_value;
  2509. U32 value = (*(volatile U32 *)REG_VIN_S_CAPENDH);
  2510. tmp_value.all = value;
  2511. #if GH_VIN_ENABLE_DEBUG_PRINT
  2512. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_CapEndH_endcol] --> 0x%08x\n",
  2513. REG_VIN_S_CAPENDH,value);
  2514. #endif
  2515. return tmp_value.bitc.endcol;
  2516. }
  2517. #endif /* GH_INLINE_LEVEL == 0 */
  2518. /*----------------------------------------------------------------------------*/
  2519. /* register VIN_S_BlankLengthH (read/write) */
  2520. /*----------------------------------------------------------------------------*/
  2521. #if GH_INLINE_LEVEL == 0
  2522. /*! \brief Writes the register 'VIN_S_BlankLengthH'. */
  2523. void GH_VIN_set_S_BlankLengthH(U32 data);
  2524. /*! \brief Reads the register 'VIN_S_BlankLengthH'. */
  2525. U32 GH_VIN_get_S_BlankLengthH(void);
  2526. /*! \brief Writes the bit group 'blank_length' of register 'VIN_S_BlankLengthH'. */
  2527. void GH_VIN_set_S_BlankLengthH_blank_length(U16 data);
  2528. /*! \brief Reads the bit group 'blank_length' of register 'VIN_S_BlankLengthH'. */
  2529. U16 GH_VIN_get_S_BlankLengthH_blank_length(void);
  2530. #else /* GH_INLINE_LEVEL == 0 */
  2531. GH_INLINE void GH_VIN_set_S_BlankLengthH(U32 data)
  2532. {
  2533. *(volatile U32 *)REG_VIN_S_BLANKLENGTHH = data;
  2534. #if GH_VIN_ENABLE_DEBUG_PRINT
  2535. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_BlankLengthH] <-- 0x%08x\n",
  2536. REG_VIN_S_BLANKLENGTHH,data,data);
  2537. #endif
  2538. }
  2539. GH_INLINE U32 GH_VIN_get_S_BlankLengthH(void)
  2540. {
  2541. U32 value = (*(volatile U32 *)REG_VIN_S_BLANKLENGTHH);
  2542. #if GH_VIN_ENABLE_DEBUG_PRINT
  2543. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_BlankLengthH] --> 0x%08x\n",
  2544. REG_VIN_S_BLANKLENGTHH,value);
  2545. #endif
  2546. return value;
  2547. }
  2548. GH_INLINE void GH_VIN_set_S_BlankLengthH_blank_length(U16 data)
  2549. {
  2550. GH_VIN_S_BLANKLENGTHH_S d;
  2551. d.all = *(volatile U32 *)REG_VIN_S_BLANKLENGTHH;
  2552. d.bitc.blank_length = data;
  2553. *(volatile U32 *)REG_VIN_S_BLANKLENGTHH = d.all;
  2554. #if GH_VIN_ENABLE_DEBUG_PRINT
  2555. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_BlankLengthH_blank_length] <-- 0x%08x\n",
  2556. REG_VIN_S_BLANKLENGTHH,d.all,d.all);
  2557. #endif
  2558. }
  2559. GH_INLINE U16 GH_VIN_get_S_BlankLengthH_blank_length(void)
  2560. {
  2561. GH_VIN_S_BLANKLENGTHH_S tmp_value;
  2562. U32 value = (*(volatile U32 *)REG_VIN_S_BLANKLENGTHH);
  2563. tmp_value.all = value;
  2564. #if GH_VIN_ENABLE_DEBUG_PRINT
  2565. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_BlankLengthH_blank_length] --> 0x%08x\n",
  2566. REG_VIN_S_BLANKLENGTHH,value);
  2567. #endif
  2568. return tmp_value.bitc.blank_length;
  2569. }
  2570. #endif /* GH_INLINE_LEVEL == 0 */
  2571. /*----------------------------------------------------------------------------*/
  2572. /* register VIN_S_TimeoutVLow (read/write) */
  2573. /*----------------------------------------------------------------------------*/
  2574. #if GH_INLINE_LEVEL == 0
  2575. /*! \brief Writes the register 'VIN_S_TimeoutVLow'. */
  2576. void GH_VIN_set_S_TimeoutVLow(U32 data);
  2577. /*! \brief Reads the register 'VIN_S_TimeoutVLow'. */
  2578. U32 GH_VIN_get_S_TimeoutVLow(void);
  2579. /*! \brief Writes the bit group 'vsync_timeout_low' of register 'VIN_S_TimeoutVLow'. */
  2580. void GH_VIN_set_S_TimeoutVLow_vsync_timeout_low(U16 data);
  2581. /*! \brief Reads the bit group 'vsync_timeout_low' of register 'VIN_S_TimeoutVLow'. */
  2582. U16 GH_VIN_get_S_TimeoutVLow_vsync_timeout_low(void);
  2583. #else /* GH_INLINE_LEVEL == 0 */
  2584. GH_INLINE void GH_VIN_set_S_TimeoutVLow(U32 data)
  2585. {
  2586. *(volatile U32 *)REG_VIN_S_TIMEOUTVLOW = data;
  2587. #if GH_VIN_ENABLE_DEBUG_PRINT
  2588. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_TimeoutVLow] <-- 0x%08x\n",
  2589. REG_VIN_S_TIMEOUTVLOW,data,data);
  2590. #endif
  2591. }
  2592. GH_INLINE U32 GH_VIN_get_S_TimeoutVLow(void)
  2593. {
  2594. U32 value = (*(volatile U32 *)REG_VIN_S_TIMEOUTVLOW);
  2595. #if GH_VIN_ENABLE_DEBUG_PRINT
  2596. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_TimeoutVLow] --> 0x%08x\n",
  2597. REG_VIN_S_TIMEOUTVLOW,value);
  2598. #endif
  2599. return value;
  2600. }
  2601. GH_INLINE void GH_VIN_set_S_TimeoutVLow_vsync_timeout_low(U16 data)
  2602. {
  2603. GH_VIN_S_TIMEOUTVLOW_S d;
  2604. d.all = *(volatile U32 *)REG_VIN_S_TIMEOUTVLOW;
  2605. d.bitc.vsync_timeout_low = data;
  2606. *(volatile U32 *)REG_VIN_S_TIMEOUTVLOW = d.all;
  2607. #if GH_VIN_ENABLE_DEBUG_PRINT
  2608. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_TimeoutVLow_vsync_timeout_low] <-- 0x%08x\n",
  2609. REG_VIN_S_TIMEOUTVLOW,d.all,d.all);
  2610. #endif
  2611. }
  2612. GH_INLINE U16 GH_VIN_get_S_TimeoutVLow_vsync_timeout_low(void)
  2613. {
  2614. GH_VIN_S_TIMEOUTVLOW_S tmp_value;
  2615. U32 value = (*(volatile U32 *)REG_VIN_S_TIMEOUTVLOW);
  2616. tmp_value.all = value;
  2617. #if GH_VIN_ENABLE_DEBUG_PRINT
  2618. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_TimeoutVLow_vsync_timeout_low] --> 0x%08x\n",
  2619. REG_VIN_S_TIMEOUTVLOW,value);
  2620. #endif
  2621. return tmp_value.bitc.vsync_timeout_low;
  2622. }
  2623. #endif /* GH_INLINE_LEVEL == 0 */
  2624. /*----------------------------------------------------------------------------*/
  2625. /* register VIN_S_TimeoutVHigh (read/write) */
  2626. /*----------------------------------------------------------------------------*/
  2627. #if GH_INLINE_LEVEL == 0
  2628. /*! \brief Writes the register 'VIN_S_TimeoutVHigh'. */
  2629. void GH_VIN_set_S_TimeoutVHigh(U32 data);
  2630. /*! \brief Reads the register 'VIN_S_TimeoutVHigh'. */
  2631. U32 GH_VIN_get_S_TimeoutVHigh(void);
  2632. /*! \brief Writes the bit group 'vsync_timeout_high' of register 'VIN_S_TimeoutVHigh'. */
  2633. void GH_VIN_set_S_TimeoutVHigh_vsync_timeout_high(U16 data);
  2634. /*! \brief Reads the bit group 'vsync_timeout_high' of register 'VIN_S_TimeoutVHigh'. */
  2635. U16 GH_VIN_get_S_TimeoutVHigh_vsync_timeout_high(void);
  2636. #else /* GH_INLINE_LEVEL == 0 */
  2637. GH_INLINE void GH_VIN_set_S_TimeoutVHigh(U32 data)
  2638. {
  2639. *(volatile U32 *)REG_VIN_S_TIMEOUTVHIGH = data;
  2640. #if GH_VIN_ENABLE_DEBUG_PRINT
  2641. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_TimeoutVHigh] <-- 0x%08x\n",
  2642. REG_VIN_S_TIMEOUTVHIGH,data,data);
  2643. #endif
  2644. }
  2645. GH_INLINE U32 GH_VIN_get_S_TimeoutVHigh(void)
  2646. {
  2647. U32 value = (*(volatile U32 *)REG_VIN_S_TIMEOUTVHIGH);
  2648. #if GH_VIN_ENABLE_DEBUG_PRINT
  2649. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_TimeoutVHigh] --> 0x%08x\n",
  2650. REG_VIN_S_TIMEOUTVHIGH,value);
  2651. #endif
  2652. return value;
  2653. }
  2654. GH_INLINE void GH_VIN_set_S_TimeoutVHigh_vsync_timeout_high(U16 data)
  2655. {
  2656. GH_VIN_S_TIMEOUTVHIGH_S d;
  2657. d.all = *(volatile U32 *)REG_VIN_S_TIMEOUTVHIGH;
  2658. d.bitc.vsync_timeout_high = data;
  2659. *(volatile U32 *)REG_VIN_S_TIMEOUTVHIGH = d.all;
  2660. #if GH_VIN_ENABLE_DEBUG_PRINT
  2661. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_TimeoutVHigh_vsync_timeout_high] <-- 0x%08x\n",
  2662. REG_VIN_S_TIMEOUTVHIGH,d.all,d.all);
  2663. #endif
  2664. }
  2665. GH_INLINE U16 GH_VIN_get_S_TimeoutVHigh_vsync_timeout_high(void)
  2666. {
  2667. GH_VIN_S_TIMEOUTVHIGH_S tmp_value;
  2668. U32 value = (*(volatile U32 *)REG_VIN_S_TIMEOUTVHIGH);
  2669. tmp_value.all = value;
  2670. #if GH_VIN_ENABLE_DEBUG_PRINT
  2671. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_TimeoutVHigh_vsync_timeout_high] --> 0x%08x\n",
  2672. REG_VIN_S_TIMEOUTVHIGH,value);
  2673. #endif
  2674. return tmp_value.bitc.vsync_timeout_high;
  2675. }
  2676. #endif /* GH_INLINE_LEVEL == 0 */
  2677. /*----------------------------------------------------------------------------*/
  2678. /* register VIN_S_TimeoutHLow (read/write) */
  2679. /*----------------------------------------------------------------------------*/
  2680. #if GH_INLINE_LEVEL == 0
  2681. /*! \brief Writes the register 'VIN_S_TimeoutHLow'. */
  2682. void GH_VIN_set_S_TimeoutHLow(U32 data);
  2683. /*! \brief Reads the register 'VIN_S_TimeoutHLow'. */
  2684. U32 GH_VIN_get_S_TimeoutHLow(void);
  2685. /*! \brief Writes the bit group 'hsync_timeout_low' of register 'VIN_S_TimeoutHLow'. */
  2686. void GH_VIN_set_S_TimeoutHLow_hsync_timeout_low(U16 data);
  2687. /*! \brief Reads the bit group 'hsync_timeout_low' of register 'VIN_S_TimeoutHLow'. */
  2688. U16 GH_VIN_get_S_TimeoutHLow_hsync_timeout_low(void);
  2689. #else /* GH_INLINE_LEVEL == 0 */
  2690. GH_INLINE void GH_VIN_set_S_TimeoutHLow(U32 data)
  2691. {
  2692. *(volatile U32 *)REG_VIN_S_TIMEOUTHLOW = data;
  2693. #if GH_VIN_ENABLE_DEBUG_PRINT
  2694. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_TimeoutHLow] <-- 0x%08x\n",
  2695. REG_VIN_S_TIMEOUTHLOW,data,data);
  2696. #endif
  2697. }
  2698. GH_INLINE U32 GH_VIN_get_S_TimeoutHLow(void)
  2699. {
  2700. U32 value = (*(volatile U32 *)REG_VIN_S_TIMEOUTHLOW);
  2701. #if GH_VIN_ENABLE_DEBUG_PRINT
  2702. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_TimeoutHLow] --> 0x%08x\n",
  2703. REG_VIN_S_TIMEOUTHLOW,value);
  2704. #endif
  2705. return value;
  2706. }
  2707. GH_INLINE void GH_VIN_set_S_TimeoutHLow_hsync_timeout_low(U16 data)
  2708. {
  2709. GH_VIN_S_TIMEOUTHLOW_S d;
  2710. d.all = *(volatile U32 *)REG_VIN_S_TIMEOUTHLOW;
  2711. d.bitc.hsync_timeout_low = data;
  2712. *(volatile U32 *)REG_VIN_S_TIMEOUTHLOW = d.all;
  2713. #if GH_VIN_ENABLE_DEBUG_PRINT
  2714. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_TimeoutHLow_hsync_timeout_low] <-- 0x%08x\n",
  2715. REG_VIN_S_TIMEOUTHLOW,d.all,d.all);
  2716. #endif
  2717. }
  2718. GH_INLINE U16 GH_VIN_get_S_TimeoutHLow_hsync_timeout_low(void)
  2719. {
  2720. GH_VIN_S_TIMEOUTHLOW_S tmp_value;
  2721. U32 value = (*(volatile U32 *)REG_VIN_S_TIMEOUTHLOW);
  2722. tmp_value.all = value;
  2723. #if GH_VIN_ENABLE_DEBUG_PRINT
  2724. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_TimeoutHLow_hsync_timeout_low] --> 0x%08x\n",
  2725. REG_VIN_S_TIMEOUTHLOW,value);
  2726. #endif
  2727. return tmp_value.bitc.hsync_timeout_low;
  2728. }
  2729. #endif /* GH_INLINE_LEVEL == 0 */
  2730. /*----------------------------------------------------------------------------*/
  2731. /* register VIN_S_TimeoutHHigh (read/write) */
  2732. /*----------------------------------------------------------------------------*/
  2733. #if GH_INLINE_LEVEL == 0
  2734. /*! \brief Writes the register 'VIN_S_TimeoutHHigh'. */
  2735. void GH_VIN_set_S_TimeoutHHigh(U32 data);
  2736. /*! \brief Reads the register 'VIN_S_TimeoutHHigh'. */
  2737. U32 GH_VIN_get_S_TimeoutHHigh(void);
  2738. /*! \brief Writes the bit group 'hsync_timeout_high' of register 'VIN_S_TimeoutHHigh'. */
  2739. void GH_VIN_set_S_TimeoutHHigh_hsync_timeout_high(U16 data);
  2740. /*! \brief Reads the bit group 'hsync_timeout_high' of register 'VIN_S_TimeoutHHigh'. */
  2741. U16 GH_VIN_get_S_TimeoutHHigh_hsync_timeout_high(void);
  2742. #else /* GH_INLINE_LEVEL == 0 */
  2743. GH_INLINE void GH_VIN_set_S_TimeoutHHigh(U32 data)
  2744. {
  2745. *(volatile U32 *)REG_VIN_S_TIMEOUTHHIGH = data;
  2746. #if GH_VIN_ENABLE_DEBUG_PRINT
  2747. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_TimeoutHHigh] <-- 0x%08x\n",
  2748. REG_VIN_S_TIMEOUTHHIGH,data,data);
  2749. #endif
  2750. }
  2751. GH_INLINE U32 GH_VIN_get_S_TimeoutHHigh(void)
  2752. {
  2753. U32 value = (*(volatile U32 *)REG_VIN_S_TIMEOUTHHIGH);
  2754. #if GH_VIN_ENABLE_DEBUG_PRINT
  2755. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_TimeoutHHigh] --> 0x%08x\n",
  2756. REG_VIN_S_TIMEOUTHHIGH,value);
  2757. #endif
  2758. return value;
  2759. }
  2760. GH_INLINE void GH_VIN_set_S_TimeoutHHigh_hsync_timeout_high(U16 data)
  2761. {
  2762. GH_VIN_S_TIMEOUTHHIGH_S d;
  2763. d.all = *(volatile U32 *)REG_VIN_S_TIMEOUTHHIGH;
  2764. d.bitc.hsync_timeout_high = data;
  2765. *(volatile U32 *)REG_VIN_S_TIMEOUTHHIGH = d.all;
  2766. #if GH_VIN_ENABLE_DEBUG_PRINT
  2767. GH_VIN_DEBUG_PRINT_FUNCTION( "WRREG(0x%08x,0x%08x); \\\\ [GH_VIN_set_S_TimeoutHHigh_hsync_timeout_high] <-- 0x%08x\n",
  2768. REG_VIN_S_TIMEOUTHHIGH,d.all,d.all);
  2769. #endif
  2770. }
  2771. GH_INLINE U16 GH_VIN_get_S_TimeoutHHigh_hsync_timeout_high(void)
  2772. {
  2773. GH_VIN_S_TIMEOUTHHIGH_S tmp_value;
  2774. U32 value = (*(volatile U32 *)REG_VIN_S_TIMEOUTHHIGH);
  2775. tmp_value.all = value;
  2776. #if GH_VIN_ENABLE_DEBUG_PRINT
  2777. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_TimeoutHHigh_hsync_timeout_high] --> 0x%08x\n",
  2778. REG_VIN_S_TIMEOUTHHIGH,value);
  2779. #endif
  2780. return tmp_value.bitc.hsync_timeout_high;
  2781. }
  2782. #endif /* GH_INLINE_LEVEL == 0 */
  2783. /*----------------------------------------------------------------------------*/
  2784. /* register VIN_S_debugFifoCount (read) */
  2785. /*----------------------------------------------------------------------------*/
  2786. #if GH_INLINE_LEVEL == 0
  2787. /*! \brief Reads the register 'VIN_S_debugFifoCount'. */
  2788. U32 GH_VIN_get_S_debugFifoCount(void);
  2789. /*! \brief Reads the bit group 'num_words_in_fifo' of register 'VIN_S_debugFifoCount'. */
  2790. U16 GH_VIN_get_S_debugFifoCount_num_words_in_fifo(void);
  2791. #else /* GH_INLINE_LEVEL == 0 */
  2792. GH_INLINE U32 GH_VIN_get_S_debugFifoCount(void)
  2793. {
  2794. U32 value = (*(volatile U32 *)REG_VIN_S_DEBUGFIFOCOUNT);
  2795. #if GH_VIN_ENABLE_DEBUG_PRINT
  2796. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_debugFifoCount] --> 0x%08x\n",
  2797. REG_VIN_S_DEBUGFIFOCOUNT,value);
  2798. #endif
  2799. return value;
  2800. }
  2801. GH_INLINE U16 GH_VIN_get_S_debugFifoCount_num_words_in_fifo(void)
  2802. {
  2803. GH_VIN_S_DEBUGFIFOCOUNT_S tmp_value;
  2804. U32 value = (*(volatile U32 *)REG_VIN_S_DEBUGFIFOCOUNT);
  2805. tmp_value.all = value;
  2806. #if GH_VIN_ENABLE_DEBUG_PRINT
  2807. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_debugFifoCount_num_words_in_fifo] --> 0x%08x\n",
  2808. REG_VIN_S_DEBUGFIFOCOUNT,value);
  2809. #endif
  2810. return tmp_value.bitc.num_words_in_fifo;
  2811. }
  2812. #endif /* GH_INLINE_LEVEL == 0 */
  2813. /*----------------------------------------------------------------------------*/
  2814. /* register VIN_S_debugFifoData0 (read) */
  2815. /*----------------------------------------------------------------------------*/
  2816. #if GH_INLINE_LEVEL == 0
  2817. /*! \brief Reads the register 'VIN_S_debugFifoData0'. */
  2818. U32 GH_VIN_get_S_debugFifoData0(void);
  2819. /*! \brief Reads the bit group 'pixel_0_read_data' of register 'VIN_S_debugFifoData0'. */
  2820. U16 GH_VIN_get_S_debugFifoData0_pixel_0_read_data(void);
  2821. #else /* GH_INLINE_LEVEL == 0 */
  2822. GH_INLINE U32 GH_VIN_get_S_debugFifoData0(void)
  2823. {
  2824. U32 value = (*(volatile U32 *)REG_VIN_S_DEBUGFIFODATA0);
  2825. #if GH_VIN_ENABLE_DEBUG_PRINT
  2826. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_debugFifoData0] --> 0x%08x\n",
  2827. REG_VIN_S_DEBUGFIFODATA0,value);
  2828. #endif
  2829. return value;
  2830. }
  2831. GH_INLINE U16 GH_VIN_get_S_debugFifoData0_pixel_0_read_data(void)
  2832. {
  2833. GH_VIN_S_DEBUGFIFODATA0_S tmp_value;
  2834. U32 value = (*(volatile U32 *)REG_VIN_S_DEBUGFIFODATA0);
  2835. tmp_value.all = value;
  2836. #if GH_VIN_ENABLE_DEBUG_PRINT
  2837. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_debugFifoData0_pixel_0_read_data] --> 0x%08x\n",
  2838. REG_VIN_S_DEBUGFIFODATA0,value);
  2839. #endif
  2840. return tmp_value.bitc.pixel_0_read_data;
  2841. }
  2842. #endif /* GH_INLINE_LEVEL == 0 */
  2843. /*----------------------------------------------------------------------------*/
  2844. /* register VIN_S_debugFifoData1 (read) */
  2845. /*----------------------------------------------------------------------------*/
  2846. #if GH_INLINE_LEVEL == 0
  2847. /*! \brief Reads the register 'VIN_S_debugFifoData1'. */
  2848. U32 GH_VIN_get_S_debugFifoData1(void);
  2849. /*! \brief Reads the bit group 'pixel_1_read_data' of register 'VIN_S_debugFifoData1'. */
  2850. U16 GH_VIN_get_S_debugFifoData1_pixel_1_read_data(void);
  2851. #else /* GH_INLINE_LEVEL == 0 */
  2852. GH_INLINE U32 GH_VIN_get_S_debugFifoData1(void)
  2853. {
  2854. U32 value = (*(volatile U32 *)REG_VIN_S_DEBUGFIFODATA1);
  2855. #if GH_VIN_ENABLE_DEBUG_PRINT
  2856. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_debugFifoData1] --> 0x%08x\n",
  2857. REG_VIN_S_DEBUGFIFODATA1,value);
  2858. #endif
  2859. return value;
  2860. }
  2861. GH_INLINE U16 GH_VIN_get_S_debugFifoData1_pixel_1_read_data(void)
  2862. {
  2863. GH_VIN_S_DEBUGFIFODATA1_S tmp_value;
  2864. U32 value = (*(volatile U32 *)REG_VIN_S_DEBUGFIFODATA1);
  2865. tmp_value.all = value;
  2866. #if GH_VIN_ENABLE_DEBUG_PRINT
  2867. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_debugFifoData1_pixel_1_read_data] --> 0x%08x\n",
  2868. REG_VIN_S_DEBUGFIFODATA1,value);
  2869. #endif
  2870. return tmp_value.bitc.pixel_1_read_data;
  2871. }
  2872. #endif /* GH_INLINE_LEVEL == 0 */
  2873. /*----------------------------------------------------------------------------*/
  2874. /* register VIN_S_debugStall (read) */
  2875. /*----------------------------------------------------------------------------*/
  2876. #if GH_INLINE_LEVEL == 0
  2877. /*! \brief Reads the register 'VIN_S_debugStall'. */
  2878. U32 GH_VIN_get_S_debugStall(void);
  2879. /*! \brief Reads the bit group 'output_interface_stall' of register 'VIN_S_debugStall'. */
  2880. U8 GH_VIN_get_S_debugStall_output_interface_stall(void);
  2881. #else /* GH_INLINE_LEVEL == 0 */
  2882. GH_INLINE U32 GH_VIN_get_S_debugStall(void)
  2883. {
  2884. U32 value = (*(volatile U32 *)REG_VIN_S_DEBUGSTALL);
  2885. #if GH_VIN_ENABLE_DEBUG_PRINT
  2886. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_debugStall] --> 0x%08x\n",
  2887. REG_VIN_S_DEBUGSTALL,value);
  2888. #endif
  2889. return value;
  2890. }
  2891. GH_INLINE U8 GH_VIN_get_S_debugStall_output_interface_stall(void)
  2892. {
  2893. GH_VIN_S_DEBUGSTALL_S tmp_value;
  2894. U32 value = (*(volatile U32 *)REG_VIN_S_DEBUGSTALL);
  2895. tmp_value.all = value;
  2896. #if GH_VIN_ENABLE_DEBUG_PRINT
  2897. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_debugStall_output_interface_stall] --> 0x%08x\n",
  2898. REG_VIN_S_DEBUGSTALL,value);
  2899. #endif
  2900. return tmp_value.bitc.output_interface_stall;
  2901. }
  2902. #endif /* GH_INLINE_LEVEL == 0 */
  2903. /*----------------------------------------------------------------------------*/
  2904. /* register VIN_S_slvsSatus (read) */
  2905. /*----------------------------------------------------------------------------*/
  2906. #if GH_INLINE_LEVEL == 0
  2907. /*! \brief Reads the register 'VIN_S_slvsSatus'. */
  2908. U32 GH_VIN_get_S_slvsSatus(void);
  2909. /*! \brief Reads the bit group 'slvs_lock_state' of register 'VIN_S_slvsSatus'. */
  2910. U8 GH_VIN_get_S_slvsSatus_slvs_lock_state(void);
  2911. /*! \brief Reads the bit group 'detected_sync_code_match' of register 'VIN_S_slvsSatus'. */
  2912. U8 GH_VIN_get_S_slvsSatus_detected_sync_code_match(void);
  2913. /*! \brief Reads the bit group 'detected_start_of_frame' of register 'VIN_S_slvsSatus'. */
  2914. U8 GH_VIN_get_S_slvsSatus_detected_start_of_frame(void);
  2915. /*! \brief Reads the bit group 'detected_vsync' of register 'VIN_S_slvsSatus'. */
  2916. U8 GH_VIN_get_S_slvsSatus_detected_vsync(void);
  2917. /*! \brief Reads the bit group 'detected_start_of_line' of register 'VIN_S_slvsSatus'. */
  2918. U8 GH_VIN_get_S_slvsSatus_detected_start_of_line(void);
  2919. /*! \brief Reads the bit group 'valid_pixel_generated' of register 'VIN_S_slvsSatus'. */
  2920. U8 GH_VIN_get_S_slvsSatus_valid_pixel_generated(void);
  2921. /*! \brief Reads the bit group 'end_of_line_generated' of register 'VIN_S_slvsSatus'. */
  2922. U8 GH_VIN_get_S_slvsSatus_end_of_line_generated(void);
  2923. /*! \brief Reads the bit group 'corrected_error' of register 'VIN_S_slvsSatus'. */
  2924. U8 GH_VIN_get_S_slvsSatus_corrected_error(void);
  2925. #else /* GH_INLINE_LEVEL == 0 */
  2926. GH_INLINE U32 GH_VIN_get_S_slvsSatus(void)
  2927. {
  2928. U32 value = (*(volatile U32 *)REG_VIN_S_SLVSSATUS);
  2929. #if GH_VIN_ENABLE_DEBUG_PRINT
  2930. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_slvsSatus] --> 0x%08x\n",
  2931. REG_VIN_S_SLVSSATUS,value);
  2932. #endif
  2933. return value;
  2934. }
  2935. GH_INLINE U8 GH_VIN_get_S_slvsSatus_slvs_lock_state(void)
  2936. {
  2937. GH_VIN_S_SLVSSATUS_S tmp_value;
  2938. U32 value = (*(volatile U32 *)REG_VIN_S_SLVSSATUS);
  2939. tmp_value.all = value;
  2940. #if GH_VIN_ENABLE_DEBUG_PRINT
  2941. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_slvsSatus_slvs_lock_state] --> 0x%08x\n",
  2942. REG_VIN_S_SLVSSATUS,value);
  2943. #endif
  2944. return tmp_value.bitc.slvs_lock_state;
  2945. }
  2946. GH_INLINE U8 GH_VIN_get_S_slvsSatus_detected_sync_code_match(void)
  2947. {
  2948. GH_VIN_S_SLVSSATUS_S tmp_value;
  2949. U32 value = (*(volatile U32 *)REG_VIN_S_SLVSSATUS);
  2950. tmp_value.all = value;
  2951. #if GH_VIN_ENABLE_DEBUG_PRINT
  2952. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_slvsSatus_detected_sync_code_match] --> 0x%08x\n",
  2953. REG_VIN_S_SLVSSATUS,value);
  2954. #endif
  2955. return tmp_value.bitc.detected_sync_code_match;
  2956. }
  2957. GH_INLINE U8 GH_VIN_get_S_slvsSatus_detected_start_of_frame(void)
  2958. {
  2959. GH_VIN_S_SLVSSATUS_S tmp_value;
  2960. U32 value = (*(volatile U32 *)REG_VIN_S_SLVSSATUS);
  2961. tmp_value.all = value;
  2962. #if GH_VIN_ENABLE_DEBUG_PRINT
  2963. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_slvsSatus_detected_start_of_frame] --> 0x%08x\n",
  2964. REG_VIN_S_SLVSSATUS,value);
  2965. #endif
  2966. return tmp_value.bitc.detected_start_of_frame;
  2967. }
  2968. GH_INLINE U8 GH_VIN_get_S_slvsSatus_detected_vsync(void)
  2969. {
  2970. GH_VIN_S_SLVSSATUS_S tmp_value;
  2971. U32 value = (*(volatile U32 *)REG_VIN_S_SLVSSATUS);
  2972. tmp_value.all = value;
  2973. #if GH_VIN_ENABLE_DEBUG_PRINT
  2974. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_slvsSatus_detected_vsync] --> 0x%08x\n",
  2975. REG_VIN_S_SLVSSATUS,value);
  2976. #endif
  2977. return tmp_value.bitc.detected_vsync;
  2978. }
  2979. GH_INLINE U8 GH_VIN_get_S_slvsSatus_detected_start_of_line(void)
  2980. {
  2981. GH_VIN_S_SLVSSATUS_S tmp_value;
  2982. U32 value = (*(volatile U32 *)REG_VIN_S_SLVSSATUS);
  2983. tmp_value.all = value;
  2984. #if GH_VIN_ENABLE_DEBUG_PRINT
  2985. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_slvsSatus_detected_start_of_line] --> 0x%08x\n",
  2986. REG_VIN_S_SLVSSATUS,value);
  2987. #endif
  2988. return tmp_value.bitc.detected_start_of_line;
  2989. }
  2990. GH_INLINE U8 GH_VIN_get_S_slvsSatus_valid_pixel_generated(void)
  2991. {
  2992. GH_VIN_S_SLVSSATUS_S tmp_value;
  2993. U32 value = (*(volatile U32 *)REG_VIN_S_SLVSSATUS);
  2994. tmp_value.all = value;
  2995. #if GH_VIN_ENABLE_DEBUG_PRINT
  2996. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_slvsSatus_valid_pixel_generated] --> 0x%08x\n",
  2997. REG_VIN_S_SLVSSATUS,value);
  2998. #endif
  2999. return tmp_value.bitc.valid_pixel_generated;
  3000. }
  3001. GH_INLINE U8 GH_VIN_get_S_slvsSatus_end_of_line_generated(void)
  3002. {
  3003. GH_VIN_S_SLVSSATUS_S tmp_value;
  3004. U32 value = (*(volatile U32 *)REG_VIN_S_SLVSSATUS);
  3005. tmp_value.all = value;
  3006. #if GH_VIN_ENABLE_DEBUG_PRINT
  3007. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_slvsSatus_end_of_line_generated] --> 0x%08x\n",
  3008. REG_VIN_S_SLVSSATUS,value);
  3009. #endif
  3010. return tmp_value.bitc.end_of_line_generated;
  3011. }
  3012. GH_INLINE U8 GH_VIN_get_S_slvsSatus_corrected_error(void)
  3013. {
  3014. GH_VIN_S_SLVSSATUS_S tmp_value;
  3015. U32 value = (*(volatile U32 *)REG_VIN_S_SLVSSATUS);
  3016. tmp_value.all = value;
  3017. #if GH_VIN_ENABLE_DEBUG_PRINT
  3018. GH_VIN_DEBUG_PRINT_FUNCTION( "value = RDREG(0x%08x); \\\\ [GH_VIN_get_S_slvsSatus_corrected_error] --> 0x%08x\n",
  3019. REG_VIN_S_SLVSSATUS,value);
  3020. #endif
  3021. return tmp_value.bitc.corrected_error;
  3022. }
  3023. #endif /* GH_INLINE_LEVEL == 0 */
  3024. /*----------------------------------------------------------------------------*/
  3025. /* init function */
  3026. /*----------------------------------------------------------------------------*/
  3027. /*! \brief Initialises the registers and mirror variables. */
  3028. void GH_VIN_init(void);
  3029. #ifdef __cplusplus
  3030. }
  3031. #endif
  3032. #endif /* _GH_VIN_H */
  3033. /*----------------------------------------------------------------------------*/
  3034. /* end of file */
  3035. /*----------------------------------------------------------------------------*/