stm32f7xx_hal_dma2d.c 41 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f7xx_hal_dma2d.c
  4. * @author MCD Application Team
  5. * @version V1.0.1
  6. * @date 25-June-2015
  7. * @brief DMA2D HAL module driver.
  8. * This file provides firmware functions to manage the following
  9. * functionalities of the DMA2D peripheral:
  10. * + Initialization and de-initialization functions
  11. * + IO operation functions
  12. * + Peripheral Control functions
  13. * + Peripheral State and Errors functions
  14. *
  15. @verbatim
  16. ==============================================================================
  17. ##### How to use this driver #####
  18. ==============================================================================
  19. [..]
  20. (#) Program the required configuration through following parameters:
  21. the Transfer Mode, the output color mode and the output offset using
  22. HAL_DMA2D_Init() function.
  23. (#) Program the required configuration through following parameters:
  24. the input color mode, the input color, input alpha value, alpha mode
  25. and the input offset using HAL_DMA2D_ConfigLayer() function for foreground
  26. or/and background layer.
  27. *** Polling mode IO operation ***
  28. =================================
  29. [..]
  30. (+) Configure the pdata, Destination and data length and Enable
  31. the transfer using HAL_DMA2D_Start()
  32. (+) Wait for end of transfer using HAL_DMA2D_PollForTransfer(), at this stage
  33. user can specify the value of timeout according to his end application.
  34. *** Interrupt mode IO operation ***
  35. ===================================
  36. [..]
  37. (#) Configure the pdata, Destination and data length and Enable
  38. the transfer using HAL_DMA2D_Start_IT()
  39. (#) Use HAL_DMA2D_IRQHandler() called under DMA2D_IRQHandler() Interrupt subroutine
  40. (#) At the end of data transfer HAL_DMA2D_IRQHandler() function is executed and user can
  41. add his own function by customization of function pointer XferCpltCallback and
  42. XferErrorCallback (i.e a member of DMA2D handle structure).
  43. -@- In Register-to-Memory transfer mode, the pdata parameter is the register
  44. color, in Memory-to-memory or memory-to-memory with pixel format
  45. conversion the pdata is the source address.
  46. -@- Configure the foreground source address, the background source address,
  47. the Destination and data length and Enable the transfer using
  48. HAL_DMA2D_BlendingStart() in polling mode and HAL_DMA2D_BlendingStart_IT()
  49. in interrupt mode.
  50. -@- HAL_DMA2D_BlendingStart() and HAL_DMA2D_BlendingStart_IT() functions
  51. are used if the memory to memory with blending transfer mode is selected.
  52. (#) Optionally, configure and enable the CLUT using HAL_DMA2D_ConfigCLUT()
  53. HAL_DMA2D_EnableCLUT() functions.
  54. (#) Optionally, configure and enable LineInterrupt using the following function:
  55. HAL_DMA2D_ProgramLineEvent().
  56. (#) The transfer can be suspended, continued and aborted using the following
  57. functions: HAL_DMA2D_Suspend(), HAL_DMA2D_Resume(), HAL_DMA2D_Abort().
  58. (#) To control DMA2D state you can use the following function: HAL_DMA2D_GetState()
  59. *** DMA2D HAL driver macros list ***
  60. =============================================
  61. [..]
  62. Below the list of most used macros in DMA2D HAL driver :
  63. (+) __HAL_DMA2D_ENABLE: Enable the DMA2D peripheral.
  64. (+) __HAL_DMA2D_DISABLE: Disable the DMA2D peripheral.
  65. (+) __HAL_DMA2D_GET_FLAG: Get the DMA2D pending flags.
  66. (+) __HAL_DMA2D_CLEAR_FLAG: Clear the DMA2D pending flags.
  67. (+) __HAL_DMA2D_ENABLE_IT: Enable the specified DMA2D interrupts.
  68. (+) __HAL_DMA2D_DISABLE_IT: Disable the specified DMA2D interrupts.
  69. (+) __HAL_DMA2D_GET_IT_SOURCE: Check whether the specified DMA2D interrupt has occurred or not.
  70. [..]
  71. (@) You can refer to the DMA2D HAL driver header file for more useful macros
  72. @endverbatim
  73. ******************************************************************************
  74. * @attention
  75. *
  76. * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  77. *
  78. * Redistribution and use in source and binary forms, with or without modification,
  79. * are permitted provided that the following conditions are met:
  80. * 1. Redistributions of source code must retain the above copyright notice,
  81. * this list of conditions and the following disclaimer.
  82. * 2. Redistributions in binary form must reproduce the above copyright notice,
  83. * this list of conditions and the following disclaimer in the documentation
  84. * and/or other materials provided with the distribution.
  85. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  86. * may be used to endorse or promote products derived from this software
  87. * without specific prior written permission.
  88. *
  89. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  90. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  91. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  92. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  93. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  94. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  95. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  96. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  97. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  98. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  99. *
  100. ******************************************************************************
  101. */
  102. /* Includes ------------------------------------------------------------------*/
  103. #include "stm32f7xx_hal.h"
  104. /** @addtogroup STM32F7xx_HAL_Driver
  105. * @{
  106. */
  107. /** @addtogroup DMA2D
  108. * @brief DMA2D HAL module driver
  109. * @{
  110. */
  111. #ifdef HAL_DMA2D_MODULE_ENABLED
  112. /* Private types -------------------------------------------------------------*/
  113. /* Private define ------------------------------------------------------------*/
  114. /** @addtogroup DMA2D_Private_Defines
  115. * @{
  116. */
  117. #define HAL_TIMEOUT_DMA2D_ABORT ((uint32_t)1000) /* 1s */
  118. #define HAL_TIMEOUT_DMA2D_SUSPEND ((uint32_t)1000) /* 1s */
  119. /**
  120. * @}
  121. */
  122. /* Private variables ---------------------------------------------------------*/
  123. /* Private constants ---------------------------------------------------------*/
  124. /* Private macro -------------------------------------------------------------*/
  125. /* Private function prototypes -----------------------------------------------*/
  126. /** @addtogroup DMA2D_Private_Functions_Prototypes
  127. * @{
  128. */
  129. static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height);
  130. /**
  131. * @}
  132. */
  133. /* Private functions ---------------------------------------------------------*/
  134. /* Exported functions --------------------------------------------------------*/
  135. /** @addtogroup DMA2D_Exported_Functions
  136. * @{
  137. */
  138. /** @defgroup DMA2D_Group1 Initialization and Configuration functions
  139. * @brief Initialization and Configuration functions
  140. *
  141. @verbatim
  142. ===============================================================================
  143. ##### Initialization and Configuration functions #####
  144. ===============================================================================
  145. [..] This section provides functions allowing to:
  146. (+) Initialize and configure the DMA2D
  147. (+) De-initialize the DMA2D
  148. @endverbatim
  149. * @{
  150. */
  151. /**
  152. * @brief Initializes the DMA2D according to the specified
  153. * parameters in the DMA2D_InitTypeDef and create the associated handle.
  154. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  155. * the configuration information for the DMA2D.
  156. * @retval HAL status
  157. */
  158. HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
  159. {
  160. uint32_t tmp = 0;
  161. /* Check the DMA2D peripheral state */
  162. if(hdma2d == NULL)
  163. {
  164. return HAL_ERROR;
  165. }
  166. /* Check the parameters */
  167. assert_param(IS_DMA2D_ALL_INSTANCE(hdma2d->Instance));
  168. assert_param(IS_DMA2D_MODE(hdma2d->Init.Mode));
  169. assert_param(IS_DMA2D_CMODE(hdma2d->Init.ColorMode));
  170. assert_param(IS_DMA2D_OFFSET(hdma2d->Init.OutputOffset));
  171. if(hdma2d->State == HAL_DMA2D_STATE_RESET)
  172. {
  173. /* Allocate lock resource and initialize it */
  174. hdma2d->Lock = HAL_UNLOCKED;
  175. /* Init the low level hardware */
  176. HAL_DMA2D_MspInit(hdma2d);
  177. }
  178. /* Change DMA2D peripheral state */
  179. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  180. /* DMA2D CR register configuration -------------------------------------------*/
  181. /* Get the CR register value */
  182. tmp = hdma2d->Instance->CR;
  183. /* Clear Mode bits */
  184. tmp &= (uint32_t)~DMA2D_CR_MODE;
  185. /* Prepare the value to be wrote to the CR register */
  186. tmp |= hdma2d->Init.Mode;
  187. /* Write to DMA2D CR register */
  188. hdma2d->Instance->CR = tmp;
  189. /* DMA2D OPFCCR register configuration ---------------------------------------*/
  190. /* Get the OPFCCR register value */
  191. tmp = hdma2d->Instance->OPFCCR;
  192. /* Clear Color Mode bits */
  193. tmp &= (uint32_t)~DMA2D_OPFCCR_CM;
  194. /* Prepare the value to be wrote to the OPFCCR register */
  195. tmp |= hdma2d->Init.ColorMode;
  196. /* Write to DMA2D OPFCCR register */
  197. hdma2d->Instance->OPFCCR = tmp;
  198. /* DMA2D OOR register configuration ------------------------------------------*/
  199. /* Get the OOR register value */
  200. tmp = hdma2d->Instance->OOR;
  201. /* Clear Offset bits */
  202. tmp &= (uint32_t)~DMA2D_OOR_LO;
  203. /* Prepare the value to be wrote to the OOR register */
  204. tmp |= hdma2d->Init.OutputOffset;
  205. /* Write to DMA2D OOR register */
  206. hdma2d->Instance->OOR = tmp;
  207. /* Update error code */
  208. hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
  209. /* Initialize the DMA2D state*/
  210. hdma2d->State = HAL_DMA2D_STATE_READY;
  211. return HAL_OK;
  212. }
  213. /**
  214. * @brief Deinitializes the DMA2D peripheral registers to their default reset
  215. * values.
  216. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  217. * the configuration information for the DMA2D.
  218. * @retval None
  219. */
  220. HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d)
  221. {
  222. /* Check the DMA2D peripheral state */
  223. if(hdma2d == NULL)
  224. {
  225. return HAL_ERROR;
  226. }
  227. /* DeInit the low level hardware */
  228. HAL_DMA2D_MspDeInit(hdma2d);
  229. /* Update error code */
  230. hdma2d->ErrorCode = HAL_DMA2D_ERROR_NONE;
  231. /* Initialize the DMA2D state*/
  232. hdma2d->State = HAL_DMA2D_STATE_RESET;
  233. /* Release Lock */
  234. __HAL_UNLOCK(hdma2d);
  235. return HAL_OK;
  236. }
  237. /**
  238. * @brief Initializes the DMA2D MSP.
  239. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  240. * the configuration information for the DMA2D.
  241. * @retval None
  242. */
  243. __weak void HAL_DMA2D_MspInit(DMA2D_HandleTypeDef* hdma2d)
  244. {
  245. /* NOTE : This function Should not be modified, when the callback is needed,
  246. the HAL_DMA2D_MspInit could be implemented in the user file
  247. */
  248. }
  249. /**
  250. * @brief DeInitializes the DMA2D MSP.
  251. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  252. * the configuration information for the DMA2D.
  253. * @retval None
  254. */
  255. __weak void HAL_DMA2D_MspDeInit(DMA2D_HandleTypeDef* hdma2d)
  256. {
  257. /* NOTE : This function Should not be modified, when the callback is needed,
  258. the HAL_DMA2D_MspDeInit could be implemented in the user file
  259. */
  260. }
  261. /**
  262. * @}
  263. */
  264. /** @defgroup DMA2D_Group2 IO operation functions
  265. * @brief IO operation functions
  266. *
  267. @verbatim
  268. ===============================================================================
  269. ##### IO operation functions #####
  270. ===============================================================================
  271. [..] This section provides functions allowing to:
  272. (+) Configure the pdata, destination address and data size and
  273. Start DMA2D transfer.
  274. (+) Configure the source for foreground and background, destination address
  275. and data size and Start MultiBuffer DMA2D transfer.
  276. (+) Configure the pdata, destination address and data size and
  277. Start DMA2D transfer with interrupt.
  278. (+) Configure the source for foreground and background, destination address
  279. and data size and Start MultiBuffer DMA2D transfer with interrupt.
  280. (+) Abort DMA2D transfer.
  281. (+) Suspend DMA2D transfer.
  282. (+) Continue DMA2D transfer.
  283. (+) Poll for transfer complete.
  284. (+) handle DMA2D interrupt request.
  285. @endverbatim
  286. * @{
  287. */
  288. /**
  289. * @brief Start the DMA2D Transfer.
  290. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  291. * the configuration information for the DMA2D.
  292. * @param pdata: Configure the source memory Buffer address if
  293. * the memory to memory or memory to memory with pixel format
  294. * conversion DMA2D mode is selected, and configure
  295. * the color value if register to memory DMA2D mode is selected.
  296. * @param DstAddress: The destination memory Buffer address.
  297. * @param Width: The width of data to be transferred from source to destination.
  298. * @param Height: The height of data to be transferred from source to destination.
  299. * @retval HAL status
  300. */
  301. HAL_StatusTypeDef HAL_DMA2D_Start(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
  302. {
  303. /* Process locked */
  304. __HAL_LOCK(hdma2d);
  305. /* Change DMA2D peripheral state */
  306. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  307. /* Check the parameters */
  308. assert_param(IS_DMA2D_LINE(Height));
  309. assert_param(IS_DMA2D_PIXEL(Width));
  310. /* Disable the Peripheral */
  311. __HAL_DMA2D_DISABLE(hdma2d);
  312. /* Configure the source, destination address and the data size */
  313. DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
  314. /* Enable the Peripheral */
  315. __HAL_DMA2D_ENABLE(hdma2d);
  316. return HAL_OK;
  317. }
  318. /**
  319. * @brief Start the DMA2D Transfer with interrupt enabled.
  320. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  321. * the configuration information for the DMA2D.
  322. * @param pdata: Configure the source memory Buffer address if
  323. * the memory to memory or memory to memory with pixel format
  324. * conversion DMA2D mode is selected, and configure
  325. * the color value if register to memory DMA2D mode is selected.
  326. * @param DstAddress: The destination memory Buffer address.
  327. * @param Width: The width of data to be transferred from source to destination.
  328. * @param Height: The height of data to be transferred from source to destination.
  329. * @retval HAL status
  330. */
  331. HAL_StatusTypeDef HAL_DMA2D_Start_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
  332. {
  333. /* Process locked */
  334. __HAL_LOCK(hdma2d);
  335. /* Change DMA2D peripheral state */
  336. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  337. /* Check the parameters */
  338. assert_param(IS_DMA2D_LINE(Height));
  339. assert_param(IS_DMA2D_PIXEL(Width));
  340. /* Disable the Peripheral */
  341. __HAL_DMA2D_DISABLE(hdma2d);
  342. /* Configure the source, destination address and the data size */
  343. DMA2D_SetConfig(hdma2d, pdata, DstAddress, Width, Height);
  344. /* Enable the transfer complete interrupt */
  345. __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
  346. /* Enable the transfer Error interrupt */
  347. __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
  348. /* Enable the Peripheral */
  349. __HAL_DMA2D_ENABLE(hdma2d);
  350. /* Enable the configuration error interrupt */
  351. __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
  352. return HAL_OK;
  353. }
  354. /**
  355. * @brief Start the multi-source DMA2D Transfer.
  356. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  357. * the configuration information for the DMA2D.
  358. * @param SrcAddress1: The source memory Buffer address of the foreground layer.
  359. * @param SrcAddress2: The source memory Buffer address of the background layer.
  360. * @param DstAddress: The destination memory Buffer address
  361. * @param Width: The width of data to be transferred from source to destination.
  362. * @param Height: The height of data to be transferred from source to destination.
  363. * @retval HAL status
  364. */
  365. HAL_StatusTypeDef HAL_DMA2D_BlendingStart(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
  366. {
  367. /* Process locked */
  368. __HAL_LOCK(hdma2d);
  369. /* Change DMA2D peripheral state */
  370. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  371. /* Check the parameters */
  372. assert_param(IS_DMA2D_LINE(Height));
  373. assert_param(IS_DMA2D_PIXEL(Width));
  374. /* Disable the Peripheral */
  375. __HAL_DMA2D_DISABLE(hdma2d);
  376. /* Configure DMA2D Stream source2 address */
  377. hdma2d->Instance->BGMAR = SrcAddress2;
  378. /* Configure the source, destination address and the data size */
  379. DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Height);
  380. /* Enable the Peripheral */
  381. __HAL_DMA2D_ENABLE(hdma2d);
  382. return HAL_OK;
  383. }
  384. /**
  385. * @brief Start the multi-source DMA2D Transfer with interrupt enabled.
  386. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  387. * the configuration information for the DMA2D.
  388. * @param SrcAddress1: The source memory Buffer address of the foreground layer.
  389. * @param SrcAddress2: The source memory Buffer address of the background layer.
  390. * @param DstAddress: The destination memory Buffer address.
  391. * @param Width: The width of data to be transferred from source to destination.
  392. * @param Height: The height of data to be transferred from source to destination.
  393. * @retval HAL status
  394. */
  395. HAL_StatusTypeDef HAL_DMA2D_BlendingStart_IT(DMA2D_HandleTypeDef *hdma2d, uint32_t SrcAddress1, uint32_t SrcAddress2, uint32_t DstAddress, uint32_t Width, uint32_t Height)
  396. {
  397. /* Process locked */
  398. __HAL_LOCK(hdma2d);
  399. /* Change DMA2D peripheral state */
  400. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  401. /* Check the parameters */
  402. assert_param(IS_DMA2D_LINE(Height));
  403. assert_param(IS_DMA2D_PIXEL(Width));
  404. /* Disable the Peripheral */
  405. __HAL_DMA2D_DISABLE(hdma2d);
  406. /* Configure DMA2D Stream source2 address */
  407. hdma2d->Instance->BGMAR = SrcAddress2;
  408. /* Configure the source, destination address and the data size */
  409. DMA2D_SetConfig(hdma2d, SrcAddress1, DstAddress, Width, Height);
  410. /* Enable the configuration error interrupt */
  411. __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_CE);
  412. /* Enable the transfer complete interrupt */
  413. __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TC);
  414. /* Enable the transfer Error interrupt */
  415. __HAL_DMA2D_ENABLE_IT(hdma2d, DMA2D_IT_TE);
  416. /* Enable the Peripheral */
  417. __HAL_DMA2D_ENABLE(hdma2d);
  418. return HAL_OK;
  419. }
  420. /**
  421. * @brief Abort the DMA2D Transfer.
  422. * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
  423. * the configuration information for the DMA2D.
  424. * @retval HAL status
  425. */
  426. HAL_StatusTypeDef HAL_DMA2D_Abort(DMA2D_HandleTypeDef *hdma2d)
  427. {
  428. uint32_t tickstart = 0;
  429. /* Disable the DMA2D */
  430. __HAL_DMA2D_DISABLE(hdma2d);
  431. /* Get tick */
  432. tickstart = HAL_GetTick();
  433. /* Check if the DMA2D is effectively disabled */
  434. while((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
  435. {
  436. if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_ABORT)
  437. {
  438. /* Update error code */
  439. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
  440. /* Change the DMA2D state */
  441. hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
  442. /* Process Unlocked */
  443. __HAL_UNLOCK(hdma2d);
  444. return HAL_TIMEOUT;
  445. }
  446. }
  447. /* Process Unlocked */
  448. __HAL_UNLOCK(hdma2d);
  449. /* Change the DMA2D state*/
  450. hdma2d->State = HAL_DMA2D_STATE_READY;
  451. return HAL_OK;
  452. }
  453. /**
  454. * @brief Suspend the DMA2D Transfer.
  455. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  456. * the configuration information for the DMA2D.
  457. * @retval HAL status
  458. */
  459. HAL_StatusTypeDef HAL_DMA2D_Suspend(DMA2D_HandleTypeDef *hdma2d)
  460. {
  461. uint32_t tickstart = 0;
  462. /* Suspend the DMA2D transfer */
  463. hdma2d->Instance->CR |= DMA2D_CR_SUSP;
  464. /* Get tick */
  465. tickstart = HAL_GetTick();
  466. /* Check if the DMA2D is effectively suspended */
  467. while((hdma2d->Instance->CR & DMA2D_CR_SUSP) != DMA2D_CR_SUSP)
  468. {
  469. if((HAL_GetTick() - tickstart ) > HAL_TIMEOUT_DMA2D_SUSPEND)
  470. {
  471. /* Update error code */
  472. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
  473. /* Change the DMA2D state */
  474. hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
  475. return HAL_TIMEOUT;
  476. }
  477. }
  478. /* Change the DMA2D state*/
  479. hdma2d->State = HAL_DMA2D_STATE_SUSPEND;
  480. return HAL_OK;
  481. }
  482. /**
  483. * @brief Resume the DMA2D Transfer.
  484. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  485. * the configuration information for the DMA2D.
  486. * @retval HAL status
  487. */
  488. HAL_StatusTypeDef HAL_DMA2D_Resume(DMA2D_HandleTypeDef *hdma2d)
  489. {
  490. /* Resume the DMA2D transfer */
  491. hdma2d->Instance->CR &= ~DMA2D_CR_SUSP;
  492. /* Change the DMA2D state*/
  493. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  494. return HAL_OK;
  495. }
  496. /**
  497. * @brief Polling for transfer complete or CLUT loading.
  498. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  499. * the configuration information for the DMA2D.
  500. * @param Timeout: Timeout duration
  501. * @retval HAL status
  502. */
  503. HAL_StatusTypeDef HAL_DMA2D_PollForTransfer(DMA2D_HandleTypeDef *hdma2d, uint32_t Timeout)
  504. {
  505. uint32_t tmp, tmp1;
  506. uint32_t tickstart = 0;
  507. /* Polling for DMA2D transfer */
  508. if((hdma2d->Instance->CR & DMA2D_CR_START) != 0)
  509. {
  510. /* Get tick */
  511. tickstart = HAL_GetTick();
  512. while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) == RESET)
  513. {
  514. tmp = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE);
  515. tmp1 = __HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE);
  516. if((tmp != RESET) || (tmp1 != RESET))
  517. {
  518. /* Clear the transfer and configuration error flags */
  519. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
  520. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
  521. /* Change DMA2D state */
  522. hdma2d->State= HAL_DMA2D_STATE_ERROR;
  523. /* Process unlocked */
  524. __HAL_UNLOCK(hdma2d);
  525. return HAL_ERROR;
  526. }
  527. /* Check for the Timeout */
  528. if(Timeout != HAL_MAX_DELAY)
  529. {
  530. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  531. {
  532. /* Process unlocked */
  533. __HAL_UNLOCK(hdma2d);
  534. /* Update error code */
  535. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
  536. /* Change the DMA2D state */
  537. hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
  538. return HAL_TIMEOUT;
  539. }
  540. }
  541. }
  542. }
  543. /* Polling for CLUT loading */
  544. if((hdma2d->Instance->FGPFCCR & DMA2D_FGPFCCR_START) != 0)
  545. {
  546. /* Get tick */
  547. tickstart = HAL_GetTick();
  548. while(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CTC) == RESET)
  549. {
  550. if((__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CAE) != RESET))
  551. {
  552. /* Clear the transfer and configuration error flags */
  553. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CAE);
  554. /* Change DMA2D state */
  555. hdma2d->State= HAL_DMA2D_STATE_ERROR;
  556. return HAL_ERROR;
  557. }
  558. /* Check for the Timeout */
  559. if(Timeout != HAL_MAX_DELAY)
  560. {
  561. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  562. {
  563. /* Update error code */
  564. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TIMEOUT;
  565. /* Change the DMA2D state */
  566. hdma2d->State= HAL_DMA2D_STATE_TIMEOUT;
  567. return HAL_TIMEOUT;
  568. }
  569. }
  570. }
  571. }
  572. /* Clear the transfer complete flag */
  573. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
  574. /* Clear the CLUT loading flag */
  575. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CTC);
  576. /* Change DMA2D state */
  577. hdma2d->State = HAL_DMA2D_STATE_READY;
  578. /* Process unlocked */
  579. __HAL_UNLOCK(hdma2d);
  580. return HAL_OK;
  581. }
  582. /**
  583. * @brief Handles DMA2D interrupt request.
  584. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  585. * the configuration information for the DMA2D.
  586. * @retval HAL status
  587. */
  588. void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
  589. {
  590. /* Transfer Error Interrupt management ***************************************/
  591. if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TE) != RESET)
  592. {
  593. if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TE) != RESET)
  594. {
  595. /* Disable the transfer Error interrupt */
  596. __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TE);
  597. /* Update error code */
  598. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_TE;
  599. /* Clear the transfer error flag */
  600. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TE);
  601. /* Change DMA2D state */
  602. hdma2d->State = HAL_DMA2D_STATE_ERROR;
  603. /* Process Unlocked */
  604. __HAL_UNLOCK(hdma2d);
  605. if(hdma2d->XferErrorCallback != NULL)
  606. {
  607. /* Transfer error Callback */
  608. hdma2d->XferErrorCallback(hdma2d);
  609. }
  610. }
  611. }
  612. /* Configuration Error Interrupt management **********************************/
  613. if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_CE) != RESET)
  614. {
  615. if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_CE) != RESET)
  616. {
  617. /* Disable the Configuration Error interrupt */
  618. __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_CE);
  619. /* Clear the Configuration error flag */
  620. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_CE);
  621. /* Update error code */
  622. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_CE;
  623. /* Change DMA2D state */
  624. hdma2d->State = HAL_DMA2D_STATE_ERROR;
  625. /* Process Unlocked */
  626. __HAL_UNLOCK(hdma2d);
  627. if(hdma2d->XferErrorCallback != NULL)
  628. {
  629. /* Transfer error Callback */
  630. hdma2d->XferErrorCallback(hdma2d);
  631. }
  632. }
  633. }
  634. /* Transfer Complete Interrupt management ************************************/
  635. if(__HAL_DMA2D_GET_FLAG(hdma2d, DMA2D_FLAG_TC) != RESET)
  636. {
  637. if(__HAL_DMA2D_GET_IT_SOURCE(hdma2d, DMA2D_IT_TC) != RESET)
  638. {
  639. /* Disable the transfer complete interrupt */
  640. __HAL_DMA2D_DISABLE_IT(hdma2d, DMA2D_IT_TC);
  641. /* Clear the transfer complete flag */
  642. __HAL_DMA2D_CLEAR_FLAG(hdma2d, DMA2D_FLAG_TC);
  643. /* Update error code */
  644. hdma2d->ErrorCode |= HAL_DMA2D_ERROR_NONE;
  645. /* Change DMA2D state */
  646. hdma2d->State = HAL_DMA2D_STATE_READY;
  647. /* Process Unlocked */
  648. __HAL_UNLOCK(hdma2d);
  649. if(hdma2d->XferCpltCallback != NULL)
  650. {
  651. /* Transfer complete Callback */
  652. hdma2d->XferCpltCallback(hdma2d);
  653. }
  654. }
  655. }
  656. }
  657. /**
  658. * @}
  659. */
  660. /** @defgroup DMA2D_Group3 Peripheral Control functions
  661. * @brief Peripheral Control functions
  662. *
  663. @verbatim
  664. ===============================================================================
  665. ##### Peripheral Control functions #####
  666. ===============================================================================
  667. [..] This section provides functions allowing to:
  668. (+) Configure the DMA2D foreground or/and background parameters.
  669. (+) Configure the DMA2D CLUT transfer.
  670. (+) Enable DMA2D CLUT.
  671. (+) Disable DMA2D CLUT.
  672. (+) Configure the line watermark
  673. @endverbatim
  674. * @{
  675. */
  676. /**
  677. * @brief Configure the DMA2D Layer according to the specified
  678. * parameters in the DMA2D_InitTypeDef and create the associated handle.
  679. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  680. * the configuration information for the DMA2D.
  681. * @param LayerIdx: DMA2D Layer index.
  682. * This parameter can be one of the following values:
  683. * 0(background) / 1(foreground)
  684. * @retval HAL status
  685. */
  686. HAL_StatusTypeDef HAL_DMA2D_ConfigLayer(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
  687. {
  688. DMA2D_LayerCfgTypeDef *pLayerCfg = &hdma2d->LayerCfg[LayerIdx];
  689. uint32_t tmp = 0;
  690. /* Process locked */
  691. __HAL_LOCK(hdma2d);
  692. /* Change DMA2D peripheral state */
  693. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  694. /* Check the parameters */
  695. assert_param(IS_DMA2D_LAYER(LayerIdx));
  696. assert_param(IS_DMA2D_OFFSET(pLayerCfg->InputOffset));
  697. if(hdma2d->Init.Mode != DMA2D_R2M)
  698. {
  699. assert_param(IS_DMA2D_INPUT_COLOR_MODE(pLayerCfg->InputColorMode));
  700. if(hdma2d->Init.Mode != DMA2D_M2M)
  701. {
  702. assert_param(IS_DMA2D_ALPHA_MODE(pLayerCfg->AlphaMode));
  703. }
  704. }
  705. /* Configure the background DMA2D layer */
  706. if(LayerIdx == 0)
  707. {
  708. /* DMA2D BGPFCR register configuration -----------------------------------*/
  709. /* Get the BGPFCCR register value */
  710. tmp = hdma2d->Instance->BGPFCCR;
  711. /* Clear Input color mode, alpha value and alpha mode bits */
  712. tmp &= (uint32_t)~(DMA2D_BGPFCCR_CM | DMA2D_BGPFCCR_AM | DMA2D_BGPFCCR_ALPHA);
  713. if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
  714. {
  715. /* Prepare the value to be wrote to the BGPFCCR register */
  716. tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
  717. }
  718. else
  719. {
  720. /* Prepare the value to be wrote to the BGPFCCR register */
  721. tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
  722. }
  723. /* Write to DMA2D BGPFCCR register */
  724. hdma2d->Instance->BGPFCCR = tmp;
  725. /* DMA2D BGOR register configuration -------------------------------------*/
  726. /* Get the BGOR register value */
  727. tmp = hdma2d->Instance->BGOR;
  728. /* Clear colors bits */
  729. tmp &= (uint32_t)~DMA2D_BGOR_LO;
  730. /* Prepare the value to be wrote to the BGOR register */
  731. tmp |= pLayerCfg->InputOffset;
  732. /* Write to DMA2D BGOR register */
  733. hdma2d->Instance->BGOR = tmp;
  734. if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
  735. {
  736. /* Prepare the value to be wrote to the BGCOLR register */
  737. tmp = ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
  738. /* Write to DMA2D BGCOLR register */
  739. hdma2d->Instance->BGCOLR = tmp;
  740. }
  741. }
  742. /* Configure the foreground DMA2D layer */
  743. else
  744. {
  745. /* DMA2D FGPFCR register configuration -----------------------------------*/
  746. /* Get the FGPFCCR register value */
  747. tmp = hdma2d->Instance->FGPFCCR;
  748. /* Clear Input color mode, alpha value and alpha mode bits */
  749. tmp &= (uint32_t)~(DMA2D_FGPFCCR_CM | DMA2D_FGPFCCR_AM | DMA2D_FGPFCCR_ALPHA);
  750. if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
  751. {
  752. /* Prepare the value to be wrote to the FGPFCCR register */
  753. tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | ((pLayerCfg->InputAlpha) & 0xFF000000));
  754. }
  755. else
  756. {
  757. /* Prepare the value to be wrote to the FGPFCCR register */
  758. tmp |= (pLayerCfg->InputColorMode | (pLayerCfg->AlphaMode << 16) | (pLayerCfg->InputAlpha << 24));
  759. }
  760. /* Write to DMA2D FGPFCCR register */
  761. hdma2d->Instance->FGPFCCR = tmp;
  762. /* DMA2D FGOR register configuration -------------------------------------*/
  763. /* Get the FGOR register value */
  764. tmp = hdma2d->Instance->FGOR;
  765. /* Clear colors bits */
  766. tmp &= (uint32_t)~DMA2D_FGOR_LO;
  767. /* Prepare the value to be wrote to the FGOR register */
  768. tmp |= pLayerCfg->InputOffset;
  769. /* Write to DMA2D FGOR register */
  770. hdma2d->Instance->FGOR = tmp;
  771. if ((pLayerCfg->InputColorMode == CM_A4) || (pLayerCfg->InputColorMode == CM_A8))
  772. {
  773. /* Prepare the value to be wrote to the FGCOLR register */
  774. tmp = ((pLayerCfg->InputAlpha) & 0x00FFFFFF);
  775. /* Write to DMA2D FGCOLR register */
  776. hdma2d->Instance->FGCOLR = tmp;
  777. }
  778. }
  779. /* Initialize the DMA2D state*/
  780. hdma2d->State = HAL_DMA2D_STATE_READY;
  781. /* Process unlocked */
  782. __HAL_UNLOCK(hdma2d);
  783. return HAL_OK;
  784. }
  785. /**
  786. * @brief Configure the DMA2D CLUT Transfer.
  787. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  788. * the configuration information for the DMA2D.
  789. * @param CLUTCfg: pointer to a DMA2D_CLUTCfgTypeDef structure that contains
  790. * the configuration information for the color look up table.
  791. * @param LayerIdx: DMA2D Layer index.
  792. * This parameter can be one of the following values:
  793. * 0(background) / 1(foreground)
  794. * @retval HAL status
  795. */
  796. HAL_StatusTypeDef HAL_DMA2D_ConfigCLUT(DMA2D_HandleTypeDef *hdma2d, DMA2D_CLUTCfgTypeDef CLUTCfg, uint32_t LayerIdx)
  797. {
  798. uint32_t tmp = 0, tmp1 = 0;
  799. /* Check the parameters */
  800. assert_param(IS_DMA2D_LAYER(LayerIdx));
  801. assert_param(IS_DMA2D_CLUT_CM(CLUTCfg.CLUTColorMode));
  802. assert_param(IS_DMA2D_CLUT_SIZE(CLUTCfg.Size));
  803. /* Configure the CLUT of the background DMA2D layer */
  804. if(LayerIdx == 0)
  805. {
  806. /* Get the BGCMAR register value */
  807. tmp = hdma2d->Instance->BGCMAR;
  808. /* Clear CLUT address bits */
  809. tmp &= (uint32_t)~DMA2D_BGCMAR_MA;
  810. /* Prepare the value to be wrote to the BGCMAR register */
  811. tmp |= (uint32_t)CLUTCfg.pCLUT;
  812. /* Write to DMA2D BGCMAR register */
  813. hdma2d->Instance->BGCMAR = tmp;
  814. /* Get the BGPFCCR register value */
  815. tmp = hdma2d->Instance->BGPFCCR;
  816. /* Clear CLUT size and CLUT address bits */
  817. tmp &= (uint32_t)~(DMA2D_BGPFCCR_CS | DMA2D_BGPFCCR_CCM);
  818. /* Get the CLUT size */
  819. tmp1 = CLUTCfg.Size << 16;
  820. /* Prepare the value to be wrote to the BGPFCCR register */
  821. tmp |= (CLUTCfg.CLUTColorMode | tmp1);
  822. /* Write to DMA2D BGPFCCR register */
  823. hdma2d->Instance->BGPFCCR = tmp;
  824. }
  825. /* Configure the CLUT of the foreground DMA2D layer */
  826. else
  827. {
  828. /* Get the FGCMAR register value */
  829. tmp = hdma2d->Instance->FGCMAR;
  830. /* Clear CLUT address bits */
  831. tmp &= (uint32_t)~DMA2D_FGCMAR_MA;
  832. /* Prepare the value to be wrote to the FGCMAR register */
  833. tmp |= (uint32_t)CLUTCfg.pCLUT;
  834. /* Write to DMA2D FGCMAR register */
  835. hdma2d->Instance->FGCMAR = tmp;
  836. /* Get the FGPFCCR register value */
  837. tmp = hdma2d->Instance->FGPFCCR;
  838. /* Clear CLUT size and CLUT address bits */
  839. tmp &= (uint32_t)~(DMA2D_FGPFCCR_CS | DMA2D_FGPFCCR_CCM);
  840. /* Get the CLUT size */
  841. tmp1 = CLUTCfg.Size << 8;
  842. /* Prepare the value to be wrote to the FGPFCCR register */
  843. tmp |= (CLUTCfg.CLUTColorMode | tmp1);
  844. /* Write to DMA2D FGPFCCR register */
  845. hdma2d->Instance->FGPFCCR = tmp;
  846. }
  847. return HAL_OK;
  848. }
  849. /**
  850. * @brief Enable the DMA2D CLUT Transfer.
  851. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  852. * the configuration information for the DMA2D.
  853. * @param LayerIdx: DMA2D Layer index.
  854. * This parameter can be one of the following values:
  855. * 0(background) / 1(foreground)
  856. * @retval HAL status
  857. */
  858. HAL_StatusTypeDef HAL_DMA2D_EnableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
  859. {
  860. /* Check the parameters */
  861. assert_param(IS_DMA2D_LAYER(LayerIdx));
  862. if(LayerIdx == 0)
  863. {
  864. /* Enable the CLUT loading for the background */
  865. hdma2d->Instance->BGPFCCR |= DMA2D_BGPFCCR_START;
  866. }
  867. else
  868. {
  869. /* Enable the CLUT loading for the foreground */
  870. hdma2d->Instance->FGPFCCR |= DMA2D_FGPFCCR_START;
  871. }
  872. return HAL_OK;
  873. }
  874. /**
  875. * @brief Disable the DMA2D CLUT Transfer.
  876. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  877. * the configuration information for the DMA2D.
  878. * @param LayerIdx: DMA2D Layer index.
  879. * This parameter can be one of the following values:
  880. * 0(background) / 1(foreground)
  881. * @retval HAL status
  882. */
  883. HAL_StatusTypeDef HAL_DMA2D_DisableCLUT(DMA2D_HandleTypeDef *hdma2d, uint32_t LayerIdx)
  884. {
  885. /* Check the parameters */
  886. assert_param(IS_DMA2D_LAYER(LayerIdx));
  887. if(LayerIdx == 0)
  888. {
  889. /* Disable the CLUT loading for the background */
  890. hdma2d->Instance->BGPFCCR &= ~DMA2D_BGPFCCR_START;
  891. }
  892. else
  893. {
  894. /* Disable the CLUT loading for the foreground */
  895. hdma2d->Instance->FGPFCCR &= ~DMA2D_FGPFCCR_START;
  896. }
  897. return HAL_OK;
  898. }
  899. /**
  900. * @brief Define the configuration of the line watermark .
  901. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  902. * the configuration information for the DMA2D.
  903. * @param Line: Line Watermark configuration.
  904. * @retval HAL status
  905. */
  906. HAL_StatusTypeDef HAL_DMA2D_ProgramLineEvent(DMA2D_HandleTypeDef *hdma2d, uint32_t Line)
  907. {
  908. /* Process locked */
  909. __HAL_LOCK(hdma2d);
  910. /* Change DMA2D peripheral state */
  911. hdma2d->State = HAL_DMA2D_STATE_BUSY;
  912. /* Check the parameters */
  913. assert_param(IS_DMA2D_LineWatermark(Line));
  914. /* Sets the Line watermark configuration */
  915. DMA2D->LWR = (uint32_t)Line;
  916. /* Initialize the DMA2D state*/
  917. hdma2d->State = HAL_DMA2D_STATE_READY;
  918. /* Process unlocked */
  919. __HAL_UNLOCK(hdma2d);
  920. return HAL_OK;
  921. }
  922. /**
  923. * @}
  924. */
  925. /** @defgroup DMA2D_Group4 Peripheral State functions
  926. * @brief Peripheral State functions
  927. *
  928. @verbatim
  929. ===============================================================================
  930. ##### Peripheral State and Errors functions #####
  931. ===============================================================================
  932. [..]
  933. This subsection provides functions allowing to :
  934. (+) Check the DMA2D state
  935. (+) Get error code
  936. @endverbatim
  937. * @{
  938. */
  939. /**
  940. * @brief Return the DMA2D state
  941. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  942. * the configuration information for the DMA2D.
  943. * @retval HAL state
  944. */
  945. HAL_DMA2D_StateTypeDef HAL_DMA2D_GetState(DMA2D_HandleTypeDef *hdma2d)
  946. {
  947. return hdma2d->State;
  948. }
  949. /**
  950. * @brief Return the DMA2D error code
  951. * @param hdma2d : pointer to a DMA2D_HandleTypeDef structure that contains
  952. * the configuration information for DMA2D.
  953. * @retval DMA2D Error Code
  954. */
  955. uint32_t HAL_DMA2D_GetError(DMA2D_HandleTypeDef *hdma2d)
  956. {
  957. return hdma2d->ErrorCode;
  958. }
  959. /**
  960. * @}
  961. */
  962. /**
  963. * @brief Set the DMA2D Transfer parameter.
  964. * @param hdma2d: pointer to a DMA2D_HandleTypeDef structure that contains
  965. * the configuration information for the specified DMA2D.
  966. * @param pdata: The source memory Buffer address
  967. * @param DstAddress: The destination memory Buffer address
  968. * @param Width: The width of data to be transferred from source to destination.
  969. * @param Height: The height of data to be transferred from source to destination.
  970. * @retval HAL status
  971. */
  972. static void DMA2D_SetConfig(DMA2D_HandleTypeDef *hdma2d, uint32_t pdata, uint32_t DstAddress, uint32_t Width, uint32_t Height)
  973. {
  974. uint32_t tmp = 0;
  975. uint32_t tmp1 = 0;
  976. uint32_t tmp2 = 0;
  977. uint32_t tmp3 = 0;
  978. uint32_t tmp4 = 0;
  979. tmp = Width << 16;
  980. /* Configure DMA2D data size */
  981. hdma2d->Instance->NLR = (Height | tmp);
  982. /* Configure DMA2D destination address */
  983. hdma2d->Instance->OMAR = DstAddress;
  984. /* Register to memory DMA2D mode selected */
  985. if (hdma2d->Init.Mode == DMA2D_R2M)
  986. {
  987. tmp1 = pdata & DMA2D_OCOLR_ALPHA_1;
  988. tmp2 = pdata & DMA2D_OCOLR_RED_1;
  989. tmp3 = pdata & DMA2D_OCOLR_GREEN_1;
  990. tmp4 = pdata & DMA2D_OCOLR_BLUE_1;
  991. /* Prepare the value to be wrote to the OCOLR register according to the color mode */
  992. if (hdma2d->Init.ColorMode == DMA2D_ARGB8888)
  993. {
  994. tmp = (tmp3 | tmp2 | tmp1| tmp4);
  995. }
  996. else if (hdma2d->Init.ColorMode == DMA2D_RGB888)
  997. {
  998. tmp = (tmp3 | tmp2 | tmp4);
  999. }
  1000. else if (hdma2d->Init.ColorMode == DMA2D_RGB565)
  1001. {
  1002. tmp2 = (tmp2 >> 19);
  1003. tmp3 = (tmp3 >> 10);
  1004. tmp4 = (tmp4 >> 3 );
  1005. tmp = ((tmp3 << 5) | (tmp2 << 11) | tmp4);
  1006. }
  1007. else if (hdma2d->Init.ColorMode == DMA2D_ARGB1555)
  1008. {
  1009. tmp1 = (tmp1 >> 31);
  1010. tmp2 = (tmp2 >> 19);
  1011. tmp3 = (tmp3 >> 11);
  1012. tmp4 = (tmp4 >> 3 );
  1013. tmp = ((tmp3 << 5) | (tmp2 << 10) | (tmp1 << 15) | tmp4);
  1014. }
  1015. else /* DMA2D_CMode = DMA2D_ARGB4444 */
  1016. {
  1017. tmp1 = (tmp1 >> 28);
  1018. tmp2 = (tmp2 >> 20);
  1019. tmp3 = (tmp3 >> 12);
  1020. tmp4 = (tmp4 >> 4 );
  1021. tmp = ((tmp3 << 4) | (tmp2 << 8) | (tmp1 << 12) | tmp4);
  1022. }
  1023. /* Write to DMA2D OCOLR register */
  1024. hdma2d->Instance->OCOLR = tmp;
  1025. }
  1026. else /* M2M, M2M_PFC or M2M_Blending DMA2D Mode */
  1027. {
  1028. /* Configure DMA2D source address */
  1029. hdma2d->Instance->FGMAR = pdata;
  1030. }
  1031. }
  1032. /**
  1033. * @}
  1034. */
  1035. #endif /* HAL_DMA2D_MODULE_ENABLED */
  1036. /**
  1037. * @}
  1038. */
  1039. /**
  1040. * @}
  1041. */
  1042. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/