fsl_flexio_i2s_edma.c 13 KB

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  1. /*
  2. * Copyright (c) 2015, Freescale Semiconductor, Inc.
  3. * Copyright 2016-2017 NXP
  4. *
  5. * Redistribution and use in source and binary forms, with or without modification,
  6. * are permitted provided that the following conditions are met:
  7. *
  8. * o Redistributions of source code must retain the above copyright notice, this list
  9. * of conditions and the following disclaimer.
  10. *
  11. * o Redistributions in binary form must reproduce the above copyright notice, this
  12. * list of conditions and the following disclaimer in the documentation and/or
  13. * other materials provided with the distribution.
  14. *
  15. * o Neither the name of the copyright holder nor the names of its
  16. * contributors may be used to endorse or promote products derived from this
  17. * software without specific prior written permission.
  18. *
  19. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  20. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  21. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  22. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  23. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  24. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  25. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  26. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  27. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  28. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  29. */
  30. #include "fsl_flexio_i2s_edma.h"
  31. /*******************************************************************************
  32. * Definitations
  33. ******************************************************************************/
  34. /* Used for 32byte aligned */
  35. #define STCD_ADDR(address) (edma_tcd_t *)(((uint32_t)address + 32) & ~0x1FU)
  36. /*<! Structure definition for flexio_i2s_edma_private_handle_t. The structure is private. */
  37. typedef struct _flexio_i2s_edma_private_handle
  38. {
  39. FLEXIO_I2S_Type *base;
  40. flexio_i2s_edma_handle_t *handle;
  41. } flexio_i2s_edma_private_handle_t;
  42. enum _flexio_i2s_edma_transfer_state
  43. {
  44. kFLEXIO_I2S_Busy = 0x0U, /*!< FLEXIO I2S is busy */
  45. kFLEXIO_I2S_Idle, /*!< Transfer is done. */
  46. };
  47. /*<! Private handle only used for internally. */
  48. static flexio_i2s_edma_private_handle_t s_edmaPrivateHandle[2];
  49. /*******************************************************************************
  50. * Prototypes
  51. ******************************************************************************/
  52. /*!
  53. * @brief FLEXIO I2S EDMA callback for send.
  54. *
  55. * @param handle pointer to flexio_i2s_edma_handle_t structure which stores the transfer state.
  56. * @param userData Parameter for user callback.
  57. * @param done If the DMA transfer finished.
  58. * @param tcds The TCD index.
  59. */
  60. static void FLEXIO_I2S_TxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds);
  61. /*!
  62. * @brief FLEXIO I2S EDMA callback for receive.
  63. *
  64. * @param handle pointer to flexio_i2s_edma_handle_t structure which stores the transfer state.
  65. * @param userData Parameter for user callback.
  66. * @param done If the DMA transfer finished.
  67. * @param tcds The TCD index.
  68. */
  69. static void FLEXIO_I2S_RxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds);
  70. /*******************************************************************************
  71. * Code
  72. ******************************************************************************/
  73. static void FLEXIO_I2S_TxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds)
  74. {
  75. flexio_i2s_edma_private_handle_t *privHandle = (flexio_i2s_edma_private_handle_t *)userData;
  76. flexio_i2s_edma_handle_t *flexio_i2sHandle = privHandle->handle;
  77. /* If finished a blcok, call the callback function */
  78. memset(&flexio_i2sHandle->queue[flexio_i2sHandle->queueDriver], 0, sizeof(flexio_i2s_transfer_t));
  79. flexio_i2sHandle->queueDriver = (flexio_i2sHandle->queueDriver + 1) % FLEXIO_I2S_XFER_QUEUE_SIZE;
  80. if (flexio_i2sHandle->callback)
  81. {
  82. (flexio_i2sHandle->callback)(privHandle->base, flexio_i2sHandle, kStatus_Success, flexio_i2sHandle->userData);
  83. }
  84. /* If all data finished, just stop the transfer */
  85. if (flexio_i2sHandle->queue[flexio_i2sHandle->queueDriver].data == NULL)
  86. {
  87. FLEXIO_I2S_TransferAbortSendEDMA(privHandle->base, flexio_i2sHandle);
  88. }
  89. }
  90. static void FLEXIO_I2S_RxEDMACallback(edma_handle_t *handle, void *userData, bool done, uint32_t tcds)
  91. {
  92. flexio_i2s_edma_private_handle_t *privHandle = (flexio_i2s_edma_private_handle_t *)userData;
  93. flexio_i2s_edma_handle_t *flexio_i2sHandle = privHandle->handle;
  94. /* If finished a blcok, call the callback function */
  95. memset(&flexio_i2sHandle->queue[flexio_i2sHandle->queueDriver], 0, sizeof(flexio_i2s_transfer_t));
  96. flexio_i2sHandle->queueDriver = (flexio_i2sHandle->queueDriver + 1) % FLEXIO_I2S_XFER_QUEUE_SIZE;
  97. if (flexio_i2sHandle->callback)
  98. {
  99. (flexio_i2sHandle->callback)(privHandle->base, flexio_i2sHandle, kStatus_Success, flexio_i2sHandle->userData);
  100. }
  101. /* If all data finished, just stop the transfer */
  102. if (flexio_i2sHandle->queue[flexio_i2sHandle->queueDriver].data == NULL)
  103. {
  104. FLEXIO_I2S_TransferAbortReceiveEDMA(privHandle->base, flexio_i2sHandle);
  105. }
  106. }
  107. void FLEXIO_I2S_TransferTxCreateHandleEDMA(FLEXIO_I2S_Type *base,
  108. flexio_i2s_edma_handle_t *handle,
  109. flexio_i2s_edma_callback_t callback,
  110. void *userData,
  111. edma_handle_t *dmaHandle)
  112. {
  113. assert(handle && dmaHandle);
  114. /* Zero the handle. */
  115. memset(handle, 0, sizeof(*handle));
  116. /* Set flexio_i2s base to handle */
  117. handle->dmaHandle = dmaHandle;
  118. handle->callback = callback;
  119. handle->userData = userData;
  120. /* Set FLEXIO I2S state to idle */
  121. handle->state = kFLEXIO_I2S_Idle;
  122. s_edmaPrivateHandle[0].base = base;
  123. s_edmaPrivateHandle[0].handle = handle;
  124. /* Need to use scatter gather */
  125. EDMA_InstallTCDMemory(dmaHandle, STCD_ADDR(handle->tcd), FLEXIO_I2S_XFER_QUEUE_SIZE);
  126. /* Install callback for Tx dma channel */
  127. EDMA_SetCallback(dmaHandle, FLEXIO_I2S_TxEDMACallback, &s_edmaPrivateHandle[0]);
  128. }
  129. void FLEXIO_I2S_TransferRxCreateHandleEDMA(FLEXIO_I2S_Type *base,
  130. flexio_i2s_edma_handle_t *handle,
  131. flexio_i2s_edma_callback_t callback,
  132. void *userData,
  133. edma_handle_t *dmaHandle)
  134. {
  135. assert(handle && dmaHandle);
  136. /* Zero the handle. */
  137. memset(handle, 0, sizeof(*handle));
  138. /* Set flexio_i2s base to handle */
  139. handle->dmaHandle = dmaHandle;
  140. handle->callback = callback;
  141. handle->userData = userData;
  142. /* Set FLEXIO I2S state to idle */
  143. handle->state = kFLEXIO_I2S_Idle;
  144. s_edmaPrivateHandle[1].base = base;
  145. s_edmaPrivateHandle[1].handle = handle;
  146. /* Need to use scatter gather */
  147. EDMA_InstallTCDMemory(dmaHandle, STCD_ADDR(handle->tcd), FLEXIO_I2S_XFER_QUEUE_SIZE);
  148. /* Install callback for Tx dma channel */
  149. EDMA_SetCallback(dmaHandle, FLEXIO_I2S_RxEDMACallback, &s_edmaPrivateHandle[1]);
  150. }
  151. void FLEXIO_I2S_TransferSetFormatEDMA(FLEXIO_I2S_Type *base,
  152. flexio_i2s_edma_handle_t *handle,
  153. flexio_i2s_format_t *format,
  154. uint32_t srcClock_Hz)
  155. {
  156. assert(handle && format);
  157. /* Configure the audio format to FLEXIO I2S registers */
  158. if (srcClock_Hz != 0)
  159. {
  160. /* It is master */
  161. FLEXIO_I2S_MasterSetFormat(base, format, srcClock_Hz);
  162. }
  163. else
  164. {
  165. FLEXIO_I2S_SlaveSetFormat(base, format);
  166. }
  167. /* Get the tranfer size from format, this should be used in EDMA configuration */
  168. handle->bytesPerFrame = format->bitWidth / 8U;
  169. }
  170. status_t FLEXIO_I2S_TransferSendEDMA(FLEXIO_I2S_Type *base,
  171. flexio_i2s_edma_handle_t *handle,
  172. flexio_i2s_transfer_t *xfer)
  173. {
  174. assert(handle && xfer);
  175. edma_transfer_config_t config = {0};
  176. uint32_t destAddr = FLEXIO_I2S_TxGetDataRegisterAddress(base) + (4U - handle->bytesPerFrame);
  177. /* Check if input parameter invalid */
  178. if ((xfer->data == NULL) || (xfer->dataSize == 0U))
  179. {
  180. return kStatus_InvalidArgument;
  181. }
  182. if (handle->queue[handle->queueUser].data)
  183. {
  184. return kStatus_FLEXIO_I2S_QueueFull;
  185. }
  186. /* Change the state of handle */
  187. handle->state = kFLEXIO_I2S_Busy;
  188. /* Update the queue state */
  189. handle->queue[handle->queueUser].data = xfer->data;
  190. handle->queue[handle->queueUser].dataSize = xfer->dataSize;
  191. handle->transferSize[handle->queueUser] = xfer->dataSize;
  192. handle->queueUser = (handle->queueUser + 1) % FLEXIO_I2S_XFER_QUEUE_SIZE;
  193. /* Prepare edma configure */
  194. EDMA_PrepareTransfer(&config, xfer->data, handle->bytesPerFrame, (void *)destAddr, handle->bytesPerFrame,
  195. handle->bytesPerFrame, xfer->dataSize, kEDMA_MemoryToPeripheral);
  196. /* Store the initially configured eDMA minor byte transfer count into the FLEXIO I2S handle */
  197. handle->nbytes = handle->bytesPerFrame;
  198. EDMA_SubmitTransfer(handle->dmaHandle, &config);
  199. /* Start DMA transfer */
  200. EDMA_StartTransfer(handle->dmaHandle);
  201. /* Enable DMA enable bit */
  202. FLEXIO_I2S_TxEnableDMA(base, true);
  203. /* Enable FLEXIO I2S Tx clock */
  204. FLEXIO_I2S_Enable(base, true);
  205. return kStatus_Success;
  206. }
  207. status_t FLEXIO_I2S_TransferReceiveEDMA(FLEXIO_I2S_Type *base,
  208. flexio_i2s_edma_handle_t *handle,
  209. flexio_i2s_transfer_t *xfer)
  210. {
  211. assert(handle && xfer);
  212. edma_transfer_config_t config = {0};
  213. uint32_t srcAddr = FLEXIO_I2S_RxGetDataRegisterAddress(base) + (4U - handle->bytesPerFrame);
  214. /* Check if input parameter invalid */
  215. if ((xfer->data == NULL) || (xfer->dataSize == 0U))
  216. {
  217. return kStatus_InvalidArgument;
  218. }
  219. if (handle->queue[handle->queueUser].data)
  220. {
  221. return kStatus_FLEXIO_I2S_QueueFull;
  222. }
  223. /* Change the state of handle */
  224. handle->state = kFLEXIO_I2S_Busy;
  225. /* Update queue state */
  226. handle->queue[handle->queueUser].data = xfer->data;
  227. handle->queue[handle->queueUser].dataSize = xfer->dataSize;
  228. handle->transferSize[handle->queueUser] = xfer->dataSize;
  229. handle->queueUser = (handle->queueUser + 1) % FLEXIO_I2S_XFER_QUEUE_SIZE;
  230. /* Prepare edma configure */
  231. EDMA_PrepareTransfer(&config, (void *)srcAddr, handle->bytesPerFrame, xfer->data, handle->bytesPerFrame,
  232. handle->bytesPerFrame, xfer->dataSize, kEDMA_PeripheralToMemory);
  233. /* Store the initially configured eDMA minor byte transfer count into the FLEXIO I2S handle */
  234. handle->nbytes = handle->bytesPerFrame;
  235. EDMA_SubmitTransfer(handle->dmaHandle, &config);
  236. /* Start DMA transfer */
  237. EDMA_StartTransfer(handle->dmaHandle);
  238. /* Enable DMA enable bit */
  239. FLEXIO_I2S_RxEnableDMA(base, true);
  240. /* Enable FLEXIO I2S Rx clock */
  241. FLEXIO_I2S_Enable(base, true);
  242. return kStatus_Success;
  243. }
  244. void FLEXIO_I2S_TransferAbortSendEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle)
  245. {
  246. assert(handle);
  247. /* Disable dma */
  248. EDMA_AbortTransfer(handle->dmaHandle);
  249. /* Disable DMA enable bit */
  250. FLEXIO_I2S_TxEnableDMA(base, false);
  251. /* Set the handle state */
  252. handle->state = kFLEXIO_I2S_Idle;
  253. }
  254. void FLEXIO_I2S_TransferAbortReceiveEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle)
  255. {
  256. assert(handle);
  257. /* Disable dma */
  258. EDMA_AbortTransfer(handle->dmaHandle);
  259. /* Disable DMA enable bit */
  260. FLEXIO_I2S_RxEnableDMA(base, false);
  261. /* Set the handle state */
  262. handle->state = kFLEXIO_I2S_Idle;
  263. }
  264. status_t FLEXIO_I2S_TransferGetSendCountEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, size_t *count)
  265. {
  266. assert(handle);
  267. status_t status = kStatus_Success;
  268. if (handle->state != kFLEXIO_I2S_Busy)
  269. {
  270. status = kStatus_NoTransferInProgress;
  271. }
  272. else
  273. {
  274. *count = handle->transferSize[handle->queueDriver] -
  275. (uint32_t)handle->nbytes *
  276. EDMA_GetRemainingMajorLoopCount(handle->dmaHandle->base, handle->dmaHandle->channel);
  277. }
  278. return status;
  279. }
  280. status_t FLEXIO_I2S_TransferGetReceiveCountEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, size_t *count)
  281. {
  282. assert(handle);
  283. status_t status = kStatus_Success;
  284. if (handle->state != kFLEXIO_I2S_Busy)
  285. {
  286. status = kStatus_NoTransferInProgress;
  287. }
  288. else
  289. {
  290. *count = handle->transferSize[handle->queueDriver] -
  291. (uint32_t)handle->nbytes *
  292. EDMA_GetRemainingMajorLoopCount(handle->dmaHandle->base, handle->dmaHandle->channel);
  293. }
  294. return status;
  295. }