drv_gpio.c 2.1 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2023-10-18 Raman Gopalan Initial version
  9. */
  10. #include <rtthread.h>
  11. #include <rtdevice.h>
  12. #include "gpio.h"
  13. #include <rtdbg.h>
  14. #ifdef RT_USING_PIN
  15. static void at32uc3b0_pin_mode(struct rt_device *dev, rt_base_t pin, rt_uint8_t mode)
  16. {
  17. RT_ASSERT((AVR32_PIN_PA03 <= pin) && (pin <= AVR32_PIN_PB11));
  18. /* Pointer to the register set for this GPIO port */
  19. volatile avr32_gpio_port_t *gpio_regs = &AVR32_GPIO.port[pin >> 5];
  20. /* Decide based on required mode */
  21. switch (mode)
  22. {
  23. case PIN_MODE_OUTPUT:
  24. gpio_regs->oders = 1 << (pin & 0x1F); /* Enable output driver */
  25. gpio_regs->gpers = 1 << (pin & 0x1F); /* Make GPIO control this pin */
  26. break;
  27. case PIN_MODE_INPUT:
  28. gpio_regs->oderc = 1 << (pin & 0x1F);
  29. gpio_regs->gpers = 1 << (pin & 0x1F);
  30. break;
  31. case PIN_MODE_INPUT_PULLUP:
  32. gpio_regs->puers = 1 << (pin & 0x1F);
  33. break;
  34. case PIN_MODE_INPUT_PULLDOWN:
  35. LOG_W("Pull-down enable register not defined for AT32UC3B.");
  36. break;
  37. case PIN_MODE_OUTPUT_OD:
  38. LOG_W("The open-drain mode is not synthesized on the current AVR32 products.");
  39. break;
  40. }
  41. }
  42. static void at32uc3b0_pin_write(struct rt_device *dev, rt_base_t pin, rt_uint8_t value)
  43. {
  44. RT_ASSERT((AVR32_PIN_PA03 <= pin) && (pin <= AVR32_PIN_PB11));
  45. if (value == PIN_HIGH)
  46. {
  47. gpio_set_gpio_pin(pin);
  48. }
  49. else
  50. {
  51. gpio_clr_gpio_pin(pin);
  52. }
  53. }
  54. static rt_int8_t at32uc3b0_pin_read(struct rt_device *device, rt_base_t pin)
  55. {
  56. RT_ASSERT((AVR32_PIN_PA03 <= pin) && (pin <= AVR32_PIN_PB11));
  57. return (gpio_get_pin_value(pin) ? PIN_HIGH : PIN_LOW);
  58. }
  59. static const struct rt_pin_ops ops =
  60. {
  61. at32uc3b0_pin_mode,
  62. at32uc3b0_pin_write,
  63. at32uc3b0_pin_read,
  64. RT_NULL,
  65. RT_NULL,
  66. RT_NULL,
  67. RT_NULL,
  68. };
  69. int rt_hw_gpio_init(void)
  70. {
  71. rt_device_pin_register("gpio", &ops, RT_NULL);
  72. return 0;
  73. }
  74. #endif /* RT_USING_PIN */