fsl_ctimer.h 18 KB

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  1. /*
  2. * The Clear BSD License
  3. * Copyright (c) 2016, Freescale Semiconductor, Inc.
  4. * Copyright 2016-2017 NXP
  5. * All rights reserved.
  6. *
  7. * Redistribution and use in source and binary forms, with or without modification,
  8. * are permitted (subject to the limitations in the disclaimer below) provided
  9. * that the following conditions are met:
  10. *
  11. * o Redistributions of source code must retain the above copyright notice, this list
  12. * of conditions and the following disclaimer.
  13. *
  14. * o Redistributions in binary form must reproduce the above copyright notice, this
  15. * list of conditions and the following disclaimer in the documentation and/or
  16. * other materials provided with the distribution.
  17. *
  18. * o Neither the name of the copyright holder nor the names of its
  19. * contributors may be used to endorse or promote products derived from this
  20. * software without specific prior written permission.
  21. *
  22. * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
  23. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
  24. * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25. * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
  27. * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29. * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  30. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. */
  34. #ifndef _FSL_CTIMER_H_
  35. #define _FSL_CTIMER_H_
  36. #include "fsl_common.h"
  37. /*!
  38. * @addtogroup ctimer
  39. * @{
  40. */
  41. /*! @file */
  42. /*******************************************************************************
  43. * Definitions
  44. ******************************************************************************/
  45. /*! @name Driver version */
  46. /*@{*/
  47. #define FSL_CTIMER_DRIVER_VERSION (MAKE_VERSION(2, 0, 1)) /*!< Version 2.0.1 */
  48. /*@}*/
  49. /*! @brief List of Timer capture channels */
  50. typedef enum _ctimer_capture_channel
  51. {
  52. kCTIMER_Capture_0 = 0U, /*!< Timer capture channel 0 */
  53. kCTIMER_Capture_1, /*!< Timer capture channel 1 */
  54. kCTIMER_Capture_2, /*!< Timer capture channel 2 */
  55. #if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
  56. kCTIMER_Capture_3 /*!< Timer capture channel 3 */
  57. #endif /* FSL_FEATURE_CTIMER_HAS_IR_CR3INT */
  58. } ctimer_capture_channel_t;
  59. /*! @brief List of capture edge options */
  60. typedef enum _ctimer_capture_edge
  61. {
  62. kCTIMER_Capture_RiseEdge = 1U, /*!< Capture on rising edge */
  63. kCTIMER_Capture_FallEdge = 2U, /*!< Capture on falling edge */
  64. kCTIMER_Capture_BothEdge = 3U, /*!< Capture on rising and falling edge */
  65. } ctimer_capture_edge_t;
  66. /*! @brief List of Timer match registers */
  67. typedef enum _ctimer_match
  68. {
  69. kCTIMER_Match_0 = 0U, /*!< Timer match register 0 */
  70. kCTIMER_Match_1, /*!< Timer match register 1 */
  71. kCTIMER_Match_2, /*!< Timer match register 2 */
  72. kCTIMER_Match_3 /*!< Timer match register 3 */
  73. } ctimer_match_t;
  74. /*! @brief List of output control options */
  75. typedef enum _ctimer_match_output_control
  76. {
  77. kCTIMER_Output_NoAction = 0U, /*!< No action is taken */
  78. kCTIMER_Output_Clear, /*!< Clear the EM bit/output to 0 */
  79. kCTIMER_Output_Set, /*!< Set the EM bit/output to 1 */
  80. kCTIMER_Output_Toggle /*!< Toggle the EM bit/output */
  81. } ctimer_match_output_control_t;
  82. /*! @brief List of Timer modes */
  83. typedef enum _ctimer_timer_mode
  84. {
  85. kCTIMER_TimerMode = 0U, /* TC is incremented every rising APB bus clock edge */
  86. kCTIMER_IncreaseOnRiseEdge, /* TC is incremented on rising edge of input signal */
  87. kCTIMER_IncreaseOnFallEdge, /* TC is incremented on falling edge of input signal */
  88. kCTIMER_IncreaseOnBothEdge /* TC is incremented on both edges of input signal */
  89. } ctimer_timer_mode_t;
  90. /*! @brief List of Timer interrupts */
  91. typedef enum _ctimer_interrupt_enable
  92. {
  93. kCTIMER_Match0InterruptEnable = CTIMER_MCR_MR0I_MASK, /*!< Match 0 interrupt */
  94. kCTIMER_Match1InterruptEnable = CTIMER_MCR_MR1I_MASK, /*!< Match 1 interrupt */
  95. kCTIMER_Match2InterruptEnable = CTIMER_MCR_MR2I_MASK, /*!< Match 2 interrupt */
  96. kCTIMER_Match3InterruptEnable = CTIMER_MCR_MR3I_MASK, /*!< Match 3 interrupt */
  97. kCTIMER_Capture0InterruptEnable = CTIMER_CCR_CAP0I_MASK, /*!< Capture 0 interrupt */
  98. kCTIMER_Capture1InterruptEnable = CTIMER_CCR_CAP1I_MASK, /*!< Capture 1 interrupt */
  99. kCTIMER_Capture2InterruptEnable = CTIMER_CCR_CAP2I_MASK, /*!< Capture 2 interrupt */
  100. #if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
  101. kCTIMER_Capture3InterruptEnable = CTIMER_CCR_CAP3I_MASK, /*!< Capture 3 interrupt */
  102. #endif /* FSL_FEATURE_CTIMER_HAS_CCR_CAP3 */
  103. } ctimer_interrupt_enable_t;
  104. /*! @brief List of Timer flags */
  105. typedef enum _ctimer_status_flags
  106. {
  107. kCTIMER_Match0Flag = CTIMER_IR_MR0INT_MASK, /*!< Match 0 interrupt flag */
  108. kCTIMER_Match1Flag = CTIMER_IR_MR1INT_MASK, /*!< Match 1 interrupt flag */
  109. kCTIMER_Match2Flag = CTIMER_IR_MR2INT_MASK, /*!< Match 2 interrupt flag */
  110. kCTIMER_Match3Flag = CTIMER_IR_MR3INT_MASK, /*!< Match 3 interrupt flag */
  111. kCTIMER_Capture0Flag = CTIMER_IR_CR0INT_MASK, /*!< Capture 0 interrupt flag */
  112. kCTIMER_Capture1Flag = CTIMER_IR_CR1INT_MASK, /*!< Capture 1 interrupt flag */
  113. kCTIMER_Capture2Flag = CTIMER_IR_CR2INT_MASK, /*!< Capture 2 interrupt flag */
  114. #if defined(FSL_FEATURE_CTIMER_HAS_IR_CR3INT) && FSL_FEATURE_CTIMER_HAS_IR_CR3INT
  115. kCTIMER_Capture3Flag = CTIMER_IR_CR3INT_MASK, /*!< Capture 3 interrupt flag */
  116. #endif /* FSL_FEATURE_CTIMER_HAS_IR_CR3INT */
  117. } ctimer_status_flags_t;
  118. typedef void (*ctimer_callback_t)(uint32_t flags);
  119. /*! @brief Callback type when registering for a callback. When registering a callback
  120. * an array of function pointers is passed the size could be 1 or 8, the callback
  121. * type will tell that.
  122. */
  123. typedef enum
  124. {
  125. kCTIMER_SingleCallback, /*!< Single Callback type where there is only one callback for the timer.
  126. based on the status flags different channels needs to be handled differently */
  127. kCTIMER_MultipleCallback /*!< Multiple Callback type where there can be 8 valid callbacks, one per channel.
  128. for both match/capture */
  129. } ctimer_callback_type_t;
  130. /*!
  131. * @brief Match configuration
  132. *
  133. * This structure holds the configuration settings for each match register.
  134. */
  135. typedef struct _ctimer_match_config
  136. {
  137. uint32_t matchValue; /*!< This is stored in the match register */
  138. bool enableCounterReset; /*!< true: Match will reset the counter
  139. false: Match will not reser the counter */
  140. bool enableCounterStop; /*!< true: Match will stop the counter
  141. false: Match will not stop the counter */
  142. ctimer_match_output_control_t outControl; /*!< Action to be taken on a match on the EM bit/output */
  143. bool outPinInitState; /*!< Initial value of the EM bit/output */
  144. bool enableInterrupt; /*!< true: Generate interrupt upon match
  145. false: Do not generate interrupt on match */
  146. } ctimer_match_config_t;
  147. /*!
  148. * @brief Timer configuration structure
  149. *
  150. * This structure holds the configuration settings for the Timer peripheral. To initialize this
  151. * structure to reasonable defaults, call the CTIMER_GetDefaultConfig() function and pass a
  152. * pointer to the configuration structure instance.
  153. *
  154. * The configuration structure can be made constant so as to reside in flash.
  155. */
  156. typedef struct _ctimer_config
  157. {
  158. ctimer_timer_mode_t mode; /*!< Timer mode */
  159. ctimer_capture_channel_t input; /*!< Input channel to increment the timer, used only in timer
  160. modes that rely on this input signal to increment TC */
  161. uint32_t prescale; /*!< Prescale value */
  162. } ctimer_config_t;
  163. /*******************************************************************************
  164. * API
  165. ******************************************************************************/
  166. #if defined(__cplusplus)
  167. extern "C" {
  168. #endif
  169. /*!
  170. * @name Initialization and deinitialization
  171. * @{
  172. */
  173. /*!
  174. * @brief Ungates the clock and configures the peripheral for basic operation.
  175. *
  176. * @note This API should be called at the beginning of the application before using the driver.
  177. *
  178. * @param base Ctimer peripheral base address
  179. * @param config Pointer to the user configuration structure.
  180. */
  181. void CTIMER_Init(CTIMER_Type *base, const ctimer_config_t *config);
  182. /*!
  183. * @brief Gates the timer clock.
  184. *
  185. * @param base Ctimer peripheral base address
  186. */
  187. void CTIMER_Deinit(CTIMER_Type *base);
  188. /*!
  189. * @brief Fills in the timers configuration structure with the default settings.
  190. *
  191. * The default values are:
  192. * @code
  193. * config->mode = kCTIMER_TimerMode;
  194. * config->input = kCTIMER_Capture_0;
  195. * config->prescale = 0;
  196. * @endcode
  197. * @param config Pointer to the user configuration structure.
  198. */
  199. void CTIMER_GetDefaultConfig(ctimer_config_t *config);
  200. /*! @}*/
  201. /*!
  202. * @name PWM setup operations
  203. * @{
  204. */
  205. /*!
  206. * @brief Configures the PWM signal parameters.
  207. *
  208. * Enables PWM mode on the match channel passed in and will then setup the match value
  209. * and other match parameters to generate a PWM signal.
  210. * This function will assign match channel 3 to set the PWM cycle.
  211. *
  212. * @note When setting PWM output from multiple output pins, all should use the same PWM
  213. * period
  214. *
  215. * @param base Ctimer peripheral base address
  216. * @param matchChannel Match pin to be used to output the PWM signal
  217. * @param pwmPeriod PWM period match value
  218. * @param pulsePeriod Pulse width match value
  219. * @param enableInt Enable interrupt when the timer value reaches the match value of the PWM pulse,
  220. * if it is 0 then no interrupt is generated
  221. *
  222. * @return kStatus_Success on success
  223. * kStatus_Fail If matchChannel passed in is 3; this channel is reserved to set the PWM period
  224. */
  225. status_t CTIMER_SetupPwmPeriod(CTIMER_Type *base,
  226. ctimer_match_t matchChannel,
  227. uint32_t pwmPeriod,
  228. uint32_t pulsePeriod,
  229. bool enableInt);
  230. /*!
  231. * @brief Configures the PWM signal parameters.
  232. *
  233. * Enables PWM mode on the match channel passed in and will then setup the match value
  234. * and other match parameters to generate a PWM signal.
  235. * This function will assign match channel 3 to set the PWM cycle.
  236. *
  237. * @note When setting PWM output from multiple output pins, all should use the same PWM
  238. * frequency. Please use CTIMER_SetupPwmPeriod to set up the PWM with high resolution.
  239. *
  240. * @param base Ctimer peripheral base address
  241. * @param matchChannel Match pin to be used to output the PWM signal
  242. * @param dutyCyclePercent PWM pulse width; the value should be between 0 to 100
  243. * @param pwmFreq_Hz PWM signal frequency in Hz
  244. * @param srcClock_Hz Timer counter clock in Hz
  245. * @param enableInt Enable interrupt when the timer value reaches the match value of the PWM pulse,
  246. * if it is 0 then no interrupt is generated
  247. *
  248. * @return kStatus_Success on success
  249. * kStatus_Fail If matchChannel passed in is 3; this channel is reserved to set the PWM cycle
  250. */
  251. status_t CTIMER_SetupPwm(CTIMER_Type *base,
  252. ctimer_match_t matchChannel,
  253. uint8_t dutyCyclePercent,
  254. uint32_t pwmFreq_Hz,
  255. uint32_t srcClock_Hz,
  256. bool enableInt);
  257. /*!
  258. * @brief Updates the pulse period of an active PWM signal.
  259. *
  260. * @param base Ctimer peripheral base address
  261. * @param matchChannel Match pin to be used to output the PWM signal
  262. * @param pulsePeriod New PWM pulse width match value
  263. */
  264. static inline void CTIMER_UpdatePwmPulsePeriod(CTIMER_Type *base, ctimer_match_t matchChannel, uint32_t pulsePeriod)
  265. {
  266. /* Update PWM pulse period match value */
  267. base->MR[matchChannel] = pulsePeriod;
  268. }
  269. /*!
  270. * @brief Updates the duty cycle of an active PWM signal.
  271. *
  272. * @note Please use CTIMER_UpdatePwmPulsePeriod to update the PWM with high resolution.
  273. *
  274. * @param base Ctimer peripheral base address
  275. * @param matchChannel Match pin to be used to output the PWM signal
  276. * @param dutyCyclePercent New PWM pulse width; the value should be between 0 to 100
  277. */
  278. void CTIMER_UpdatePwmDutycycle(CTIMER_Type *base, ctimer_match_t matchChannel, uint8_t dutyCyclePercent);
  279. /*! @}*/
  280. /*!
  281. * @brief Setup the match register.
  282. *
  283. * User configuration is used to setup the match value and action to be taken when a match occurs.
  284. *
  285. * @param base Ctimer peripheral base address
  286. * @param matchChannel Match register to configure
  287. * @param config Pointer to the match configuration structure
  288. */
  289. void CTIMER_SetupMatch(CTIMER_Type *base, ctimer_match_t matchChannel, const ctimer_match_config_t *config);
  290. /*!
  291. * @brief Setup the capture.
  292. *
  293. * @param base Ctimer peripheral base address
  294. * @param capture Capture channel to configure
  295. * @param edge Edge on the channel that will trigger a capture
  296. * @param enableInt Flag to enable channel interrupts, if enabled then the registered call back
  297. * is called upon capture
  298. */
  299. void CTIMER_SetupCapture(CTIMER_Type *base,
  300. ctimer_capture_channel_t capture,
  301. ctimer_capture_edge_t edge,
  302. bool enableInt);
  303. /*!
  304. * @brief Register callback.
  305. *
  306. * @param base Ctimer peripheral base address
  307. * @param cb_func callback function
  308. * @param cb_type callback function type, singular or multiple
  309. */
  310. void CTIMER_RegisterCallBack(CTIMER_Type *base, ctimer_callback_t *cb_func, ctimer_callback_type_t cb_type);
  311. /*!
  312. * @name Interrupt Interface
  313. * @{
  314. */
  315. /*!
  316. * @brief Enables the selected Timer interrupts.
  317. *
  318. * @param base Ctimer peripheral base address
  319. * @param mask The interrupts to enable. This is a logical OR of members of the
  320. * enumeration ::ctimer_interrupt_enable_t
  321. */
  322. static inline void CTIMER_EnableInterrupts(CTIMER_Type *base, uint32_t mask)
  323. {
  324. /* Enable match interrupts */
  325. base->MCR |= mask & (CTIMER_MCR_MR0I_MASK | CTIMER_MCR_MR1I_MASK | CTIMER_MCR_MR2I_MASK | CTIMER_MCR_MR3I_MASK);
  326. /* Enable capture interrupts */
  327. base->CCR |= mask & (CTIMER_CCR_CAP0I_MASK | CTIMER_CCR_CAP1I_MASK | CTIMER_CCR_CAP2I_MASK
  328. #if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
  329. | CTIMER_CCR_CAP3I_MASK
  330. #endif /* FSL_FEATURE_CTIMER_HAS_CCR_CAP3 */
  331. );
  332. }
  333. /*!
  334. * @brief Disables the selected Timer interrupts.
  335. *
  336. * @param base Ctimer peripheral base address
  337. * @param mask The interrupts to enable. This is a logical OR of members of the
  338. * enumeration ::ctimer_interrupt_enable_t
  339. */
  340. static inline void CTIMER_DisableInterrupts(CTIMER_Type *base, uint32_t mask)
  341. {
  342. /* Disable match interrupts */
  343. base->MCR &= ~(mask & (CTIMER_MCR_MR0I_MASK | CTIMER_MCR_MR1I_MASK | CTIMER_MCR_MR2I_MASK | CTIMER_MCR_MR3I_MASK));
  344. /* Disable capture interrupts */
  345. base->CCR &= ~(mask & (CTIMER_CCR_CAP0I_MASK | CTIMER_CCR_CAP1I_MASK | CTIMER_CCR_CAP2I_MASK
  346. #if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
  347. | CTIMER_CCR_CAP3I_MASK
  348. #endif /* FSL_FEATURE_CTIMER_HAS_CCR_CAP3 */
  349. ));
  350. }
  351. /*!
  352. * @brief Gets the enabled Timer interrupts.
  353. *
  354. * @param base Ctimer peripheral base address
  355. *
  356. * @return The enabled interrupts. This is the logical OR of members of the
  357. * enumeration ::ctimer_interrupt_enable_t
  358. */
  359. static inline uint32_t CTIMER_GetEnabledInterrupts(CTIMER_Type *base)
  360. {
  361. uint32_t enabledIntrs = 0;
  362. /* Get all the match interrupts enabled */
  363. enabledIntrs =
  364. base->MCR & (CTIMER_MCR_MR0I_MASK | CTIMER_MCR_MR1I_MASK | CTIMER_MCR_MR2I_MASK | CTIMER_MCR_MR3I_MASK);
  365. /* Get all the capture interrupts enabled */
  366. enabledIntrs |= base->CCR & (CTIMER_CCR_CAP0I_MASK | CTIMER_CCR_CAP1I_MASK | CTIMER_CCR_CAP2I_MASK
  367. #if defined(FSL_FEATURE_CTIMER_HAS_CCR_CAP3) && FSL_FEATURE_CTIMER_HAS_CCR_CAP3
  368. | CTIMER_CCR_CAP3I_MASK
  369. #endif /* FSL_FEATURE_CTIMER_HAS_CCR_CAP3 */
  370. );
  371. return enabledIntrs;
  372. }
  373. /*! @}*/
  374. /*!
  375. * @name Status Interface
  376. * @{
  377. */
  378. /*!
  379. * @brief Gets the Timer status flags.
  380. *
  381. * @param base Ctimer peripheral base address
  382. *
  383. * @return The status flags. This is the logical OR of members of the
  384. * enumeration ::ctimer_status_flags_t
  385. */
  386. static inline uint32_t CTIMER_GetStatusFlags(CTIMER_Type *base)
  387. {
  388. return base->IR;
  389. }
  390. /*!
  391. * @brief Clears the Timer status flags.
  392. *
  393. * @param base Ctimer peripheral base address
  394. * @param mask The status flags to clear. This is a logical OR of members of the
  395. * enumeration ::ctimer_status_flags_t
  396. */
  397. static inline void CTIMER_ClearStatusFlags(CTIMER_Type *base, uint32_t mask)
  398. {
  399. base->IR = mask;
  400. }
  401. /*! @}*/
  402. /*!
  403. * @name Counter Start and Stop
  404. * @{
  405. */
  406. /*!
  407. * @brief Starts the Timer counter.
  408. *
  409. * @param base Ctimer peripheral base address
  410. */
  411. static inline void CTIMER_StartTimer(CTIMER_Type *base)
  412. {
  413. base->TCR |= CTIMER_TCR_CEN_MASK;
  414. }
  415. /*!
  416. * @brief Stops the Timer counter.
  417. *
  418. * @param base Ctimer peripheral base address
  419. */
  420. static inline void CTIMER_StopTimer(CTIMER_Type *base)
  421. {
  422. base->TCR &= ~CTIMER_TCR_CEN_MASK;
  423. }
  424. /*! @}*/
  425. /*!
  426. * @brief Reset the counter.
  427. *
  428. * The timer counter and prescale counter are reset on the next positive edge of the APB clock.
  429. *
  430. * @param base Ctimer peripheral base address
  431. */
  432. static inline void CTIMER_Reset(CTIMER_Type *base)
  433. {
  434. base->TCR |= CTIMER_TCR_CRST_MASK;
  435. base->TCR &= ~CTIMER_TCR_CRST_MASK;
  436. }
  437. #if defined(__cplusplus)
  438. }
  439. #endif
  440. /*! @}*/
  441. #endif /* _FSL_CTIMER_H_ */