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drv_uart.c 8.9 KB

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  1. /*
  2. * Copyright (c) 2006-2020, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2020-04-16 bigmagic first version
  9. * 2020-05-26 bigmagic add other uart
  10. */
  11. #include <rthw.h>
  12. #include <rtthread.h>
  13. #include <rtdevice.h>
  14. #include "board.h"
  15. #include "drv_uart.h"
  16. #include "drv_gpio.h"
  17. #ifdef RT_USING_UART0
  18. static struct rt_serial_device _serial0;
  19. #endif
  20. #ifdef RT_USING_UART1
  21. static struct rt_serial_device _serial1;
  22. #endif
  23. #ifdef RT_USING_UART3
  24. static struct rt_serial_device _serial3;
  25. #endif
  26. #ifdef RT_USING_UART4
  27. static struct rt_serial_device _serial4;
  28. #endif
  29. #ifdef RT_USING_UART5
  30. static struct rt_serial_device _serial5;
  31. #endif
  32. struct hw_uart_device
  33. {
  34. rt_ubase_t hw_base;
  35. rt_uint32_t irqno;
  36. };
  37. static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  38. {
  39. struct hw_uart_device *uart;
  40. uint32_t bauddiv = (UART_REFERENCE_CLOCK / cfg->baud_rate)* 1000 / 16;
  41. uint32_t ibrd = bauddiv / 1000;
  42. RT_ASSERT(serial != RT_NULL);
  43. uart = (struct hw_uart_device *)serial->parent.user_data;
  44. if(uart->hw_base == AUX_BASE)
  45. {
  46. prev_raspi_pin_mode(GPIO_PIN_14, ALT5);
  47. prev_raspi_pin_mode(GPIO_PIN_15, ALT5);
  48. AUX_ENABLES(uart->hw_base) = 1; /* Enable UART1 */
  49. AUX_MU_IER_REG(uart->hw_base) = 0; /* Disable interrupt */
  50. AUX_MU_CNTL_REG(uart->hw_base) = 0; /* Disable Transmitter and Receiver */
  51. AUX_MU_LCR_REG(uart->hw_base) = 3; /* Works in 8-bit mode */
  52. AUX_MU_MCR_REG(uart->hw_base) = 0; /* Disable RTS */
  53. AUX_MU_IIR_REG(uart->hw_base) = 0xC6; /* Enable FIFO, Clear FIFO */
  54. AUX_MU_BAUD_REG(uart->hw_base) = 270; /* 115200 = system clock 250MHz / (8 * (baud + 1)), baud = 270 */
  55. AUX_MU_CNTL_REG(uart->hw_base) = 3; /* Enable Transmitter and Receiver */
  56. return RT_EOK;
  57. }
  58. if(uart->hw_base == UART0_BASE)
  59. {
  60. prev_raspi_pin_mode(GPIO_PIN_14, ALT0);
  61. prev_raspi_pin_mode(GPIO_PIN_15, ALT0);
  62. }
  63. if(uart->hw_base == UART3_BASE)
  64. {
  65. prev_raspi_pin_mode(GPIO_PIN_4, ALT4);
  66. prev_raspi_pin_mode(GPIO_PIN_5, ALT4);
  67. }
  68. if(uart->hw_base == UART4_BASE)
  69. {
  70. prev_raspi_pin_mode(GPIO_PIN_8, ALT4);
  71. prev_raspi_pin_mode(GPIO_PIN_9, ALT4);
  72. }
  73. if(uart->hw_base == UART5_BASE)
  74. {
  75. prev_raspi_pin_mode(GPIO_PIN_12, ALT4);
  76. prev_raspi_pin_mode(GPIO_PIN_13, ALT4);
  77. }
  78. PL011_REG_CR(uart->hw_base) = 0;/*Clear UART setting*/
  79. PL011_REG_LCRH(uart->hw_base) = 0;/*disable FIFO*/
  80. PL011_REG_IBRD(uart->hw_base) = ibrd;
  81. PL011_REG_FBRD(uart->hw_base) = (((bauddiv - ibrd * 1000) * 64 + 500) / 1000);
  82. PL011_REG_LCRH(uart->hw_base) = PL011_LCRH_WLEN_8;/*FIFO*/
  83. PL011_REG_CR(uart->hw_base) = PL011_CR_UARTEN | PL011_CR_TXE | PL011_CR_RXE;/*art enable, TX/RX enable*/
  84. return RT_EOK;
  85. }
  86. static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
  87. {
  88. struct hw_uart_device *uart;
  89. RT_ASSERT(serial != RT_NULL);
  90. uart = (struct hw_uart_device *)serial->parent.user_data;
  91. switch (cmd)
  92. {
  93. case RT_DEVICE_CTRL_CLR_INT:
  94. /* disable rx irq */
  95. if(uart->hw_base == AUX_BASE)
  96. {
  97. AUX_MU_IER_REG(uart->hw_base) = 0x0;
  98. }
  99. else
  100. {
  101. PL011_REG_IMSC(uart->hw_base) &= ~((uint32_t)PL011_IMSC_RXIM);
  102. }
  103. rt_hw_interrupt_mask(uart->irqno);
  104. break;
  105. case RT_DEVICE_CTRL_SET_INT:
  106. /* enable rx irq */
  107. if(uart->hw_base == AUX_BASE)
  108. {
  109. AUX_MU_IER_REG(uart->hw_base) = 0x1;
  110. }
  111. else
  112. {
  113. PL011_REG_IMSC(uart->hw_base) |= PL011_IMSC_RXIM;
  114. }
  115. rt_hw_interrupt_umask(uart->irqno);
  116. break;
  117. }
  118. return RT_EOK;
  119. }
  120. static int uart_putc(struct rt_serial_device *serial, char c)
  121. {
  122. struct hw_uart_device *uart;
  123. RT_ASSERT(serial != RT_NULL);
  124. uart = (struct hw_uart_device *)serial->parent.user_data;
  125. if(uart->hw_base == AUX_BASE)
  126. {
  127. while (!(AUX_MU_LSR_REG(uart->hw_base) & 0x20));
  128. AUX_MU_IO_REG(uart->hw_base) = c;
  129. }
  130. else
  131. {
  132. while ((PL011_REG_FR(uart->hw_base) & PL011_FR_TXFF));
  133. PL011_REG_DR(uart->hw_base) = (uint8_t)c;
  134. }
  135. return 1;
  136. }
  137. static int uart_getc(struct rt_serial_device *serial)
  138. {
  139. int ch = -1;
  140. struct hw_uart_device *uart;
  141. RT_ASSERT(serial != RT_NULL);
  142. uart = (struct hw_uart_device *)serial->parent.user_data;
  143. if(uart->hw_base == AUX_BASE)
  144. {
  145. if ((AUX_MU_LSR_REG(uart->hw_base) & 0x01))
  146. {
  147. ch = AUX_MU_IO_REG(uart->hw_base) & 0xff;
  148. }
  149. }
  150. else
  151. {
  152. if((PL011_REG_FR(uart->hw_base) & PL011_FR_RXFE) == 0)
  153. {
  154. ch = PL011_REG_DR(uart->hw_base) & 0xff;
  155. }
  156. }
  157. return ch;
  158. }
  159. static const struct rt_uart_ops _uart_ops =
  160. {
  161. uart_configure,
  162. uart_control,
  163. uart_putc,
  164. uart_getc,
  165. };
  166. #ifdef RT_USING_UART1
  167. static void rt_hw_aux_uart_isr(int irqno, void *param)
  168. {
  169. struct rt_serial_device *serial = (struct rt_serial_device*)param;
  170. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  171. }
  172. #endif
  173. static void rt_hw_uart_isr(int irqno, void *param)
  174. {
  175. #ifdef RT_USING_UART0
  176. if((PACTL_CS & IRQ_UART0) == IRQ_UART0)
  177. {
  178. PACTL_CS &= ~(IRQ_UART0);
  179. rt_hw_serial_isr(&_serial0, RT_SERIAL_EVENT_RX_IND);
  180. PL011_REG_ICR(UART0_BASE) = PL011_INTERRUPT_RECEIVE;
  181. }
  182. #endif
  183. #ifdef RT_USING_UART3
  184. if((PACTL_CS & IRQ_UART3) == IRQ_UART3)
  185. {
  186. PACTL_CS &= ~(IRQ_UART3);
  187. rt_hw_serial_isr(&_serial3, RT_SERIAL_EVENT_RX_IND);
  188. PL011_REG_ICR(UART3_BASE) = PL011_INTERRUPT_RECEIVE;
  189. }
  190. #endif
  191. #ifdef RT_USING_UART4
  192. if((PACTL_CS & IRQ_UART4) == IRQ_UART4)
  193. {
  194. PACTL_CS &= ~(IRQ_UART4);
  195. rt_hw_serial_isr(&_serial4, RT_SERIAL_EVENT_RX_IND);
  196. PL011_REG_ICR(UART4_BASE) = PL011_INTERRUPT_RECEIVE;
  197. }
  198. #endif
  199. #ifdef RT_USING_UART5
  200. if((PACTL_CS & IRQ_UART5) == IRQ_UART5)
  201. {
  202. PACTL_CS &= ~(IRQ_UART5);
  203. rt_hw_serial_isr(&_serial5, RT_SERIAL_EVENT_RX_IND);
  204. PL011_REG_ICR(UART5_BASE) = PL011_INTERRUPT_RECEIVE;
  205. }
  206. #endif
  207. }
  208. #ifdef RT_USING_UART0
  209. /* UART device driver structure */
  210. static struct hw_uart_device _uart0_device =
  211. {
  212. UART0_BASE,
  213. IRQ_PL011,
  214. };
  215. #endif
  216. #ifdef RT_USING_UART1
  217. /* UART device driver structure */
  218. static struct hw_uart_device _uart1_device =
  219. {
  220. AUX_BASE,
  221. IRQ_AUX_UART,
  222. };
  223. #endif
  224. #ifdef RT_USING_UART3
  225. static struct hw_uart_device _uart3_device =
  226. {
  227. UART3_BASE,
  228. IRQ_PL011,
  229. };
  230. #endif
  231. #ifdef RT_USING_UART4
  232. static struct hw_uart_device _uart4_device =
  233. {
  234. UART4_BASE,
  235. IRQ_PL011,
  236. };
  237. #endif
  238. #ifdef RT_USING_UART5
  239. static struct hw_uart_device _uart5_device =
  240. {
  241. UART5_BASE,
  242. IRQ_PL011,
  243. };
  244. #endif
  245. int rt_hw_uart_init(void)
  246. {
  247. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  248. #ifdef RT_USING_UART0
  249. struct hw_uart_device *uart0;
  250. uart0 = &_uart0_device;
  251. _serial0.ops = &_uart_ops;
  252. _serial0.config = config;
  253. /* register UART0 device */
  254. rt_hw_serial_register(&_serial0, "uart0",
  255. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  256. uart0);
  257. rt_hw_interrupt_install(uart0->irqno, rt_hw_uart_isr, &_serial0, "uart0");
  258. #endif
  259. #ifdef RT_USING_UART1
  260. struct hw_uart_device *uart1;
  261. uart1 = &_uart1_device;
  262. _serial1.ops = &_uart_ops;
  263. _serial1.config = config;
  264. /* register UART1 device */
  265. rt_hw_serial_register(&_serial1, "uart1",
  266. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  267. uart1);
  268. rt_hw_interrupt_install(uart1->irqno, rt_hw_aux_uart_isr, &_serial1, "uart1");
  269. #endif
  270. #ifdef RT_USING_UART3
  271. struct hw_uart_device *uart3;
  272. uart3 = &_uart3_device;
  273. _serial3.ops = &_uart_ops;
  274. _serial3.config = config;
  275. /* register UART3 device */
  276. rt_hw_serial_register(&_serial3, "uart3",
  277. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  278. uart3);
  279. rt_hw_interrupt_install(uart3->irqno, rt_hw_uart_isr, &_serial3, "uart3");
  280. #endif
  281. #ifdef RT_USING_UART4
  282. struct hw_uart_device *uart4;
  283. uart4 = &_uart4_device;
  284. _serial4.ops = &_uart_ops;
  285. _serial4.config = config;
  286. /* register UART4 device */
  287. rt_hw_serial_register(&_serial4, "uart4",
  288. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  289. uart4);
  290. rt_hw_interrupt_install(uart4->irqno, rt_hw_uart_isr, &_serial4, "uart4");
  291. #endif
  292. #ifdef RT_USING_UART5
  293. struct hw_uart_device *uart5;
  294. uart5 = &_uart5_device;
  295. _serial5.ops = &_uart_ops;
  296. _serial5.config = config;
  297. /* register UART5 device */
  298. rt_hw_serial_register(&_serial5, "uart5",
  299. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  300. uart5);
  301. rt_hw_interrupt_install(uart5->irqno, rt_hw_uart_isr, &_serial5, "uart5");
  302. #endif
  303. return 0;
  304. }