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HAL_ADC.c 38 KB

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  1. /*
  2. ******************************************************************************
  3. * @file HAL_ADC.c
  4. * @version V1.0.0
  5. * @date 2020
  6. * @brief ADC HAL module driver.
  7. * This file provides firmware functions to manage the following
  8. * functionalities of the Analog to Digital Converter (ADC) peripheral:
  9. * @ Initialization functions
  10. * @ IO operation functions
  11. ******************************************************************************
  12. */
  13. #include "ACM32Fxx_HAL.h"
  14. extern ADC_HandleTypeDef ADC_Handle;
  15. /************************************************************************
  16. * function : HAL_ADC_IRQHandler
  17. * Description: This function handles SPI interrupt request.
  18. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  19. * the configuration information for ADC module
  20. ************************************************************************/
  21. __weak void HAL_ADC_IRQHandler(ADC_HandleTypeDef *hadc)
  22. {
  23. __IO uint32_t Status;
  24. /* Check the parameters */
  25. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return;
  26. if(!IS_ADC_ALL_CONCONVMODE(hadc->Init.ConConvMode)) return;
  27. Status = hadc->Instance->SR;
  28. /************ Check End of Conversion flag for injected ************/
  29. if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IE_JEOCIE))
  30. {
  31. if((Status & ADC_SR_JEOC) == ADC_SR_JEOC)
  32. {
  33. if(__HAL_ADC_CHECK_TRIG_INJECTED(hadc, ADC_SOFTWARE_START) ||
  34. ((__HAL_ADC_CHECK_TRIG_REGULAR(hadc, ADC_SOFTWARE_START)) &&
  35. (hadc->Init.ConConvMode == 0)))
  36. {
  37. /* Disable ADC end of conversion interrupt on group injected */
  38. __HAL_ADC_DISABLE_IT(hadc, ADC_IE_JEOCIE);
  39. }
  40. /* Conversion complete callback */
  41. if (NULL != hadc->InjectedConvCpltCallback)
  42. hadc->InjectedConvCpltCallback(hadc);
  43. /* Clear injected group conversion flag */
  44. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_JEOC);
  45. }
  46. }
  47. /************ Check Conversion flag for regular group ************/
  48. if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IE_EOCIE))
  49. {
  50. if((Status & ADC_SR_EOC) == ADC_SR_EOC)
  51. {
  52. /* Conversion complete callback */
  53. if (NULL != hadc->ConvCpltCallback)
  54. hadc->ConvCpltCallback(hadc);
  55. /* Clear conversion flag */
  56. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_EOC);
  57. }
  58. }
  59. /************ Check Analog watchdog flags ************/
  60. if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IE_AWDIE))
  61. {
  62. if((Status & ADC_SR_AWD) == ADC_SR_AWD)
  63. {
  64. /* Level out of window callback */
  65. if (NULL != hadc->LevelOutOfWindowCallback)
  66. hadc->LevelOutOfWindowCallback(hadc);
  67. /* Clear the ADC analog watchdog flag */
  68. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_AWD);
  69. }
  70. }
  71. /************ Check End of Conversion flag for regular group ************/
  72. if(__HAL_ADC_GET_IT_SOURCE(hadc, ADC_IE_EOGIE))
  73. {
  74. if((Status & ADC_SR_EOG) == ADC_SR_EOG)
  75. {
  76. if((__HAL_ADC_CHECK_TRIG_REGULAR(hadc, ADC_SOFTWARE_START)) &&
  77. (hadc->Init.ConConvMode == 0))
  78. {
  79. /* Disable ADC end of conversion interrupt on group regular */
  80. __HAL_ADC_DISABLE_IT(hadc, ADC_IE_EOGIE);
  81. }
  82. /* Conversion complete callback */
  83. if (NULL != hadc->GroupCpltCallback)
  84. hadc->GroupCpltCallback(hadc);
  85. /* Clear regular group conversion flag */
  86. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_EOG);
  87. }
  88. }
  89. }
  90. static volatile uint32_t gu32_ITC_Conunt = 0; // transfer complete interrupt count
  91. static volatile uint32_t gu32_IE_Conunt = 0; // transfer error interrupt count
  92. /************************************************************************
  93. * function : DMA_ADC_ITC_Callback
  94. * Description: DMA adc to memory transfer complete interrupt Callback.
  95. ************************************************************************/
  96. static void DMA_ADC_ITC_Callback(void)
  97. {
  98. gu32_ITC_Conunt++;
  99. }
  100. /************************************************************************
  101. * function : DMA_ADC_IE_Callback
  102. * Description: DMA adc to memory transfer error interrupt Callback.
  103. ************************************************************************/
  104. static void DMA_ADC_IE_Callback(void)
  105. {
  106. gu32_IE_Conunt++;
  107. }
  108. /************************************************************************
  109. * function : HAL_ADC_MspInit
  110. * Description:
  111. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  112. * the configuration information for ADC module
  113. * return : none
  114. ************************************************************************/
  115. __weak void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
  116. {
  117. uint32_t i;
  118. uint32_t ADC_Pin_Map[][3] =
  119. {
  120. { ADC_CHANNEL_0_EN, GPIOD, GPIO_PIN_5 },
  121. { ADC_CHANNEL_1_EN, GPIOA, GPIO_PIN_4 },
  122. { ADC_CHANNEL_2_EN, GPIOA, GPIO_PIN_5 },
  123. { ADC_CHANNEL_3_EN, GPIOA, GPIO_PIN_6 },
  124. { ADC_CHANNEL_4_EN, GPIOA, GPIO_PIN_7 },
  125. { ADC_CHANNEL_5_EN, GPIOC, GPIO_PIN_4 },
  126. { ADC_CHANNEL_6_EN, GPIOC, GPIO_PIN_5 },
  127. { ADC_CHANNEL_7_EN, GPIOB, GPIO_PIN_0 },
  128. { ADC_CHANNEL_8_EN, GPIOD, GPIO_PIN_4 },
  129. { ADC_CHANNEL_9_EN, GPIOA, GPIO_PIN_3 },
  130. { ADC_CHANNEL_10_EN, GPIOA, GPIO_PIN_2 },
  131. { ADC_CHANNEL_11_EN, GPIOA, GPIO_PIN_0 },
  132. { ADC_CHANNEL_12_EN, GPIOC, GPIO_PIN_3 },
  133. { ADC_CHANNEL_13_EN, GPIOC, GPIO_PIN_2 },
  134. { ADC_CHANNEL_14_EN, GPIOC, GPIO_PIN_1 },
  135. { ADC_CHANNEL_15_EN, GPIOC, GPIO_PIN_0 },
  136. { ADC_CHANNEL_VBAT_EN, GPIOA, GPIO_PIN_1 },
  137. { ADC_CHANNEL_EXT2_EN, GPIOB, GPIO_PIN_1 },
  138. { ADC_CHANNEL_EXT3_EN, GPIOB, GPIO_PIN_2 },
  139. { 0xffffffff, 0 }, //结束标志
  140. };
  141. /*
  142. NOTE : This function should be modified by the user.
  143. */
  144. /* For Example */
  145. GPIO_InitTypeDef GPIO_Handle;
  146. static DMA_HandleTypeDef Dma_Adc_Handle;
  147. //Set gpio to analog.
  148. for(i = 0; ADC_Pin_Map[i][0] != 0xffffffff; i++)
  149. {
  150. if(hadc->Init.ChannelEn & ADC_Pin_Map[i][0])
  151. {
  152. GPIO_Handle.Pin = ADC_Pin_Map[i][2];
  153. GPIO_Handle.Mode = GPIO_MODE_ANALOG;
  154. GPIO_Handle.Pull = GPIO_NOPULL;
  155. HAL_GPIO_Init((enum_GPIOx_t)ADC_Pin_Map[i][1], &GPIO_Handle);
  156. }
  157. /* Enable GPIO Clock */
  158. if((ADC_Pin_Map[i][1] == GPIOA) || (ADC_Pin_Map[i][1] == GPIOB))
  159. System_Module_Enable(EN_GPIOAB);
  160. else if((ADC_Pin_Map[i][1] == GPIOC) || (ADC_Pin_Map[i][1] == GPIOD))
  161. System_Module_Enable(EN_GPIOCD);
  162. }
  163. if(hadc->Init.DMAMode)
  164. {
  165. Dma_Adc_Handle.Instance = DMA_Channel2;
  166. Dma_Adc_Handle.Init.Request_ID = REQ0_ADC;
  167. Dma_Adc_Handle.Init.Mode = DMA_CIRCULAR;
  168. Dma_Adc_Handle.Init.Data_Flow = DMA_DATA_FLOW_P2M;
  169. Dma_Adc_Handle.Init.Source_Inc = DMA_SOURCE_ADDR_INCREASE_DISABLE;
  170. Dma_Adc_Handle.Init.Desination_Inc = DMA_DST_ADDR_INCREASE_ENABLE;
  171. Dma_Adc_Handle.Init.Source_Width = DMA_SRC_WIDTH_WORD;
  172. Dma_Adc_Handle.Init.Desination_Width = DMA_DST_WIDTH_WORD;
  173. /*-----------------------------------------------------------------------------------*/
  174. /* Note:If user dons not apply interrupt, Set DMA_ITC_CallbackbDMA_IE_Callback NULL */
  175. /*-----------------------------------------------------------------------------------*/
  176. Dma_Adc_Handle.DMA_ITC_Callback = DMA_ADC_ITC_Callback;
  177. Dma_Adc_Handle.DMA_IE_Callback = DMA_ADC_IE_Callback;
  178. HAL_DMA_Init(&Dma_Adc_Handle);
  179. hadc->DMA_Handle = &Dma_Adc_Handle;
  180. }
  181. /* Enable ADC Clock */
  182. System_Module_Enable(EN_ADC);
  183. /* Clear Pending Interrupt */
  184. NVIC_ClearPendingIRQ(ADC_IRQn);
  185. /* Enable External Interrupt */
  186. NVIC_EnableIRQ(ADC_IRQn);
  187. }
  188. /************************************************************************
  189. * function : HAL_ADC_MspDeInit
  190. * Description:
  191. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  192. * the configuration information for ADC module
  193. * return : none
  194. ************************************************************************/
  195. __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
  196. {
  197. /*
  198. NOTE : This function should be modified by the user.
  199. */
  200. /* For Example */
  201. static DMA_HandleTypeDef Dma_Adc_Handle;
  202. if(hadc->Init.DMAMode)
  203. {
  204. HAL_DMA_DeInit(&Dma_Adc_Handle);
  205. hadc->DMA_Handle = NULL;
  206. }
  207. /* Disable ADC Clock */
  208. System_Module_Disable(EN_ADC);
  209. /* Clear Pending Interrupt */
  210. NVIC_ClearPendingIRQ(ADC_IRQn);
  211. /* Disable External Interrupt */
  212. NVIC_DisableIRQ(ADC_IRQn);
  213. }
  214. /************************************************************************
  215. * function : HAL_ADC_Init
  216. * Description: Init the ADC module
  217. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  218. * the configuration information for ADC module
  219. * return : HAL_StatusTypeDef
  220. ************************************************************************/
  221. HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
  222. {
  223. /* Check the ADC handle allocation */
  224. if (hadc == NULL)
  225. {
  226. return HAL_ERROR;
  227. }
  228. /* Check the parameters */
  229. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  230. if(!IS_ADC_ALL_CONCONVMODE(hadc->Init.ConConvMode)) return HAL_ERROR;
  231. if(!IS_ADC_ALL_JCHANNELMODE(hadc->Init.JChannelMode)) return HAL_ERROR;
  232. if(!IS_ADC_ALL_DIFFMODE(hadc->Init.DiffMode)) return HAL_ERROR;
  233. if(!IS_ADC_ALL_DMAMODE(hadc->Init.DMAMode)) return HAL_ERROR;
  234. if(!IS_ADC_ALL_OVERMODE(hadc->Init.OverMode)) return HAL_ERROR;
  235. if(!IS_ADC_ALL_OVERSAMPMODE(hadc->Init.OverSampMode)) return HAL_ERROR;
  236. if(!IS_ADC_ALL_OVSR(hadc->Init.Oversampling.Ratio)) return HAL_ERROR;
  237. if(!IS_ADC_ALL_OVSS(hadc->Init.Oversampling.RightBitShift)) return HAL_ERROR;
  238. if(!IS_ADC_ALL_ANALOGWDGEN(hadc->Init.AnalogWDGEn)) return HAL_ERROR;
  239. if(!IS_ADC_ALL_CLOCKDIV(hadc->Init.ClockDiv)) return HAL_ERROR;
  240. if(!IS_ADC_ALL_CHANNELEN(hadc->Init.ChannelEn)) return HAL_ERROR;
  241. if(!IS_ADC_ALL_TRIG(hadc->Init.ExTrigMode.ExTrigSel)) return HAL_ERROR;
  242. if(!IS_ADC_ALL_CHANNELEN(hadc->Init.ExTrigMode.JExTrigSel)) return HAL_ERROR;
  243. /* Init the low level hardware : GPIO, CLOCK, NVIC, DMA */
  244. HAL_ADC_MspInit(hadc);
  245. //Reset AFE.
  246. SET_BIT(hadc->Instance->CR2,ADC_CR2_AFE_RSTN);
  247. //Set Clock DIV.
  248. MODIFY_REG(hadc->Instance->CR2,ADC_CR2_DIV_MASK,hadc->Init.ClockDiv<<ADC_CR2_DIV_POS);
  249. //Set continued convert mode
  250. if(hadc->Init.ConConvMode)
  251. SET_BIT(hadc->Instance->CR1,ADC_CR1_CONT);
  252. else
  253. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_CONT);
  254. //Overflow
  255. if(hadc->Init.OverMode == ADC_OVERMODE_ENABLE)
  256. SET_BIT(hadc->Instance->CR2,ADC_CR2_OVRMOD);
  257. else
  258. CLEAR_BIT(hadc->Instance->CR2,ADC_CR2_OVRMOD);
  259. //Over Sample Set
  260. if(hadc->Init.OverSampMode)
  261. {
  262. if(hadc->Init.JChannelMode)
  263. {
  264. SET_BIT(hadc->Instance->CR2,ADC_CR2_JOVSE); // Inject channel over sample en.
  265. if(hadc->Init.Oversampling.TriggeredMode)
  266. SET_BIT(hadc->Instance->CR2,ADC_CR2_JTOVS); // N times sample every trig.
  267. else
  268. CLEAR_BIT(hadc->Instance->CR2,ADC_CR2_JTOVS); // 1 time sample every trig.
  269. }
  270. MODIFY_REG(hadc->Instance->CR2,ADC_CR2_OVSR_MASK,hadc->Init.Oversampling.Ratio<<ADC_CR2_OVSR_POS); //over sample rate
  271. MODIFY_REG(hadc->Instance->CR2,ADC_CR2_OVSS_MASK,hadc->Init.Oversampling.RightBitShift<<ADC_CR2_OVSS_POS); //over sample right shift.
  272. SET_BIT(hadc->Instance->CR2,ADC_CR2_OVSE); // Regular channel over sample en.
  273. }
  274. //ExTrigSel set
  275. MODIFY_REG(hadc->Instance->CR1,ADC_CR1_EXTSEL_MASK,hadc->Init.ExTrigMode.ExTrigSel<<ADC_CR1_EXTSEL_POS);
  276. if(hadc->Init.JChannelMode)
  277. {
  278. /* Enable the inject channel */
  279. SET_BIT(hadc->Instance->CR1, ADC_CR1_JEN);
  280. //JExTrigSel set
  281. MODIFY_REG(hadc->Instance->CR1,ADC_CR1_JEXTSEL_MASK,hadc->Init.ExTrigMode.JExTrigSel<<ADC_CR1_JEXTSEL_POS);
  282. }
  283. //Clear the sequence length.
  284. CLEAR_BIT(hadc->Instance->SQR1,ADC_SQR1_L); //Clear the sequence length.
  285. return HAL_OK;
  286. }
  287. /************************************************************************
  288. * function : HAL_ADC_DeInit
  289. * Description: DeInit the ADC module
  290. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  291. * the configuration information for ADC module
  292. * return : HAL_StatusTypeDef
  293. ************************************************************************/
  294. HAL_StatusTypeDef HAL_ADC_DeInit(ADC_HandleTypeDef* hadc)
  295. {
  296. /* Check the ADC handle allocation */
  297. if (hadc == NULL)
  298. {
  299. return HAL_ERROR;
  300. }
  301. HAL_ADC_MspDeInit(hadc);
  302. hadc->ChannelNum = 0;
  303. hadc->ConvCpltCallback = NULL;
  304. hadc->InjectedConvCpltCallback = NULL;
  305. hadc->LevelOutOfWindowCallback = NULL;
  306. memset(&hadc->Init, 0, sizeof(hadc->Init));
  307. return HAL_OK;
  308. }
  309. /************************************************************************
  310. * function : HAL_ADC_ConfigChannel
  311. * Description: Config the regular channel
  312. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  313. * the configuration information for ADC module
  314. * sConfig : pointer to a ADC_ChannelConfTypeDef structure that contains
  315. * the configuration information for ADC channel
  316. * return : HAL_StatusTypeDef
  317. ************************************************************************/
  318. HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
  319. {
  320. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  321. if(!IS_ADC_ALL_CHANNEL(sConfig->Channel)) return HAL_ERROR;
  322. if(!IS_ADC_ALL_SMPCLOCK(sConfig->Smp)) return HAL_ERROR;
  323. if(!IS_ADC_ALL_SEQUENCE(sConfig->Sq)) return HAL_ERROR;
  324. /* Differential mode set*/
  325. if(hadc->Init.DiffMode)
  326. {
  327. if(sConfig->Channel < 8)
  328. {
  329. SET_BIT(hadc->Instance->DIFF,1<<sConfig->Channel);
  330. SET_BIT(hadc->Instance->SIGN,1<<sConfig->Channel); //If define differential mode ,set as sign resault
  331. }
  332. else
  333. return HAL_ERROR;
  334. }
  335. else if(sConfig->Channel < 8)
  336. {
  337. CLEAR_BIT(hadc->Instance->DIFF,1<<sConfig->Channel);
  338. CLEAR_BIT(hadc->Instance->SIGN,1<<sConfig->Channel); //If define differential mode ,set as unsign resault
  339. }
  340. if((sConfig->Channel >= 8) && (hadc->Instance->DIFF & (1<<(sConfig->Channel-8)))) return HAL_ERROR;
  341. if(sConfig->RjMode == 0)
  342. {
  343. if((sConfig->Sq >= 1)&&(sConfig->Sq <= 5))
  344. MODIFY_REG(hadc->Instance->SQR1,(ADC_CH_MASK << (5*sConfig->Sq )),(sConfig->Channel << (5*sConfig->Sq )));
  345. else if((sConfig->Sq >= 6)&&(sConfig->Sq <= 11))
  346. MODIFY_REG(hadc->Instance->SQR2,(ADC_CH_MASK << (5*(sConfig->Sq-6))),(sConfig->Channel << (5*(sConfig->Sq-6))));
  347. else if((sConfig->Sq >= 12)&&(sConfig->Sq <= 16))
  348. MODIFY_REG(hadc->Instance->SQR3,(ADC_CH_MASK << (5*(sConfig->Sq-12))),(sConfig->Channel << (5*(sConfig->Sq-12))));
  349. else
  350. return HAL_ERROR;
  351. }
  352. else
  353. {
  354. /* Inject channel */
  355. MODIFY_REG(hadc->Instance->JSQR,ADC_CH_MASK,sConfig->Channel);
  356. }
  357. MODIFY_REG(hadc->Instance->SQR1,ADC_SQR1_L,(hadc->ChannelNum-1));
  358. /* Set the SMPR to every register*/
  359. if(sConfig->Channel <= ADC_CHANNEL_7)
  360. MODIFY_REG(hadc->Instance->SMPR1,(ADC_SMPR_CH_MASK << (4*sConfig->Channel )),(sConfig->Smp << (4*sConfig->Channel )));
  361. else if((sConfig->Channel >= ADC_CHANNEL_8)&&(sConfig->Channel <= ADC_CHANNEL_15))
  362. MODIFY_REG(hadc->Instance->SMPR2,(ADC_SMPR_CH_MASK << (4*(sConfig->Channel-8))),(sConfig->Smp << (4*(sConfig->Channel-8))));
  363. else if((sConfig->Channel >= ADC_CHANNEL_TEMP)&&(sConfig->Channel <= ADC_CHANNEL_EXT3))
  364. MODIFY_REG(hadc->Instance->SMPR3,(ADC_SMPR_CH_MASK << (4*(sConfig->Channel-16))),(sConfig->Smp << (4*(sConfig->Channel-16))));
  365. else
  366. return HAL_ERROR;
  367. if(hadc->Init.ChannelEn & ADC_CHANNEL_TEMP_EN)
  368. {
  369. SET_BIT(hadc->Instance->TSREF,ADC_TSREF_EN_TS);//Enable the temperature sensor
  370. System_Delay(1000);
  371. }
  372. if(hadc->Init.ChannelEn & (ADC_CHANNEL_VBGR_EN | ADC_CHANNEL_EXT2_EN | ADC_CHANNEL_EXT3_EN))
  373. {
  374. SET_BIT(hadc->Instance->CR2,ADC_CR2_EN_BUF);//Enable the buffer
  375. if(hadc->Init.ChannelEn & ADC_CHANNEL_VBGR_EN)
  376. SET_BIT(hadc->Instance->TSREF,ADC_TSREF_VREF1P2_EN);//Enable the BGR 1.2v to the buffer channel
  377. else
  378. CLEAR_BIT(hadc->Instance->TSREF,ADC_TSREF_VREF1P2_EN);//Disable the BGR 1.2v to the buffer channel
  379. System_Delay(1000);
  380. }
  381. return HAL_OK;
  382. }
  383. /************************************************************************
  384. * function : HAL_ADC_AnalogWDGConfig
  385. * Description: Config the analog watchdog
  386. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  387. * the configuration information for ADC module
  388. * AnalogWDGConfig : pointer to a ADC_AnalogWDGConfTypeDef structure that contains
  389. * the configuration information for ADC analog watchdog
  390. * return : HAL_StatusTypeDef
  391. ************************************************************************/
  392. HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* AnalogWDGConfig)
  393. {
  394. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  395. if(!IS_ADC_ALL_CHANNEL(AnalogWDGConfig->Channel)) return HAL_ERROR;
  396. if (hadc->Init.AnalogWDGEn)
  397. {
  398. switch(AnalogWDGConfig->WatchdogMode)
  399. {
  400. /* AWDSGL:0; AWDEN:1; JAWDEN:0 */
  401. case ADC_ANALOGWATCHDOG_RCH_ALL:
  402. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_AWDSGL);
  403. SET_BIT(hadc->Instance->CR1,ADC_CR1_AWDEN);
  404. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_JAWDEN);
  405. break;
  406. /* AWDSGL:0; AWDEN:0; JAWDEN:1 */
  407. case ADC_ANALOGWATCHDOG_JCH_ALL:
  408. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_AWDSGL);
  409. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_AWDEN);
  410. SET_BIT(hadc->Instance->CR1,ADC_CR1_JAWDEN);
  411. break;
  412. /* AWDSGL:0; AWDEN:1; JAWDEN:1 */
  413. case ADC_ANALOGWATCHDOG_RCH_AND_JCH_ALL:
  414. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_AWDSGL);
  415. SET_BIT(hadc->Instance->CR1,ADC_CR1_AWDEN);
  416. SET_BIT(hadc->Instance->CR1,ADC_CR1_JAWDEN);
  417. break;
  418. /* AWDSGL:1; AWDEN:1; JAWDEN:0 */
  419. case ADC_ANALOGWATCHDOG_RCH_SINGLE:
  420. SET_BIT(hadc->Instance->CR1,ADC_CR1_AWDSGL);
  421. SET_BIT(hadc->Instance->CR1,ADC_CR1_AWDEN);
  422. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_JAWDEN);
  423. MODIFY_REG(hadc->Instance->CR1,ADC_CH_MASK,AnalogWDGConfig->Channel); //The regular watchdog channel set
  424. break;
  425. /* AWDSGL:1; AWDEN:0; JAWDEN:1 */
  426. case ADC_ANALOGWATCHDOG_JCH_SINGLE:
  427. SET_BIT(hadc->Instance->CR1,ADC_CR1_AWDSGL);
  428. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_AWDEN);
  429. SET_BIT(hadc->Instance->CR1,ADC_CR1_JAWDEN);
  430. MODIFY_REG(hadc->Instance->CR1,(ADC_CH_MASK<<27),AnalogWDGConfig->Channel<<27); //The inject watchdog channel set
  431. break;
  432. /* AWDSGL:1; AWDEN:1; JAWDEN:1 */
  433. case ADC_ANALOGWATCHDOG_RCH_OR_JCH_SINGLE:
  434. SET_BIT(hadc->Instance->CR1,ADC_CR1_AWDSGL);
  435. SET_BIT(hadc->Instance->CR1,ADC_CR1_AWDEN);
  436. SET_BIT(hadc->Instance->CR1,ADC_CR1_JAWDEN);
  437. MODIFY_REG(hadc->Instance->CR1,ADC_CH_MASK,AnalogWDGConfig->Channel); //The regular watchdog channel set
  438. MODIFY_REG(hadc->Instance->CR1,(ADC_CH_MASK<<27),AnalogWDGConfig->Channel<<27); //The inject watchdog channel set
  439. break;
  440. /* AWDSGL:x; AWDEN:0; JAWDEN:0 */
  441. default: /* ADC_ANALOGWATCHDOG_NONE */
  442. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_AWDEN);
  443. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_JAWDEN);
  444. break;
  445. }
  446. /* Configure ADC analog watchdog interrupt */
  447. if(AnalogWDGConfig->ITMode)
  448. __HAL_ADC_ENABLE_IT(hadc,ADC_IE_AWDIE);
  449. else
  450. __HAL_ADC_DISABLE_IT(hadc,ADC_IE_AWDIE);
  451. }
  452. if(hadc->Init.DiffMode)
  453. {
  454. hadc->Instance->HTR = AnalogWDGConfig->HighThreshold<<16;
  455. hadc->Instance->LTR = AnalogWDGConfig->LowThreshold<<16;
  456. }
  457. else
  458. {
  459. hadc->Instance->HTR = AnalogWDGConfig->HighThreshold;
  460. hadc->Instance->LTR = AnalogWDGConfig->LowThreshold;
  461. }
  462. /* Return function status */
  463. return HAL_OK;
  464. }
  465. /************************************************************************
  466. * function : HAL_ADC_Start
  467. * Description: Enable and start the ADC convertion
  468. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  469. * the configuration information for ADC module
  470. * return : HAL_StatusTypeDef
  471. ************************************************************************/
  472. HAL_StatusTypeDef HAL_ADC_Start(ADC_HandleTypeDef* hadc)
  473. {
  474. /* Check the parameters */
  475. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  476. /* check the total number of the enabled channels */
  477. if((READ_BIT(hadc->Instance->SQR1,ADC_SQR1_L)+1) != hadc->ChannelNum) return HAL_ERROR;
  478. /* Enable the ADC */
  479. __HAL_ADC_ENABLE(hadc);
  480. /* Clear the SR register */
  481. __HAL_ADC_CLEAR_FLAG(hadc,ADC_SR_AWD | ADC_SR_OVERF | ADC_SR_EOG | ADC_SR_JEOC | ADC_SR_EOC | ADC_SR_ADRDY);
  482. /* Wait ADC ready */
  483. while(!(hadc->Instance->SR & ADC_SR_ADRDY));
  484. if(__HAL_ADC_CHECK_TRIG_REGULAR(hadc, ADC_SOFTWARE_START))
  485. {
  486. /* Start covertion */
  487. SET_BIT(hadc->Instance->CR1,ADC_CR1_SWSTART);
  488. }
  489. /* Return function status */
  490. return HAL_OK;
  491. }
  492. /************************************************************************
  493. * function : HAL_ADC_Stop
  494. * Description: Stop ADC conversion of regular group (and injected channels in
  495. * case of auto_injection mode), disable ADC peripheral.
  496. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  497. * the configuration information for ADC module
  498. * return : HAL_StatusTypeDef
  499. ************************************************************************/
  500. HAL_StatusTypeDef HAL_ADC_Stop(ADC_HandleTypeDef* hadc)
  501. {
  502. /* Check the parameters */
  503. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  504. if(hadc->Init.ConConvMode)
  505. {
  506. /* Set stop flag */
  507. SET_BIT(hadc->Instance->CR2, ADC_CR2_ADC_STP);
  508. /* Waitting stop flag be cleared */
  509. while(READ_BIT(hadc->Instance->CR2, ADC_CR2_ADC_STP));
  510. }
  511. /* Disable the ADC peripheral */
  512. __HAL_ADC_DISABLE(hadc);
  513. /* Clear the SR register */
  514. __HAL_ADC_CLEAR_FLAG(hadc,ADC_SR_AWD | ADC_SR_OVERF | ADC_SR_EOG | ADC_SR_JEOC | ADC_SR_EOC | ADC_SR_ADRDY);
  515. /* Return function status */
  516. return HAL_OK;
  517. }
  518. /************************************************************************
  519. * function : HAL_ADC_Start_IT
  520. * Description: Enable ADC, start conversion of regular group with interruption.
  521. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  522. * the configuration information for ADC module
  523. * return : HAL_StatusTypeDef
  524. ************************************************************************/
  525. HAL_StatusTypeDef HAL_ADC_Start_IT(ADC_HandleTypeDef* hadc)
  526. {
  527. /* Check the parameters */
  528. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  529. /* Enable the ADC */
  530. __HAL_ADC_ENABLE(hadc);
  531. /* Clear the SR register */
  532. __HAL_ADC_CLEAR_FLAG(hadc,ADC_SR_AWD | ADC_SR_OVERF | ADC_SR_EOG | ADC_SR_JEOC | ADC_SR_EOC | ADC_SR_ADRDY);
  533. /* Disable all interruptions before enabling the desired ones */
  534. __HAL_ADC_DISABLE_IT(hadc, ADC_IE_EOCIE | ADC_IE_EOGIE | ADC_IE_OVERFIE | ADC_IE_JEOCIE);
  535. __HAL_ADC_ENABLE_IT(hadc, ADC_IE_EOCIE | ADC_IE_EOGIE);
  536. /* Enable ADC overrun interrupt */
  537. /* If hadc->Init.OverMode is set to ADC_OVERMODE_DISABLE, only then is
  538. ADC_IE_OVERFIE enabled; otherwise data overwrite is considered as normal
  539. behavior and no CPU time is lost for a non-processed interruption */
  540. if (hadc->Init.OverMode == ADC_OVERMODE_DISABLE)
  541. {
  542. __HAL_ADC_ENABLE_IT(hadc, ADC_IE_OVERFIE);
  543. }
  544. if(__HAL_ADC_CHECK_TRIG_REGULAR(hadc, ADC_SOFTWARE_START))
  545. {
  546. /* Start covertion */
  547. SET_BIT(hadc->Instance->CR1,ADC_CR1_SWSTART);
  548. }
  549. /* Return function status */
  550. return HAL_OK;
  551. }
  552. /************************************************************************
  553. * function : HAL_ADC_Stop_IT
  554. * Description: Stop ADC conversion of regular group (and injected group in
  555. * case of auto_injection mode), disable interrution of
  556. * end-of-conversion, disable ADC peripheral.
  557. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  558. * the configuration information for ADC module
  559. * return : HAL_StatusTypeDef
  560. ************************************************************************/
  561. HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
  562. {
  563. /* Check the parameters */
  564. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  565. if(hadc->Init.ConConvMode)
  566. {
  567. /* Set stop flag */
  568. SET_BIT(hadc->Instance->CR2, ADC_CR2_ADC_STP);
  569. /* Waitting stop flag be cleared */
  570. while(READ_BIT(hadc->Instance->CR2, ADC_CR2_ADC_STP));
  571. }
  572. /* Disable the ADC peripheral */
  573. __HAL_ADC_DISABLE(hadc);
  574. /* Disable all interruptions before enabling the desired ones */
  575. __HAL_ADC_DISABLE_IT(hadc, ADC_IE_EOCIE | ADC_IE_EOGIE | ADC_IE_OVERFIE | ADC_IE_JEOCIE);
  576. /* Clear the SR register */
  577. __HAL_ADC_CLEAR_FLAG(hadc,ADC_SR_AWD | ADC_SR_OVERF | ADC_SR_EOG | ADC_SR_JEOC | ADC_SR_EOC | ADC_SR_ADRDY);
  578. /* Return function status */
  579. return HAL_OK;
  580. }
  581. /************************************************************************
  582. * function : HAL_ADC_Start_DMA
  583. * Description: Enable ADC, start conversion of regular group and transfer result through DMA.
  584. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  585. * the configuration information for ADC module
  586. * : pData : Destination Buffer address.
  587. * : Length : Number of data to be transferred from ADC peripheral to memory.
  588. * return : HAL_StatusTypeDef
  589. ************************************************************************/
  590. HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
  591. {
  592. HAL_StatusTypeDef tmp_hal_status;
  593. /* Check the parameters */
  594. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  595. /* Specific case for first call occurrence of this function (DMA transfer */
  596. /* not activated and ADC disabled), DMA transfer must be activated */
  597. /* with ADC disabled. */
  598. if (READ_BIT(hadc->Instance->CR1,ADC_CR1_DMA) == 0UL)
  599. {
  600. if(READ_BIT(hadc->Instance->CR2, ADC_CR2_ADC_EN))
  601. {
  602. /* Disable ADC */
  603. __HAL_ADC_DISABLE(hadc);
  604. }
  605. /* Enable ADC DMA mode */
  606. SET_BIT(hadc->Instance->CR1,ADC_CR1_DMA);
  607. }
  608. /* Enable the ADC peripheral */
  609. __HAL_ADC_ENABLE(hadc);
  610. /* Clear the SR register */
  611. __HAL_ADC_CLEAR_FLAG(hadc,ADC_SR_AWD | ADC_SR_OVERF | ADC_SR_EOG | ADC_SR_JEOC | ADC_SR_EOC | ADC_SR_ADRDY);
  612. /* Disable all interruptions before enabling the desired ones */
  613. __HAL_ADC_DISABLE_IT(hadc, ADC_IE_EOCIE | ADC_IE_EOGIE | ADC_IE_OVERFIE | ADC_IE_JEOCIE);
  614. /* Start the DMA channel */
  615. tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
  616. /* Enable conversion of regular group. */
  617. /* If software start has been selected, conversion starts immediately. */
  618. /* If external trigger has been selected, conversion will start at next */
  619. /* trigger event. */
  620. /* Start ADC group regular conversion */
  621. if(__HAL_ADC_CHECK_TRIG_REGULAR(hadc, ADC_SOFTWARE_START))
  622. {
  623. /* Start covertion */
  624. SET_BIT(hadc->Instance->CR1,ADC_CR1_SWSTART);
  625. }
  626. /* Return function status */
  627. return tmp_hal_status;
  628. }
  629. /************************************************************************
  630. * function : HAL_ADC_Stop_DMA
  631. * Description: Stop ADC conversion of regular group (and injected group in
  632. * case of auto_injection mode), disable ADC DMA transfer, disable
  633. * ADC peripheral.
  634. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  635. * the configuration information for ADC module
  636. * return : HAL_StatusTypeDef
  637. ************************************************************************/
  638. HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
  639. {
  640. /* Check the parameters */
  641. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  642. if(hadc->Init.ConConvMode)
  643. {
  644. /* Set stop flag */
  645. SET_BIT(hadc->Instance->CR2, ADC_CR2_ADC_STP);
  646. /* Waitting stop flag be cleared */
  647. while(READ_BIT(hadc->Instance->CR2, ADC_CR2_ADC_STP));
  648. }
  649. /* Waitting stop flag be cleared */
  650. while(READ_BIT(hadc->Instance->CR2, ADC_CR2_ADC_STP));
  651. /* Disable the DMA channel (in case of DMA in circular mode or stop */
  652. /* while DMA transfer is on going) */
  653. HAL_DMA_Abort(hadc->DMA_Handle);
  654. /* Disable ADC overrun interrupt */
  655. __HAL_ADC_DISABLE_IT(hadc, ADC_IE_OVERFIE);
  656. /* 2. Disable the ADC peripheral */
  657. /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep */
  658. /* in memory a potential failing status. */
  659. /* Disable the ADC peripheral */
  660. __HAL_ADC_DISABLE(hadc);
  661. /* Disable all interruptions before enabling the desired ones */
  662. __HAL_ADC_DISABLE_IT(hadc, ADC_IE_EOCIE | ADC_IE_EOGIE | ADC_IE_OVERFIE | ADC_IE_JEOCIE);
  663. /* Clear the SR register */
  664. __HAL_ADC_CLEAR_FLAG(hadc,ADC_SR_AWD | ADC_SR_OVERF | ADC_SR_EOG | ADC_SR_JEOC | ADC_SR_EOC | ADC_SR_ADRDY);
  665. /* Disable ADC DMA (ADC DMA configuration of continuous requests is kept) */
  666. CLEAR_BIT(hadc->Instance->CR1,ADC_CR1_DMA);
  667. /* Return function status */
  668. return HAL_OK;
  669. }
  670. /************************************************************************
  671. * function : HAL_ADC_GetValue
  672. * Description: ADC retrieve conversion value intended to be used with polling or interruption
  673. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  674. * the configuration information for ADC module
  675. * return : uint32_t the ADC covert result.
  676. ************************************************************************/
  677. uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef *hadc)
  678. {
  679. /* Check the parameters */
  680. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  681. return (hadc->Instance->DR);
  682. }
  683. /************************************************************************
  684. * function : HAL_ADC_PollForEvent
  685. * Description: Poll for ADC event.
  686. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  687. * the configuration information for ADC module
  688. * : EventType: the ADC event type. can be :ADC_SR_AWD,ADC_SR_OVERF,ADC_SR_EOG,ADC_SR_JEOC,ADC_SR_EOC
  689. * : Timeout : Polling timeout.
  690. * return : HAL_StatusTypeDef
  691. ************************************************************************/
  692. HAL_StatusTypeDef HAL_ADC_PollForEvent(ADC_HandleTypeDef *hadc, uint32_t EventType, uint32_t Timeout)
  693. {
  694. __IO uint32_t uiTimeout;
  695. /* Check the parameters */
  696. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  697. if(!IS_ADC_EVENT_TYPE(EventType)) return HAL_ERROR;
  698. uiTimeout = Timeout;
  699. /* Check selected event flag */
  700. while (__HAL_ADC_GET_FLAG(hadc, EventType) == 0UL)
  701. {
  702. /* Check if timeout is disabled (set to infinite wait) */
  703. if(uiTimeout)
  704. {
  705. uiTimeout--;
  706. if(uiTimeout == 0)
  707. return HAL_TIMEOUT;
  708. }
  709. }
  710. if(EventType == ADC_SR_OVERF)
  711. {
  712. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_OVERF);
  713. if (hadc->Init.OverMode == ADC_OVERMODE_ENABLE)
  714. {
  715. /* Clear ADC Overrun flag only if Overrun is set to ADC_OVERMODE_ENABLE(Over written) */
  716. return HAL_ERROR;
  717. }
  718. }
  719. else
  720. {
  721. __HAL_ADC_CLEAR_FLAG(hadc, EventType);
  722. }
  723. /* Return function status */
  724. return HAL_OK;
  725. }
  726. /************************************************************************
  727. * function : HAL_ADC_InjectedStart_IT
  728. * Description: Enable ADC, start conversion of injected channel with interruption.
  729. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  730. * the configuration information for ADC module
  731. * return : HAL_StatusTypeDef
  732. ************************************************************************/
  733. HAL_StatusTypeDef HAL_ADC_InjectedStart_IT(ADC_HandleTypeDef* hadc)
  734. {
  735. /* Check the parameters */
  736. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  737. /* Clear the SR register */
  738. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_JEOC);
  739. __HAL_ADC_ENABLE_IT(hadc, ADC_IE_JEOCIE);
  740. /* Enable ADC overrun interrupt */
  741. /* If hadc->Init.OverMode is set to ADC_OVERMODE_DISABLE, only then is
  742. ADC_IE_OVERFIE enabled; otherwise data overwrite is considered as normal
  743. behavior and no CPU time is lost for a non-processed interruption */
  744. if (hadc->Init.OverMode == ADC_OVERMODE_DISABLE)
  745. {
  746. __HAL_ADC_ENABLE_IT(hadc, ADC_IE_OVERFIE);
  747. }
  748. if(__HAL_ADC_CHECK_TRIG_INJECTED(hadc, ADC_SOFTWARE_START))
  749. {
  750. /* Start covertion */
  751. SET_BIT(hadc->Instance->CR1,ADC_CR1_JSWSTART);
  752. }
  753. /* Return function status */
  754. return HAL_OK;
  755. }
  756. /************************************************************************
  757. * function : HAL_ADC_InjectedStop_IT
  758. * Description: Stop ADC conversion of injected channel, disable interrution of
  759. * end-of-conversion, disable ADC peripheral.
  760. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  761. * the configuration information for ADC module
  762. * return : HAL_StatusTypeDef
  763. ************************************************************************/
  764. HAL_StatusTypeDef HAL_ADC_InjectedStop_IT(ADC_HandleTypeDef* hadc)
  765. {
  766. /* Return function status */
  767. return (HAL_ADC_Stop_IT(hadc));
  768. }
  769. /************************************************************************
  770. * function : HAL_ADC_InjectedGetValue
  771. * Description: ADC retrieve injected channel conversion value intended to be used with polling or interruption
  772. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  773. * the configuration information for ADC module
  774. * return : uint32_t the ADC covert result.
  775. ************************************************************************/
  776. uint32_t HAL_ADC_InjectedGetValue(ADC_HandleTypeDef *hadc)
  777. {
  778. /* Check the parameters */
  779. if(!IS_ADC_ALL_INSTANCE(hadc->Instance)) return HAL_ERROR;
  780. return (hadc->Instance->JDR);
  781. }
  782. /************************************************************************
  783. * function : HAL_ADC_Polling
  784. * Description: Polling to get the results of the ADC converter.
  785. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  786. * the configuration information for ADC module
  787. * : pData : Destination Buffer address.
  788. * : Length : Number of data to be transferred from ADC peripheral to memory.
  789. * : Timeout : Polling timeout.
  790. * return : HAL_StatusTypeDef
  791. ************************************************************************/
  792. HAL_StatusTypeDef HAL_ADC_Polling(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length, uint32_t Timeout)
  793. {
  794. uint32_t tmp_hal_status;
  795. __IO uint32_t uiTimeout;
  796. if(HAL_ADC_Start(hadc) != HAL_OK) return HAL_ERROR;
  797. if(!pData) return HAL_ERROR;
  798. hadc->AdcResults = pData;
  799. uiTimeout = Timeout;
  800. while(Length)
  801. {
  802. tmp_hal_status = hadc->Instance->SR;
  803. if(tmp_hal_status & ADC_SR_EOC)
  804. {
  805. *hadc->AdcResults = hadc->Instance->DR | HAL_ADC_EOC_FLAG;
  806. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_EOC);
  807. hadc->AdcResults++;
  808. Length--;
  809. }
  810. if(tmp_hal_status & ADC_SR_JEOC)
  811. {
  812. *hadc->AdcResults = hadc->Instance->JDR | HAL_ADC_JEOC_FLAG;
  813. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_JEOC);
  814. hadc->AdcResults++;
  815. Length--;
  816. }
  817. if(tmp_hal_status & ADC_SR_OVERF)
  818. {
  819. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_OVERF);
  820. }
  821. if(tmp_hal_status & ADC_SR_EOG)
  822. {
  823. __HAL_ADC_CLEAR_FLAG(hadc, ADC_SR_EOG);
  824. break;
  825. }
  826. if(uiTimeout)
  827. {
  828. uiTimeout--;
  829. if(uiTimeout == 0)
  830. return HAL_TIMEOUT;
  831. }
  832. }
  833. HAL_ADC_Stop(hadc);
  834. return HAL_OK;
  835. }
  836. /**
  837. * @brief Use the DMA to get the results of the ADC converter.
  838. * @param hadc ADC handle
  839. * @retval HAL status.
  840. */
  841. /************************************************************************
  842. * function : HAL_ADC_Dma
  843. * Description: Use the DMA to get the results of the ADC converter.
  844. * input : hadc : pointer to a ADC_HandleTypeDef structure that contains
  845. * the configuration information for ADC module
  846. * : pData : Destination Buffer address.
  847. * : Length : Number of data to be transferred from ADC peripheral to memory.
  848. * return : HAL_StatusTypeDef
  849. ************************************************************************/
  850. HAL_StatusTypeDef HAL_ADC_Dma(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
  851. {
  852. HAL_StatusTypeDef tmp_hal_status;
  853. if(!hadc->AdcResults) return HAL_ERROR;
  854. if(HAL_ADC_Start(hadc) != HAL_OK) return HAL_ERROR;
  855. if(!pData) return HAL_ERROR;
  856. hadc->AdcResults = pData;
  857. tmp_hal_status = HAL_ADC_Start_DMA(hadc,hadc->AdcResults,Length);
  858. if(tmp_hal_status != HAL_OK) return HAL_ERROR;
  859. while(!gu32_ITC_Conunt){}
  860. gu32_ITC_Conunt--;
  861. if(hadc->Init.ConConvMode == ADC_CONCONVMODE_DISABLE)
  862. HAL_ADC_Stop_DMA(hadc);
  863. return tmp_hal_status;
  864. }