board.c 9.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286
  1. /*
  2. * File : board.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006 - 2009 RT-Thread Develop Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2006-08-23 Bernard first implementation
  13. */
  14. #include <rthw.h>
  15. #include <rtthread.h>
  16. #include "stm32f10x.h"
  17. #include "board.h"
  18. /**
  19. * @addtogroup STM32
  20. */
  21. /*@{*/
  22. /*******************************************************************************
  23. * Function Name : NVIC_Configuration
  24. * Description : Configures Vector Table base location.
  25. * Input : None
  26. * Output : None
  27. * Return : None
  28. *******************************************************************************/
  29. void NVIC_Configuration(void)
  30. {
  31. #ifdef VECT_TAB_RAM
  32. /* Set the Vector Table base location at 0x20000000 */
  33. NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
  34. #else /* VECT_TAB_FLASH */
  35. /* Set the Vector Table base location at 0x08000000 */
  36. NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
  37. #endif
  38. /*
  39. * set priority group:
  40. * 2 bits for pre-emption priority
  41. * 2 bits for subpriority
  42. */
  43. NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
  44. }
  45. extern void rt_hw_interrupt_thread_switch(void);
  46. /**
  47. * This is the timer interrupt service routine.
  48. *
  49. */
  50. void rt_hw_timer_handler(void)
  51. {
  52. /* enter interrupt */
  53. rt_interrupt_enter();
  54. rt_tick_increase();
  55. /* leave interrupt */
  56. rt_interrupt_leave();
  57. }
  58. /* NAND Flash */
  59. #include "fsmc_nand.h"
  60. static void all_device_reset(void)
  61. {
  62. /* RESET */
  63. /* DM9000A PE5 */
  64. /* LCD PF10 */
  65. /* SPI-FLASH PA3 */
  66. /* CS */
  67. /* DM9000A FSMC_NE4 PG12 */
  68. /* LCD FSMC_NE2 PG9 */
  69. /* SPI_FLASH PA4 */
  70. /* CODEC PC5 */
  71. /* TOUCH PC4 */
  72. GPIO_InitTypeDef GPIO_InitStructure;
  73. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOC | RCC_APB2Periph_GPIOE
  74. | RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG,ENABLE);
  75. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
  76. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  77. /* SDIO POWER */
  78. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
  79. GPIO_Init(GPIOC,&GPIO_InitStructure);
  80. GPIO_SetBits(GPIOC,GPIO_Pin_6); /* SD card power down */
  81. /* SPI_FLASH CS */
  82. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
  83. GPIO_Init(GPIOA,&GPIO_InitStructure);
  84. GPIO_SetBits(GPIOA,GPIO_Pin_4);
  85. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
  86. /* CODEC && TOUCH CS */
  87. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5;
  88. GPIO_Init(GPIOC,&GPIO_InitStructure);
  89. GPIO_SetBits(GPIOC,GPIO_Pin_4 | GPIO_Pin_5);
  90. /* DM9000A RESET */
  91. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
  92. GPIO_Init(GPIOE,&GPIO_InitStructure);
  93. GPIO_ResetBits(GPIOE,GPIO_Pin_5);
  94. /* LCD RESET */
  95. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
  96. GPIO_Init(GPIOF,&GPIO_InitStructure);
  97. GPIO_ResetBits(GPIOF,GPIO_Pin_10);
  98. /* SPI_FLASH RESET */
  99. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
  100. GPIO_Init(GPIOA,&GPIO_InitStructure);
  101. GPIO_ResetBits(GPIOA,GPIO_Pin_3);
  102. /* FSMC GPIO configure */
  103. {
  104. GPIO_InitTypeDef GPIO_InitStructure;
  105. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE | RCC_APB2Periph_GPIOF
  106. | RCC_APB2Periph_GPIOG, ENABLE);
  107. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
  108. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  109. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  110. /*
  111. FSMC_D0 ~ FSMC_D3
  112. PD14 FSMC_D0 PD15 FSMC_D1 PD0 FSMC_D2 PD1 FSMC_D3
  113. */
  114. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_14 | GPIO_Pin_15;
  115. GPIO_Init(GPIOD,&GPIO_InitStructure);
  116. /*
  117. FSMC_D4 ~ FSMC_D12
  118. PE7 ~ PE15 FSMC_D4 ~ FSMC_D12
  119. */
  120. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10
  121. | GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
  122. GPIO_Init(GPIOE,&GPIO_InitStructure);
  123. /* FSMC_D13 ~ FSMC_D15 PD8 ~ PD10 */
  124. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10;
  125. GPIO_Init(GPIOD,&GPIO_InitStructure);
  126. /*
  127. FSMC_A0 ~ FSMC_A5 FSMC_A6 ~ FSMC_A9
  128. PF0 ~ PF5 PF12 ~ PF15
  129. */
  130. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3
  131. | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
  132. GPIO_Init(GPIOF,&GPIO_InitStructure);
  133. /* FSMC_A10 ~ FSMC_A15 PG0 ~ PG5 */
  134. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5;
  135. GPIO_Init(GPIOG,&GPIO_InitStructure);
  136. /* FSMC_A16 ~ FSMC_A18 PD11 ~ PD13 */
  137. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13;
  138. GPIO_Init(GPIOD,&GPIO_InitStructure);
  139. /* RD-PD4 WR-PD5 */
  140. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5;
  141. GPIO_Init(GPIOD,&GPIO_InitStructure);
  142. /* NBL0-PE0 NBL1-PE1 */
  143. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
  144. GPIO_Init(GPIOE,&GPIO_InitStructure);
  145. /* NE1/NCE2 */
  146. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
  147. GPIO_Init(GPIOD,&GPIO_InitStructure);
  148. /* NE2 */
  149. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
  150. GPIO_Init(GPIOG,&GPIO_InitStructure);
  151. /* NE3 */
  152. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
  153. GPIO_Init(GPIOG,&GPIO_InitStructure);
  154. /* NE4 */
  155. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
  156. GPIO_Init(GPIOG,&GPIO_InitStructure);
  157. }
  158. /* FSMC GPIO configure */
  159. GPIO_SetBits(GPIOE,GPIO_Pin_5); /* DM9000A */
  160. GPIO_SetBits(GPIOF,GPIO_Pin_10); /* LCD */
  161. GPIO_SetBits(GPIOA,GPIO_Pin_3); /* SPI_FLASH */
  162. }
  163. /**
  164. * This function will initial STM32 Radio board.
  165. */
  166. extern void FSMC_SRAM_Init(void);
  167. void rt_hw_board_init()
  168. {
  169. //NAND_IDTypeDef NAND_ID;
  170. /* Configure the system clocks */
  171. SystemInit();
  172. all_device_reset();
  173. /* NVIC Configuration */
  174. NVIC_Configuration();
  175. /* Configure the SysTick */
  176. SysTick_Config( SystemCoreClock / RT_TICK_PER_SECOND );
  177. /* Console Initialization*/
  178. rt_hw_usart_init();
  179. rt_console_set_device("uart1");
  180. rt_kprintf("\r\n\r\nSystemInit......\r\n");
  181. /* SRAM init */
  182. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
  183. FSMC_SRAM_Init();
  184. /* memtest */
  185. {
  186. unsigned char * p_extram = (unsigned char *)STM32_EXT_SRAM_BEGIN;
  187. unsigned int temp;
  188. rt_kprintf("\r\nmem testing....");
  189. for(temp=0; temp<(STM32_EXT_SRAM_END-STM32_EXT_SRAM_BEGIN); temp++)
  190. {
  191. *p_extram++ = (unsigned char)temp;
  192. }
  193. p_extram = (unsigned char *)STM32_EXT_SRAM_BEGIN;
  194. for(temp=0; temp<(STM32_EXT_SRAM_END-STM32_EXT_SRAM_BEGIN); temp++)
  195. {
  196. if( *p_extram++ != (unsigned char)temp )
  197. {
  198. rt_kprintf("\rmemtest fail @ %08X\r\nsystem halt!!!!!",(unsigned int)p_extram);
  199. while(1);
  200. }
  201. }
  202. rt_kprintf("\rmem test pass!!\r\n");
  203. }/* memtest */
  204. /* SPI1 config */
  205. {
  206. GPIO_InitTypeDef GPIO_InitStructure;
  207. SPI_InitTypeDef SPI_InitStructure;
  208. /* Enable SPI1 Periph clock */
  209. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA
  210. | RCC_APB2Periph_AFIO | RCC_APB2Periph_SPI1,
  211. ENABLE);
  212. /* Configure SPI1 pins: PA5-SCK, PA6-MISO and PA7-MOSI */
  213. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;
  214. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  215. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  216. GPIO_Init(GPIOA, &GPIO_InitStructure);
  217. /*------------------------ SPI1 configuration ------------------------*/
  218. SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;//SPI_Direction_1Line_Tx;
  219. SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
  220. SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
  221. SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
  222. SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
  223. SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
  224. SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_8;/* 72M/64=1.125M */
  225. SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
  226. SPI_InitStructure.SPI_CRCPolynomial = 7;
  227. SPI_I2S_DeInit(SPI1);
  228. SPI_Init(SPI1, &SPI_InitStructure);
  229. /* Enable SPI_MASTER */
  230. SPI_Cmd(SPI1, ENABLE);
  231. SPI_CalculateCRC(SPI1, DISABLE);
  232. }
  233. }/* rt_hw_board_init */
  234. /*@}*/