drv_usart.c 26 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912
  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-10-30 SummerGift first version
  9. */
  10. #include "board.h"
  11. #include "drv_usart.h"
  12. #include "drv_config.h"
  13. #ifdef RT_USING_SERIAL
  14. //#define DRV_DEBUG
  15. #define LOG_TAG "drv.usart"
  16. #include <drv_log.h>
  17. #if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) \
  18. && !defined(BSP_USING_UART4) && !defined(BSP_USING_UART5) && !defined(BSP_USING_UART6) && !defined(BSP_USING_LPUART1)
  19. #error "Please define at least one BSP_USING_UARTx"
  20. /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
  21. #endif
  22. #ifdef RT_SERIAL_USING_DMA
  23. static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag);
  24. #endif
  25. enum
  26. {
  27. #ifdef BSP_USING_UART1
  28. UART1_INDEX,
  29. #endif
  30. #ifdef BSP_USING_UART2
  31. UART2_INDEX,
  32. #endif
  33. #ifdef BSP_USING_UART3
  34. UART3_INDEX,
  35. #endif
  36. #ifdef BSP_USING_UART4
  37. UART4_INDEX,
  38. #endif
  39. #ifdef BSP_USING_UART5
  40. UART5_INDEX,
  41. #endif
  42. #ifdef BSP_USING_UART6
  43. UART6_INDEX,
  44. #endif
  45. #ifdef BSP_USING_LPUART1
  46. LPUART1_INDEX,
  47. #endif
  48. };
  49. static struct stm32_uart_config uart_config[] =
  50. {
  51. #ifdef BSP_USING_UART1
  52. UART1_CONFIG,
  53. #endif
  54. #ifdef BSP_USING_UART2
  55. UART2_CONFIG,
  56. #endif
  57. #ifdef BSP_USING_UART3
  58. UART3_CONFIG,
  59. #endif
  60. #ifdef BSP_USING_UART4
  61. UART4_CONFIG,
  62. #endif
  63. #ifdef BSP_USING_UART5
  64. UART5_CONFIG,
  65. #endif
  66. #ifdef BSP_USING_UART6
  67. UART6_CONFIG,
  68. #endif
  69. #ifdef BSP_USING_LPUART1
  70. LPUART1_CONFIG,
  71. #endif
  72. };
  73. static struct stm32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
  74. static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  75. {
  76. struct stm32_uart *uart;
  77. RT_ASSERT(serial != RT_NULL);
  78. RT_ASSERT(cfg != RT_NULL);
  79. uart = (struct stm32_uart *)serial->parent.user_data;
  80. RT_ASSERT(uart != RT_NULL);
  81. uart->handle.Instance = uart->config->Instance;
  82. uart->handle.Init.BaudRate = cfg->baud_rate;
  83. uart->handle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
  84. uart->handle.Init.Mode = UART_MODE_TX_RX;
  85. uart->handle.Init.OverSampling = UART_OVERSAMPLING_16;
  86. switch (cfg->data_bits)
  87. {
  88. case DATA_BITS_8:
  89. uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
  90. break;
  91. case DATA_BITS_9:
  92. uart->handle.Init.WordLength = UART_WORDLENGTH_9B;
  93. break;
  94. default:
  95. uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
  96. break;
  97. }
  98. switch (cfg->stop_bits)
  99. {
  100. case STOP_BITS_1:
  101. uart->handle.Init.StopBits = UART_STOPBITS_1;
  102. break;
  103. case STOP_BITS_2:
  104. uart->handle.Init.StopBits = UART_STOPBITS_2;
  105. break;
  106. default:
  107. uart->handle.Init.StopBits = UART_STOPBITS_1;
  108. break;
  109. }
  110. switch (cfg->parity)
  111. {
  112. case PARITY_NONE:
  113. uart->handle.Init.Parity = UART_PARITY_NONE;
  114. break;
  115. case PARITY_ODD:
  116. uart->handle.Init.Parity = UART_PARITY_ODD;
  117. break;
  118. case PARITY_EVEN:
  119. uart->handle.Init.Parity = UART_PARITY_EVEN;
  120. break;
  121. default:
  122. uart->handle.Init.Parity = UART_PARITY_NONE;
  123. break;
  124. }
  125. if (HAL_UART_Init(&uart->handle) != HAL_OK)
  126. {
  127. return -RT_ERROR;
  128. }
  129. return RT_EOK;
  130. }
  131. static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
  132. {
  133. struct stm32_uart *uart;
  134. #ifdef RT_SERIAL_USING_DMA
  135. rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
  136. #endif
  137. RT_ASSERT(serial != RT_NULL);
  138. uart = (struct stm32_uart *)serial->parent.user_data;
  139. RT_ASSERT(uart != RT_NULL);
  140. switch (cmd)
  141. {
  142. /* disable interrupt */
  143. case RT_DEVICE_CTRL_CLR_INT:
  144. /* disable rx irq */
  145. NVIC_DisableIRQ(uart->config->irq_type);
  146. /* disable interrupt */
  147. __HAL_UART_DISABLE_IT(&(uart->handle), UART_IT_RXNE);
  148. break;
  149. /* enable interrupt */
  150. case RT_DEVICE_CTRL_SET_INT:
  151. /* enable rx irq */
  152. NVIC_EnableIRQ(uart->config->irq_type);
  153. /* enable interrupt */
  154. __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_RXNE);
  155. break;
  156. #ifdef RT_SERIAL_USING_DMA
  157. case RT_DEVICE_CTRL_CONFIG:
  158. stm32_dma_config(serial, ctrl_arg);
  159. break;
  160. #endif
  161. }
  162. return RT_EOK;
  163. }
  164. static int stm32_putc(struct rt_serial_device *serial, char c)
  165. {
  166. struct stm32_uart *uart;
  167. RT_ASSERT(serial != RT_NULL);
  168. uart = (struct stm32_uart *)serial->parent.user_data;
  169. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  170. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
  171. || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7)
  172. uart->handle.Instance->TDR = c;
  173. #else
  174. uart->handle.Instance->DR = c;
  175. #endif
  176. while (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) == RESET);
  177. return 1;
  178. }
  179. static int stm32_getc(struct rt_serial_device *serial)
  180. {
  181. int ch;
  182. struct stm32_uart *uart;
  183. RT_ASSERT(serial != RT_NULL);
  184. uart = (struct stm32_uart *)serial->parent.user_data;
  185. RT_ASSERT(uart != RT_NULL);
  186. ch = -1;
  187. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
  188. {
  189. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
  190. || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7)
  191. ch = uart->handle.Instance->RDR & 0xff;
  192. #else
  193. ch = uart->handle.Instance->DR & 0xff;
  194. #endif
  195. }
  196. return ch;
  197. }
  198. static rt_size_t stm32_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
  199. {
  200. struct stm32_uart *uart;
  201. RT_ASSERT(serial != RT_NULL);
  202. uart = (struct stm32_uart *)(serial->parent.user_data);
  203. RT_ASSERT(uart != RT_NULL);
  204. if (size == 0)
  205. {
  206. return 0;
  207. }
  208. if (RT_SERIAL_DMA_TX == direction)
  209. {
  210. if (HAL_UART_Transmit_DMA(&uart->handle, buf, size) == HAL_OK)
  211. {
  212. return size;
  213. }
  214. else
  215. {
  216. return 0;
  217. }
  218. }
  219. return 0;
  220. }
  221. static const struct rt_uart_ops stm32_uart_ops =
  222. {
  223. .configure = stm32_configure,
  224. .control = stm32_control,
  225. .putc = stm32_putc,
  226. .getc = stm32_getc,
  227. .dma_transmit = stm32_dma_transmit
  228. };
  229. /**
  230. * Uart common interrupt process. This need add to uart ISR.
  231. *
  232. * @param serial serial device
  233. */
  234. static void uart_isr(struct rt_serial_device *serial)
  235. {
  236. struct stm32_uart *uart;
  237. #ifdef RT_SERIAL_USING_DMA
  238. rt_size_t recv_total_index, recv_len;
  239. rt_base_t level;
  240. #endif
  241. RT_ASSERT(serial != RT_NULL);
  242. uart = (struct stm32_uart *) serial->parent.user_data;
  243. RT_ASSERT(uart != RT_NULL);
  244. /* UART in mode Receiver -------------------------------------------------*/
  245. if ((__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET) &&
  246. (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_RXNE) != RESET))
  247. {
  248. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  249. }
  250. #ifdef RT_SERIAL_USING_DMA
  251. else if ((uart->uart_dma_flag) && (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_IDLE) != RESET)
  252. && (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_IDLE) != RESET))
  253. {
  254. level = rt_hw_interrupt_disable();
  255. recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma_rx.handle));
  256. recv_len = recv_total_index - uart->dma_rx.last_index;
  257. uart->dma_rx.last_index = recv_total_index;
  258. rt_hw_interrupt_enable(level);
  259. if (recv_len)
  260. {
  261. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  262. }
  263. __HAL_UART_CLEAR_IDLEFLAG(&uart->handle);
  264. }
  265. else if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) != RESET)
  266. {
  267. if ((serial->parent.open_flag & RT_DEVICE_FLAG_DMA_TX) != 0)
  268. {
  269. HAL_UART_IRQHandler(&(uart->handle));
  270. }
  271. else
  272. {
  273. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  274. }
  275. }
  276. #endif
  277. else
  278. {
  279. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_ORE) != RESET)
  280. {
  281. __HAL_UART_CLEAR_OREFLAG(&uart->handle);
  282. }
  283. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_NE) != RESET)
  284. {
  285. __HAL_UART_CLEAR_NEFLAG(&uart->handle);
  286. }
  287. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_FE) != RESET)
  288. {
  289. __HAL_UART_CLEAR_FEFLAG(&uart->handle);
  290. }
  291. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_PE) != RESET)
  292. {
  293. __HAL_UART_CLEAR_PEFLAG(&uart->handle);
  294. }
  295. #if !defined(SOC_SERIES_STM32L4) && !defined(SOC_SERIES_STM32F7) && !defined(SOC_SERIES_STM32F0) \
  296. && !defined(SOC_SERIES_STM32L0) && !defined(SOC_SERIES_STM32G0) && !defined(SOC_SERIES_STM32H7)
  297. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBD) != RESET)
  298. {
  299. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_LBD);
  300. }
  301. #endif
  302. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_CTS) != RESET)
  303. {
  304. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_CTS);
  305. }
  306. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TXE) != RESET)
  307. {
  308. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TXE);
  309. }
  310. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) != RESET)
  311. {
  312. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  313. }
  314. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
  315. {
  316. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_RXNE);
  317. }
  318. }
  319. }
  320. #ifdef RT_SERIAL_USING_DMA
  321. static void dma_isr(struct rt_serial_device *serial)
  322. {
  323. struct stm32_uart *uart;
  324. rt_size_t recv_total_index, recv_len;
  325. rt_base_t level;
  326. RT_ASSERT(serial != RT_NULL);
  327. uart = (struct stm32_uart *) serial->parent.user_data;
  328. RT_ASSERT(uart != RT_NULL);
  329. if ((__HAL_DMA_GET_IT_SOURCE(&(uart->dma_rx.handle), DMA_IT_TC) != RESET) ||
  330. (__HAL_DMA_GET_IT_SOURCE(&(uart->dma_rx.handle), DMA_IT_HT) != RESET))
  331. {
  332. level = rt_hw_interrupt_disable();
  333. recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma_rx.handle));
  334. if (recv_total_index == 0)
  335. {
  336. recv_len = serial->config.bufsz - uart->dma_rx.last_index;
  337. }
  338. else
  339. {
  340. recv_len = recv_total_index - uart->dma_rx.last_index;
  341. }
  342. uart->dma_rx.last_index = recv_total_index;
  343. rt_hw_interrupt_enable(level);
  344. if (recv_len)
  345. {
  346. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  347. }
  348. }
  349. }
  350. #endif
  351. #if defined(BSP_USING_UART1)
  352. void USART1_IRQHandler(void)
  353. {
  354. /* enter interrupt */
  355. rt_interrupt_enter();
  356. uart_isr(&(uart_obj[UART1_INDEX].serial));
  357. /* leave interrupt */
  358. rt_interrupt_leave();
  359. }
  360. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA)
  361. void UART1_DMA_RX_IRQHandler(void)
  362. {
  363. /* enter interrupt */
  364. rt_interrupt_enter();
  365. HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma_rx.handle);
  366. /* leave interrupt */
  367. rt_interrupt_leave();
  368. }
  369. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA) */
  370. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA)
  371. void UART1_DMA_TX_IRQHandler(void)
  372. {
  373. /* enter interrupt */
  374. rt_interrupt_enter();
  375. HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma_tx.handle);
  376. /* leave interrupt */
  377. rt_interrupt_leave();
  378. }
  379. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA) */
  380. #endif /* BSP_USING_UART1 */
  381. #if defined(BSP_USING_UART2)
  382. void USART2_IRQHandler(void)
  383. {
  384. /* enter interrupt */
  385. rt_interrupt_enter();
  386. uart_isr(&(uart_obj[UART2_INDEX].serial));
  387. /* leave interrupt */
  388. rt_interrupt_leave();
  389. }
  390. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA)
  391. void UART2_DMA_RX_IRQHandler(void)
  392. {
  393. /* enter interrupt */
  394. rt_interrupt_enter();
  395. HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma_rx.handle);
  396. /* leave interrupt */
  397. rt_interrupt_leave();
  398. }
  399. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA) */
  400. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA)
  401. void UART2_DMA_TX_IRQHandler(void)
  402. {
  403. /* enter interrupt */
  404. rt_interrupt_enter();
  405. HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma_tx.handle);
  406. /* leave interrupt */
  407. rt_interrupt_leave();
  408. }
  409. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA) */
  410. #endif /* BSP_USING_UART2 */
  411. #if defined(BSP_USING_UART3)
  412. void USART3_IRQHandler(void)
  413. {
  414. /* enter interrupt */
  415. rt_interrupt_enter();
  416. uart_isr(&(uart_obj[UART3_INDEX].serial));
  417. /* leave interrupt */
  418. rt_interrupt_leave();
  419. }
  420. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_RX_USING_DMA)
  421. void UART3_DMA_RX_IRQHandler(void)
  422. {
  423. /* enter interrupt */
  424. rt_interrupt_enter();
  425. HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma_rx.handle);
  426. /* leave interrupt */
  427. rt_interrupt_leave();
  428. }
  429. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART3_RX_USING_DMA) */
  430. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_TX_USING_DMA)
  431. void UART3_DMA_TX_IRQHandler(void)
  432. {
  433. /* enter interrupt */
  434. rt_interrupt_enter();
  435. HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma_tx.handle);
  436. /* leave interrupt */
  437. rt_interrupt_leave();
  438. }
  439. #endif /* defined(BSP_UART_USING_DMA_TX) && defined(BSP_UART3_TX_USING_DMA) */
  440. #endif /* BSP_USING_UART3*/
  441. #if defined(BSP_USING_UART4)
  442. void UART4_IRQHandler(void)
  443. {
  444. /* enter interrupt */
  445. rt_interrupt_enter();
  446. uart_isr(&(uart_obj[UART4_INDEX].serial));
  447. /* leave interrupt */
  448. rt_interrupt_leave();
  449. }
  450. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_RX_USING_DMA)
  451. void UART4_DMA_RX_IRQHandler(void)
  452. {
  453. /* enter interrupt */
  454. rt_interrupt_enter();
  455. HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma_rx.handle);
  456. /* leave interrupt */
  457. rt_interrupt_leave();
  458. }
  459. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART4_RX_USING_DMA) */
  460. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_TX_USING_DMA)
  461. void UART4_DMA_TX_IRQHandler(void)
  462. {
  463. /* enter interrupt */
  464. rt_interrupt_enter();
  465. HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma_tx.handle);
  466. /* leave interrupt */
  467. rt_interrupt_leave();
  468. }
  469. #endif /* defined(BSP_UART_USING_DMA_TX) && defined(BSP_UART4_TX_USING_DMA) */
  470. #endif /* BSP_USING_UART4*/
  471. #if defined(BSP_USING_UART5)
  472. void UART5_IRQHandler(void)
  473. {
  474. /* enter interrupt */
  475. rt_interrupt_enter();
  476. uart_isr(&(uart_obj[UART5_INDEX].serial));
  477. /* leave interrupt */
  478. rt_interrupt_leave();
  479. }
  480. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA)
  481. void UART5_DMA_RX_IRQHandler(void)
  482. {
  483. /* enter interrupt */
  484. rt_interrupt_enter();
  485. HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma_rx.handle);
  486. /* leave interrupt */
  487. rt_interrupt_leave();
  488. }
  489. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) */
  490. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_TX_USING_DMA)
  491. void UART5_DMA_TX_IRQHandler(void)
  492. {
  493. /* enter interrupt */
  494. rt_interrupt_enter();
  495. HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma_tx.handle);
  496. /* leave interrupt */
  497. rt_interrupt_leave();
  498. }
  499. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_TX_USING_DMA) */
  500. #endif /* BSP_USING_UART5*/
  501. #if defined(BSP_USING_UART6)
  502. void USART6_IRQHandler(void)
  503. {
  504. /* enter interrupt */
  505. rt_interrupt_enter();
  506. uart_isr(&(uart_obj[UART6_INDEX].serial));
  507. /* leave interrupt */
  508. rt_interrupt_leave();
  509. }
  510. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA)
  511. void UART6_DMA_RX_IRQHandler(void)
  512. {
  513. /* enter interrupt */
  514. rt_interrupt_enter();
  515. HAL_DMA_IRQHandler(&uart_obj[UART6_INDEX].dma_rx.handle);
  516. /* leave interrupt */
  517. rt_interrupt_leave();
  518. }
  519. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA) */
  520. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_TX_USING_DMA)
  521. void UART6_DMA_TX_IRQHandler(void)
  522. {
  523. /* enter interrupt */
  524. rt_interrupt_enter();
  525. HAL_DMA_IRQHandler(&uart_obj[UART6_INDEX].dma_tx.handle);
  526. /* leave interrupt */
  527. rt_interrupt_leave();
  528. }
  529. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_TX_USING_DMA) */
  530. #endif /* BSP_USING_UART6*/
  531. #if defined(BSP_USING_LPUART1)
  532. void LPUART1_IRQHandler(void)
  533. {
  534. /* enter interrupt */
  535. rt_interrupt_enter();
  536. uart_isr(&(uart_obj[LPUART1_INDEX].serial));
  537. /* leave interrupt */
  538. rt_interrupt_leave();
  539. }
  540. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA)
  541. void LPUART1_DMA_RX_IRQHandler(void)
  542. {
  543. /* enter interrupt */
  544. rt_interrupt_enter();
  545. HAL_DMA_IRQHandler(&uart_obj[LPUART1_INDEX].dma_rx.handle);
  546. /* leave interrupt */
  547. rt_interrupt_leave();
  548. }
  549. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA) */
  550. #endif /* BSP_USING_LPUART1*/
  551. #ifdef RT_SERIAL_USING_DMA
  552. static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
  553. {
  554. struct rt_serial_rx_fifo *rx_fifo;
  555. DMA_HandleTypeDef *DMA_Handle;
  556. struct dma_config *dma_config;
  557. struct stm32_uart *uart;
  558. RT_ASSERT(serial != RT_NULL);
  559. uart = (struct stm32_uart *)serial->parent.user_data;
  560. RT_ASSERT(uart != RT_NULL);
  561. if (RT_DEVICE_FLAG_DMA_RX == flag)
  562. {
  563. DMA_Handle = &uart->dma_rx.handle;
  564. dma_config = uart->config->dma_rx;
  565. }
  566. else if (RT_DEVICE_FLAG_DMA_TX == flag)
  567. {
  568. DMA_Handle = &uart->dma_tx.handle;
  569. dma_config = uart->config->dma_tx;
  570. }
  571. LOG_D("%s dma config start", uart->config->name);
  572. {
  573. rt_uint32_t tmpreg = 0x00U;
  574. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) \
  575. || defined(SOC_SERIES_STM32L0)
  576. /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
  577. SET_BIT(RCC->AHBENR, dma_config->dma_rcc);
  578. tmpreg = READ_BIT(RCC->AHBENR, dma_config->dma_rcc);
  579. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
  580. /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
  581. SET_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
  582. tmpreg = READ_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
  583. #endif
  584. UNUSED(tmpreg); /* To avoid compiler warnings */
  585. }
  586. if (RT_DEVICE_FLAG_DMA_RX == flag)
  587. {
  588. __HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma_rx.handle);
  589. }
  590. else if (RT_DEVICE_FLAG_DMA_TX == flag)
  591. {
  592. __HAL_LINKDMA(&(uart->handle), hdmatx, uart->dma_tx.handle);
  593. }
  594. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0)
  595. DMA_Handle->Instance = dma_config->Instance;
  596. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  597. DMA_Handle->Instance = dma_config->Instance;
  598. DMA_Handle->Init.Channel = dma_config->channel;
  599. #elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
  600. DMA_Handle->Instance = dma_config->Instance;
  601. DMA_Handle->Init.Request = dma_config->request;
  602. #endif
  603. DMA_Handle->Init.PeriphInc = DMA_PINC_DISABLE;
  604. DMA_Handle->Init.MemInc = DMA_MINC_ENABLE;
  605. DMA_Handle->Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
  606. DMA_Handle->Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
  607. if (RT_DEVICE_FLAG_DMA_RX == flag)
  608. {
  609. DMA_Handle->Init.Direction = DMA_PERIPH_TO_MEMORY;
  610. DMA_Handle->Init.Mode = DMA_CIRCULAR;
  611. }
  612. else if (RT_DEVICE_FLAG_DMA_TX == flag)
  613. {
  614. DMA_Handle->Init.Direction = DMA_MEMORY_TO_PERIPH;
  615. DMA_Handle->Init.Mode = DMA_NORMAL;
  616. }
  617. DMA_Handle->Init.Priority = DMA_PRIORITY_MEDIUM;
  618. #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  619. DMA_Handle->Init.FIFOMode = DMA_FIFOMODE_DISABLE;
  620. #endif
  621. if (HAL_DMA_DeInit(DMA_Handle) != HAL_OK)
  622. {
  623. RT_ASSERT(0);
  624. }
  625. if (HAL_DMA_Init(DMA_Handle) != HAL_OK)
  626. {
  627. RT_ASSERT(0);
  628. }
  629. /* enable interrupt */
  630. if (flag == RT_DEVICE_FLAG_DMA_RX)
  631. {
  632. rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
  633. /* Start DMA transfer */
  634. if (HAL_UART_Receive_DMA(&(uart->handle), rx_fifo->buffer, serial->config.bufsz) != HAL_OK)
  635. {
  636. /* Transfer error in reception process */
  637. RT_ASSERT(0);
  638. }
  639. CLEAR_BIT(uart->handle.Instance->CR3, USART_CR3_EIE);
  640. __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_IDLE);
  641. }
  642. /* enable irq */
  643. HAL_NVIC_SetPriority(dma_config->dma_irq, 0, 0);
  644. HAL_NVIC_EnableIRQ(dma_config->dma_irq);
  645. HAL_NVIC_SetPriority(uart->config->irq_type, 1, 0);
  646. HAL_NVIC_EnableIRQ(uart->config->irq_type);
  647. LOG_D("%s dma %s instance: %x", uart->config->name, flag == RT_DEVICE_FLAG_DMA_RX ? "RX" : "TX", DMA_Handle->Instance);
  648. LOG_D("%s dma config done", uart->config->name);
  649. }
  650. /**
  651. * @brief UART error callbacks
  652. * @param huart: UART handle
  653. * @note This example shows a simple way to report transfer error, and you can
  654. * add your own implementation.
  655. * @retval None
  656. */
  657. void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
  658. {
  659. RT_ASSERT(huart != NULL);
  660. struct stm32_uart *uart = (struct stm32_uart *)huart;
  661. LOG_D("%s: %s %d\n", __FUNCTION__, uart->config->name, huart->ErrorCode);
  662. UNUSED(uart);
  663. }
  664. /**
  665. * @brief Rx Transfer completed callback
  666. * @param huart: UART handle
  667. * @note This example shows a simple way to report end of DMA Rx transfer, and
  668. * you can add your own implementation.
  669. * @retval None
  670. */
  671. void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
  672. {
  673. struct stm32_uart *uart;
  674. RT_ASSERT(huart != NULL);
  675. uart = (struct stm32_uart *)huart;
  676. dma_isr(&uart->serial);
  677. }
  678. /**
  679. * @brief Rx Half transfer completed callback
  680. * @param huart: UART handle
  681. * @note This example shows a simple way to report end of DMA Rx Half transfer,
  682. * and you can add your own implementation.
  683. * @retval None
  684. */
  685. void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
  686. {
  687. struct stm32_uart *uart;
  688. RT_ASSERT(huart != NULL);
  689. uart = (struct stm32_uart *)huart;
  690. dma_isr(&uart->serial);
  691. }
  692. void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
  693. {
  694. struct stm32_uart *uart;
  695. RT_ASSERT(huart != NULL);
  696. uart = (struct stm32_uart *)huart;
  697. rt_hw_serial_isr(&uart->serial, RT_SERIAL_EVENT_TX_DMADONE);
  698. }
  699. #endif /* RT_SERIAL_USING_DMA */
  700. static void stm32_uart_get_dma_config(void)
  701. {
  702. #ifdef BSP_USING_UART1
  703. uart_obj[UART1_INDEX].uart_dma_flag = 0;
  704. #ifdef BSP_UART1_RX_USING_DMA
  705. uart_obj[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  706. static struct dma_config uart1_dma_rx = UART1_DMA_RX_CONFIG;
  707. uart_config[UART1_INDEX].dma_rx = &uart1_dma_rx;
  708. #endif
  709. #ifdef BSP_UART1_TX_USING_DMA
  710. uart_obj[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  711. static struct dma_config uart1_dma_tx = UART1_DMA_TX_CONFIG;
  712. uart_config[UART1_INDEX].dma_tx = &uart1_dma_tx;
  713. #endif
  714. #endif
  715. #ifdef BSP_USING_UART2
  716. uart_obj[UART2_INDEX].uart_dma_flag = 0;
  717. #ifdef BSP_UART2_RX_USING_DMA
  718. uart_obj[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  719. static struct dma_config uart2_dma_rx = UART2_DMA_RX_CONFIG;
  720. uart_config[UART2_INDEX].dma_rx = &uart2_dma_rx;
  721. #endif
  722. #ifdef BSP_UART2_TX_USING_DMA
  723. uart_obj[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  724. static struct dma_config uart2_dma_tx = UART2_DMA_TX_CONFIG;
  725. uart_config[UART2_INDEX].dma_tx = &uart2_dma_tx;
  726. #endif
  727. #endif
  728. #ifdef BSP_USING_UART3
  729. uart_obj[UART3_INDEX].uart_dma_flag = 0;
  730. #ifdef BSP_UART3_RX_USING_DMA
  731. uart_obj[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  732. static struct dma_config uart3_dma_rx = UART3_DMA_RX_CONFIG;
  733. uart_config[UART3_INDEX].dma_rx = &uart3_dma_rx;
  734. #endif
  735. #ifdef BSP_UART3_TX_USING_DMA
  736. uart_obj[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  737. static struct dma_config uart3_dma_tx = UART3_DMA_TX_CONFIG;
  738. uart_config[UART3_INDEX].dma_tx = &uart3_dma_tx;
  739. #endif
  740. #endif
  741. #ifdef BSP_USING_UART4
  742. uart_obj[UART4_INDEX].uart_dma_flag = 0;
  743. #ifdef BSP_UART4_RX_USING_DMA
  744. uart_obj[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  745. static struct dma_config uart4_dma_rx = UART4_DMA_RX_CONFIG;
  746. uart_config[UART4_INDEX].dma_rx = &uart4_dma_rx;
  747. #endif
  748. #ifdef BSP_UART4_TX_USING_DMA
  749. uart_obj[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  750. static struct dma_config uart4_dma_tx = UART4_DMA_TX_CONFIG;
  751. uart_config[UART4_INDEX].dma_tx = &uart4_dma_tx;
  752. #endif
  753. #endif
  754. #ifdef BSP_USING_UART5
  755. uart_obj[UART5_INDEX].uart_dma_flag = 0;
  756. #ifdef BSP_UART5_RX_USING_DMA
  757. uart_obj[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  758. static struct dma_config uart5_dma_rx = UART5_DMA_RX_CONFIG;
  759. uart_config[UART5_INDEX].dma_rx = &uart5_dma_rx;
  760. #endif
  761. #ifdef BSP_UART5_TX_USING_DMA
  762. uart_obj[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  763. static struct dma_config uart5_dma_tx = UART5_DMA_TX_CONFIG;
  764. uart_config[UART5_INDEX].dma_tx = &uart5_dma_tx;
  765. #endif
  766. #endif
  767. #ifdef BSP_USING_UART6
  768. uart_obj[UART6_INDEX].uart_dma_flag = 0;
  769. #ifdef BSP_UART6_RX_USING_DMA
  770. uart_obj[UART6_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  771. static struct dma_config uart6_dma_rx = UART6_DMA_RX_CONFIG;
  772. uart_config[UART6_INDEX].dma_rx = &uart6_dma_rx;
  773. #endif
  774. #ifdef BSP_UART6_TX_USING_DMA
  775. uart_obj[UART6_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  776. static struct dma_config uart6_dma_tx = UART6_DMA_TX_CONFIG;
  777. uart_config[UART6_INDEX].dma_tx = &uart6_dma_tx;
  778. #endif
  779. #endif
  780. }
  781. int rt_hw_usart_init(void)
  782. {
  783. rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct stm32_uart);
  784. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  785. rt_err_t result = 0;
  786. stm32_uart_get_dma_config();
  787. for (int i = 0; i < obj_num; i++)
  788. {
  789. uart_obj[i].config = &uart_config[i];
  790. uart_obj[i].serial.ops = &stm32_uart_ops;
  791. uart_obj[i].serial.config = config;
  792. /* register UART device */
  793. result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,
  794. RT_DEVICE_FLAG_RDWR
  795. | RT_DEVICE_FLAG_INT_RX
  796. | RT_DEVICE_FLAG_INT_TX
  797. | uart_obj[i].uart_dma_flag
  798. , &uart_obj[i]);
  799. RT_ASSERT(result == RT_EOK);
  800. }
  801. return result;
  802. }
  803. #endif /* RT_USING_SERIAL */