drv_usart.c 28 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-10-30 SummerGift first version
  9. */
  10. #include "board.h"
  11. #include "drv_usart.h"
  12. #include "drv_config.h"
  13. #ifdef RT_USING_SERIAL
  14. //#define DRV_DEBUG
  15. #define LOG_TAG "drv.usart"
  16. #include <drv_log.h>
  17. #if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) && \
  18. !defined(BSP_USING_UART4) && !defined(BSP_USING_UART5) && !defined(BSP_USING_UART6) && \
  19. !defined(BSP_USING_UART7) && !defined(BSP_USING_UART8) && !defined(BSP_USING_LPUART1)
  20. #error "Please define at least one BSP_USING_UARTx"
  21. /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
  22. #endif
  23. #ifdef RT_SERIAL_USING_DMA
  24. static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag);
  25. #endif
  26. enum
  27. {
  28. #ifdef BSP_USING_UART1
  29. UART1_INDEX,
  30. #endif
  31. #ifdef BSP_USING_UART2
  32. UART2_INDEX,
  33. #endif
  34. #ifdef BSP_USING_UART3
  35. UART3_INDEX,
  36. #endif
  37. #ifdef BSP_USING_UART4
  38. UART4_INDEX,
  39. #endif
  40. #ifdef BSP_USING_UART5
  41. UART5_INDEX,
  42. #endif
  43. #ifdef BSP_USING_UART6
  44. UART6_INDEX,
  45. #endif
  46. #ifdef BSP_USING_UART7
  47. UART7_INDEX,
  48. #endif
  49. #ifdef BSP_USING_UART8
  50. UART8_INDEX,
  51. #endif
  52. #ifdef BSP_USING_LPUART1
  53. LPUART1_INDEX,
  54. #endif
  55. };
  56. static struct stm32_uart_config uart_config[] =
  57. {
  58. #ifdef BSP_USING_UART1
  59. UART1_CONFIG,
  60. #endif
  61. #ifdef BSP_USING_UART2
  62. UART2_CONFIG,
  63. #endif
  64. #ifdef BSP_USING_UART3
  65. UART3_CONFIG,
  66. #endif
  67. #ifdef BSP_USING_UART4
  68. UART4_CONFIG,
  69. #endif
  70. #ifdef BSP_USING_UART5
  71. UART5_CONFIG,
  72. #endif
  73. #ifdef BSP_USING_UART6
  74. UART6_CONFIG,
  75. #endif
  76. #ifdef BSP_USING_UART7
  77. UART7_CONFIG,
  78. #endif
  79. #ifdef BSP_USING_UART8
  80. UART8_CONFIG,
  81. #endif
  82. #ifdef BSP_USING_LPUART1
  83. LPUART1_CONFIG,
  84. #endif
  85. };
  86. static struct stm32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
  87. static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  88. {
  89. struct stm32_uart *uart;
  90. RT_ASSERT(serial != RT_NULL);
  91. RT_ASSERT(cfg != RT_NULL);
  92. uart = rt_container_of(serial, struct stm32_uart, serial);
  93. uart->handle.Instance = uart->config->Instance;
  94. uart->handle.Init.BaudRate = cfg->baud_rate;
  95. uart->handle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
  96. uart->handle.Init.Mode = UART_MODE_TX_RX;
  97. uart->handle.Init.OverSampling = UART_OVERSAMPLING_16;
  98. switch (cfg->data_bits)
  99. {
  100. case DATA_BITS_8:
  101. uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
  102. break;
  103. case DATA_BITS_9:
  104. uart->handle.Init.WordLength = UART_WORDLENGTH_9B;
  105. break;
  106. default:
  107. uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
  108. break;
  109. }
  110. switch (cfg->stop_bits)
  111. {
  112. case STOP_BITS_1:
  113. uart->handle.Init.StopBits = UART_STOPBITS_1;
  114. break;
  115. case STOP_BITS_2:
  116. uart->handle.Init.StopBits = UART_STOPBITS_2;
  117. break;
  118. default:
  119. uart->handle.Init.StopBits = UART_STOPBITS_1;
  120. break;
  121. }
  122. switch (cfg->parity)
  123. {
  124. case PARITY_NONE:
  125. uart->handle.Init.Parity = UART_PARITY_NONE;
  126. break;
  127. case PARITY_ODD:
  128. uart->handle.Init.Parity = UART_PARITY_ODD;
  129. break;
  130. case PARITY_EVEN:
  131. uart->handle.Init.Parity = UART_PARITY_EVEN;
  132. break;
  133. default:
  134. uart->handle.Init.Parity = UART_PARITY_NONE;
  135. break;
  136. }
  137. if (HAL_UART_Init(&uart->handle) != HAL_OK)
  138. {
  139. return -RT_ERROR;
  140. }
  141. return RT_EOK;
  142. }
  143. static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
  144. {
  145. struct stm32_uart *uart;
  146. #ifdef RT_SERIAL_USING_DMA
  147. rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
  148. #endif
  149. RT_ASSERT(serial != RT_NULL);
  150. uart = rt_container_of(serial, struct stm32_uart, serial);
  151. switch (cmd)
  152. {
  153. /* disable interrupt */
  154. case RT_DEVICE_CTRL_CLR_INT:
  155. /* disable rx irq */
  156. NVIC_DisableIRQ(uart->config->irq_type);
  157. /* disable interrupt */
  158. __HAL_UART_DISABLE_IT(&(uart->handle), UART_IT_RXNE);
  159. break;
  160. /* enable interrupt */
  161. case RT_DEVICE_CTRL_SET_INT:
  162. /* enable rx irq */
  163. NVIC_EnableIRQ(uart->config->irq_type);
  164. /* enable interrupt */
  165. __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_RXNE);
  166. break;
  167. #ifdef RT_SERIAL_USING_DMA
  168. case RT_DEVICE_CTRL_CONFIG:
  169. stm32_dma_config(serial, ctrl_arg);
  170. break;
  171. #endif
  172. }
  173. return RT_EOK;
  174. }
  175. static int stm32_putc(struct rt_serial_device *serial, char c)
  176. {
  177. struct stm32_uart *uart;
  178. RT_ASSERT(serial != RT_NULL);
  179. uart = rt_container_of(serial, struct stm32_uart, serial);
  180. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  181. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
  182. || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7) \
  183. || defined(SOC_SERIES_STM32G4)
  184. uart->handle.Instance->TDR = c;
  185. #else
  186. uart->handle.Instance->DR = c;
  187. #endif
  188. while (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) == RESET);
  189. return 1;
  190. }
  191. static int stm32_getc(struct rt_serial_device *serial)
  192. {
  193. int ch;
  194. struct stm32_uart *uart;
  195. RT_ASSERT(serial != RT_NULL);
  196. uart = rt_container_of(serial, struct stm32_uart, serial);
  197. ch = -1;
  198. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
  199. {
  200. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
  201. || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32H7) \
  202. || defined(SOC_SERIES_STM32G4)
  203. ch = uart->handle.Instance->RDR & 0xff;
  204. #else
  205. ch = uart->handle.Instance->DR & 0xff;
  206. #endif
  207. }
  208. return ch;
  209. }
  210. static rt_size_t stm32_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
  211. {
  212. struct stm32_uart *uart;
  213. RT_ASSERT(serial != RT_NULL);
  214. uart = rt_container_of(serial, struct stm32_uart, serial);
  215. if (size == 0)
  216. {
  217. return 0;
  218. }
  219. if (RT_SERIAL_DMA_TX == direction)
  220. {
  221. if (HAL_UART_Transmit_DMA(&uart->handle, buf, size) == HAL_OK)
  222. {
  223. return size;
  224. }
  225. else
  226. {
  227. return 0;
  228. }
  229. }
  230. return 0;
  231. }
  232. static const struct rt_uart_ops stm32_uart_ops =
  233. {
  234. .configure = stm32_configure,
  235. .control = stm32_control,
  236. .putc = stm32_putc,
  237. .getc = stm32_getc,
  238. .dma_transmit = stm32_dma_transmit
  239. };
  240. /**
  241. * Uart common interrupt process. This need add to uart ISR.
  242. *
  243. * @param serial serial device
  244. */
  245. static void uart_isr(struct rt_serial_device *serial)
  246. {
  247. struct stm32_uart *uart;
  248. #ifdef RT_SERIAL_USING_DMA
  249. rt_size_t recv_total_index, recv_len;
  250. rt_base_t level;
  251. #endif
  252. RT_ASSERT(serial != RT_NULL);
  253. uart = rt_container_of(serial, struct stm32_uart, serial);
  254. /* UART in mode Receiver -------------------------------------------------*/
  255. if ((__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET) &&
  256. (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_RXNE) != RESET))
  257. {
  258. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  259. }
  260. #ifdef RT_SERIAL_USING_DMA
  261. else if ((uart->uart_dma_flag) && (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_IDLE) != RESET)
  262. && (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_IDLE) != RESET))
  263. {
  264. level = rt_hw_interrupt_disable();
  265. recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma_rx.handle));
  266. recv_len = recv_total_index - uart->dma_rx.last_index;
  267. uart->dma_rx.last_index = recv_total_index;
  268. rt_hw_interrupt_enable(level);
  269. if (recv_len)
  270. {
  271. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  272. }
  273. __HAL_UART_CLEAR_IDLEFLAG(&uart->handle);
  274. }
  275. else if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) != RESET)
  276. {
  277. if ((serial->parent.open_flag & RT_DEVICE_FLAG_DMA_TX) != 0)
  278. {
  279. HAL_UART_IRQHandler(&(uart->handle));
  280. }
  281. else
  282. {
  283. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  284. }
  285. }
  286. #endif
  287. else
  288. {
  289. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_ORE) != RESET)
  290. {
  291. __HAL_UART_CLEAR_OREFLAG(&uart->handle);
  292. }
  293. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_NE) != RESET)
  294. {
  295. __HAL_UART_CLEAR_NEFLAG(&uart->handle);
  296. }
  297. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_FE) != RESET)
  298. {
  299. __HAL_UART_CLEAR_FEFLAG(&uart->handle);
  300. }
  301. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_PE) != RESET)
  302. {
  303. __HAL_UART_CLEAR_PEFLAG(&uart->handle);
  304. }
  305. #if !defined(SOC_SERIES_STM32L4) && !defined(SOC_SERIES_STM32F7) && !defined(SOC_SERIES_STM32F0) \
  306. && !defined(SOC_SERIES_STM32L0) && !defined(SOC_SERIES_STM32G0) && !defined(SOC_SERIES_STM32H7) \
  307. && !defined(SOC_SERIES_STM32G4)
  308. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBD) != RESET)
  309. {
  310. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_LBD);
  311. }
  312. #endif
  313. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_CTS) != RESET)
  314. {
  315. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_CTS);
  316. }
  317. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TXE) != RESET)
  318. {
  319. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TXE);
  320. }
  321. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) != RESET)
  322. {
  323. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  324. }
  325. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
  326. {
  327. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_RXNE);
  328. }
  329. }
  330. }
  331. #ifdef RT_SERIAL_USING_DMA
  332. static void dma_isr(struct rt_serial_device *serial)
  333. {
  334. struct stm32_uart *uart;
  335. rt_size_t recv_total_index, recv_len;
  336. rt_base_t level;
  337. RT_ASSERT(serial != RT_NULL);
  338. uart = rt_container_of(serial, struct stm32_uart, serial);
  339. if ((__HAL_DMA_GET_IT_SOURCE(&(uart->dma_rx.handle), DMA_IT_TC) != RESET) ||
  340. (__HAL_DMA_GET_IT_SOURCE(&(uart->dma_rx.handle), DMA_IT_HT) != RESET))
  341. {
  342. level = rt_hw_interrupt_disable();
  343. recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma_rx.handle));
  344. if (recv_total_index == 0)
  345. {
  346. recv_len = serial->config.bufsz - uart->dma_rx.last_index;
  347. }
  348. else
  349. {
  350. recv_len = recv_total_index - uart->dma_rx.last_index;
  351. }
  352. uart->dma_rx.last_index = recv_total_index;
  353. rt_hw_interrupt_enable(level);
  354. if (recv_len)
  355. {
  356. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  357. }
  358. }
  359. }
  360. #endif
  361. #if defined(BSP_USING_UART1)
  362. void USART1_IRQHandler(void)
  363. {
  364. /* enter interrupt */
  365. rt_interrupt_enter();
  366. uart_isr(&(uart_obj[UART1_INDEX].serial));
  367. /* leave interrupt */
  368. rt_interrupt_leave();
  369. }
  370. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA)
  371. void UART1_DMA_RX_IRQHandler(void)
  372. {
  373. /* enter interrupt */
  374. rt_interrupt_enter();
  375. HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma_rx.handle);
  376. /* leave interrupt */
  377. rt_interrupt_leave();
  378. }
  379. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA) */
  380. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA)
  381. void UART1_DMA_TX_IRQHandler(void)
  382. {
  383. /* enter interrupt */
  384. rt_interrupt_enter();
  385. HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma_tx.handle);
  386. /* leave interrupt */
  387. rt_interrupt_leave();
  388. }
  389. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_TX_USING_DMA) */
  390. #endif /* BSP_USING_UART1 */
  391. #if defined(BSP_USING_UART2)
  392. void USART2_IRQHandler(void)
  393. {
  394. /* enter interrupt */
  395. rt_interrupt_enter();
  396. uart_isr(&(uart_obj[UART2_INDEX].serial));
  397. /* leave interrupt */
  398. rt_interrupt_leave();
  399. }
  400. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA)
  401. void UART2_DMA_RX_IRQHandler(void)
  402. {
  403. /* enter interrupt */
  404. rt_interrupt_enter();
  405. HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma_rx.handle);
  406. /* leave interrupt */
  407. rt_interrupt_leave();
  408. }
  409. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA) */
  410. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA)
  411. void UART2_DMA_TX_IRQHandler(void)
  412. {
  413. /* enter interrupt */
  414. rt_interrupt_enter();
  415. HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma_tx.handle);
  416. /* leave interrupt */
  417. rt_interrupt_leave();
  418. }
  419. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_TX_USING_DMA) */
  420. #endif /* BSP_USING_UART2 */
  421. #if defined(BSP_USING_UART3)
  422. void USART3_IRQHandler(void)
  423. {
  424. /* enter interrupt */
  425. rt_interrupt_enter();
  426. uart_isr(&(uart_obj[UART3_INDEX].serial));
  427. /* leave interrupt */
  428. rt_interrupt_leave();
  429. }
  430. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_RX_USING_DMA)
  431. void UART3_DMA_RX_IRQHandler(void)
  432. {
  433. /* enter interrupt */
  434. rt_interrupt_enter();
  435. HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma_rx.handle);
  436. /* leave interrupt */
  437. rt_interrupt_leave();
  438. }
  439. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART3_RX_USING_DMA) */
  440. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_TX_USING_DMA)
  441. void UART3_DMA_TX_IRQHandler(void)
  442. {
  443. /* enter interrupt */
  444. rt_interrupt_enter();
  445. HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma_tx.handle);
  446. /* leave interrupt */
  447. rt_interrupt_leave();
  448. }
  449. #endif /* defined(BSP_UART_USING_DMA_TX) && defined(BSP_UART3_TX_USING_DMA) */
  450. #endif /* BSP_USING_UART3*/
  451. #if defined(BSP_USING_UART4)
  452. void UART4_IRQHandler(void)
  453. {
  454. /* enter interrupt */
  455. rt_interrupt_enter();
  456. uart_isr(&(uart_obj[UART4_INDEX].serial));
  457. /* leave interrupt */
  458. rt_interrupt_leave();
  459. }
  460. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_RX_USING_DMA)
  461. void UART4_DMA_RX_IRQHandler(void)
  462. {
  463. /* enter interrupt */
  464. rt_interrupt_enter();
  465. HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma_rx.handle);
  466. /* leave interrupt */
  467. rt_interrupt_leave();
  468. }
  469. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART4_RX_USING_DMA) */
  470. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_TX_USING_DMA)
  471. void UART4_DMA_TX_IRQHandler(void)
  472. {
  473. /* enter interrupt */
  474. rt_interrupt_enter();
  475. HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma_tx.handle);
  476. /* leave interrupt */
  477. rt_interrupt_leave();
  478. }
  479. #endif /* defined(BSP_UART_USING_DMA_TX) && defined(BSP_UART4_TX_USING_DMA) */
  480. #endif /* BSP_USING_UART4*/
  481. #if defined(BSP_USING_UART5)
  482. void UART5_IRQHandler(void)
  483. {
  484. /* enter interrupt */
  485. rt_interrupt_enter();
  486. uart_isr(&(uart_obj[UART5_INDEX].serial));
  487. /* leave interrupt */
  488. rt_interrupt_leave();
  489. }
  490. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA)
  491. void UART5_DMA_RX_IRQHandler(void)
  492. {
  493. /* enter interrupt */
  494. rt_interrupt_enter();
  495. HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma_rx.handle);
  496. /* leave interrupt */
  497. rt_interrupt_leave();
  498. }
  499. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) */
  500. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_TX_USING_DMA)
  501. void UART5_DMA_TX_IRQHandler(void)
  502. {
  503. /* enter interrupt */
  504. rt_interrupt_enter();
  505. HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma_tx.handle);
  506. /* leave interrupt */
  507. rt_interrupt_leave();
  508. }
  509. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_TX_USING_DMA) */
  510. #endif /* BSP_USING_UART5*/
  511. #if defined(BSP_USING_UART6)
  512. void USART6_IRQHandler(void)
  513. {
  514. /* enter interrupt */
  515. rt_interrupt_enter();
  516. uart_isr(&(uart_obj[UART6_INDEX].serial));
  517. /* leave interrupt */
  518. rt_interrupt_leave();
  519. }
  520. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA)
  521. void UART6_DMA_RX_IRQHandler(void)
  522. {
  523. /* enter interrupt */
  524. rt_interrupt_enter();
  525. HAL_DMA_IRQHandler(&uart_obj[UART6_INDEX].dma_rx.handle);
  526. /* leave interrupt */
  527. rt_interrupt_leave();
  528. }
  529. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_RX_USING_DMA) */
  530. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_TX_USING_DMA)
  531. void UART6_DMA_TX_IRQHandler(void)
  532. {
  533. /* enter interrupt */
  534. rt_interrupt_enter();
  535. HAL_DMA_IRQHandler(&uart_obj[UART6_INDEX].dma_tx.handle);
  536. /* leave interrupt */
  537. rt_interrupt_leave();
  538. }
  539. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART6_TX_USING_DMA) */
  540. #endif /* BSP_USING_UART6*/
  541. #if defined(BSP_USING_UART7)
  542. void UART7_IRQHandler(void)
  543. {
  544. /* enter interrupt */
  545. rt_interrupt_enter();
  546. uart_isr(&(uart_obj[UART7_INDEX].serial));
  547. /* leave interrupt */
  548. rt_interrupt_leave();
  549. }
  550. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_RX_USING_DMA)
  551. void UART7_DMA_RX_IRQHandler(void)
  552. {
  553. /* enter interrupt */
  554. rt_interrupt_enter();
  555. HAL_DMA_IRQHandler(&uart_obj[UART7_INDEX].dma_rx.handle);
  556. /* leave interrupt */
  557. rt_interrupt_leave();
  558. }
  559. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_RX_USING_DMA) */
  560. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_TX_USING_DMA)
  561. void UART7_DMA_TX_IRQHandler(void)
  562. {
  563. /* enter interrupt */
  564. rt_interrupt_enter();
  565. HAL_DMA_IRQHandler(&uart_obj[UART7_INDEX].dma_tx.handle);
  566. /* leave interrupt */
  567. rt_interrupt_leave();
  568. }
  569. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART7_TX_USING_DMA) */
  570. #endif /* BSP_USING_UART7*/
  571. #if defined(BSP_USING_UART8)
  572. void UART8_IRQHandler(void)
  573. {
  574. /* enter interrupt */
  575. rt_interrupt_enter();
  576. uart_isr(&(uart_obj[UART8_INDEX].serial));
  577. /* leave interrupt */
  578. rt_interrupt_leave();
  579. }
  580. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_RX_USING_DMA)
  581. void UART8_DMA_RX_IRQHandler(void)
  582. {
  583. /* enter interrupt */
  584. rt_interrupt_enter();
  585. HAL_DMA_IRQHandler(&uart_obj[UART8_INDEX].dma_rx.handle);
  586. /* leave interrupt */
  587. rt_interrupt_leave();
  588. }
  589. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_RX_USING_DMA) */
  590. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_TX_USING_DMA)
  591. void UART8_DMA_TX_IRQHandler(void)
  592. {
  593. /* enter interrupt */
  594. rt_interrupt_enter();
  595. HAL_DMA_IRQHandler(&uart_obj[UART8_INDEX].dma_tx.handle);
  596. /* leave interrupt */
  597. rt_interrupt_leave();
  598. }
  599. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART8_TX_USING_DMA) */
  600. #endif /* BSP_USING_UART8*/
  601. #if defined(BSP_USING_LPUART1)
  602. void LPUART1_IRQHandler(void)
  603. {
  604. /* enter interrupt */
  605. rt_interrupt_enter();
  606. uart_isr(&(uart_obj[LPUART1_INDEX].serial));
  607. /* leave interrupt */
  608. rt_interrupt_leave();
  609. }
  610. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA)
  611. void LPUART1_DMA_RX_IRQHandler(void)
  612. {
  613. /* enter interrupt */
  614. rt_interrupt_enter();
  615. HAL_DMA_IRQHandler(&uart_obj[LPUART1_INDEX].dma_rx.handle);
  616. /* leave interrupt */
  617. rt_interrupt_leave();
  618. }
  619. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA) */
  620. #endif /* BSP_USING_LPUART1*/
  621. #ifdef RT_SERIAL_USING_DMA
  622. static void stm32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
  623. {
  624. struct rt_serial_rx_fifo *rx_fifo;
  625. DMA_HandleTypeDef *DMA_Handle;
  626. struct dma_config *dma_config;
  627. struct stm32_uart *uart;
  628. RT_ASSERT(serial != RT_NULL);
  629. uart = rt_container_of(serial, struct stm32_uart, serial);
  630. if (RT_DEVICE_FLAG_DMA_RX == flag)
  631. {
  632. DMA_Handle = &uart->dma_rx.handle;
  633. dma_config = uart->config->dma_rx;
  634. }
  635. else if (RT_DEVICE_FLAG_DMA_TX == flag)
  636. {
  637. DMA_Handle = &uart->dma_tx.handle;
  638. dma_config = uart->config->dma_tx;
  639. }
  640. LOG_D("%s dma config start", uart->config->name);
  641. {
  642. rt_uint32_t tmpreg = 0x00U;
  643. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) \
  644. || defined(SOC_SERIES_STM32L0)
  645. /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
  646. SET_BIT(RCC->AHBENR, dma_config->dma_rcc);
  647. tmpreg = READ_BIT(RCC->AHBENR, dma_config->dma_rcc);
  648. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4) \
  649. || defined(SOC_SERIES_STM32G4)
  650. /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
  651. SET_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
  652. tmpreg = READ_BIT(RCC->AHB1ENR, dma_config->dma_rcc);
  653. #endif
  654. UNUSED(tmpreg); /* To avoid compiler warnings */
  655. }
  656. if (RT_DEVICE_FLAG_DMA_RX == flag)
  657. {
  658. __HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma_rx.handle);
  659. }
  660. else if (RT_DEVICE_FLAG_DMA_TX == flag)
  661. {
  662. __HAL_LINKDMA(&(uart->handle), hdmatx, uart->dma_tx.handle);
  663. }
  664. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0)
  665. DMA_Handle->Instance = dma_config->Instance;
  666. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  667. DMA_Handle->Instance = dma_config->Instance;
  668. DMA_Handle->Init.Channel = dma_config->channel;
  669. #elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32G4)
  670. DMA_Handle->Instance = dma_config->Instance;
  671. DMA_Handle->Init.Request = dma_config->request;
  672. #endif
  673. DMA_Handle->Init.PeriphInc = DMA_PINC_DISABLE;
  674. DMA_Handle->Init.MemInc = DMA_MINC_ENABLE;
  675. DMA_Handle->Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
  676. DMA_Handle->Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
  677. if (RT_DEVICE_FLAG_DMA_RX == flag)
  678. {
  679. DMA_Handle->Init.Direction = DMA_PERIPH_TO_MEMORY;
  680. DMA_Handle->Init.Mode = DMA_CIRCULAR;
  681. }
  682. else if (RT_DEVICE_FLAG_DMA_TX == flag)
  683. {
  684. DMA_Handle->Init.Direction = DMA_MEMORY_TO_PERIPH;
  685. DMA_Handle->Init.Mode = DMA_NORMAL;
  686. }
  687. DMA_Handle->Init.Priority = DMA_PRIORITY_MEDIUM;
  688. #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  689. DMA_Handle->Init.FIFOMode = DMA_FIFOMODE_DISABLE;
  690. #endif
  691. if (HAL_DMA_DeInit(DMA_Handle) != HAL_OK)
  692. {
  693. RT_ASSERT(0);
  694. }
  695. if (HAL_DMA_Init(DMA_Handle) != HAL_OK)
  696. {
  697. RT_ASSERT(0);
  698. }
  699. /* enable interrupt */
  700. if (flag == RT_DEVICE_FLAG_DMA_RX)
  701. {
  702. rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
  703. /* Start DMA transfer */
  704. if (HAL_UART_Receive_DMA(&(uart->handle), rx_fifo->buffer, serial->config.bufsz) != HAL_OK)
  705. {
  706. /* Transfer error in reception process */
  707. RT_ASSERT(0);
  708. }
  709. CLEAR_BIT(uart->handle.Instance->CR3, USART_CR3_EIE);
  710. __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_IDLE);
  711. }
  712. /* enable irq */
  713. HAL_NVIC_SetPriority(dma_config->dma_irq, 0, 0);
  714. HAL_NVIC_EnableIRQ(dma_config->dma_irq);
  715. HAL_NVIC_SetPriority(uart->config->irq_type, 1, 0);
  716. HAL_NVIC_EnableIRQ(uart->config->irq_type);
  717. LOG_D("%s dma %s instance: %x", uart->config->name, flag == RT_DEVICE_FLAG_DMA_RX ? "RX" : "TX", DMA_Handle->Instance);
  718. LOG_D("%s dma config done", uart->config->name);
  719. }
  720. /**
  721. * @brief UART error callbacks
  722. * @param huart: UART handle
  723. * @note This example shows a simple way to report transfer error, and you can
  724. * add your own implementation.
  725. * @retval None
  726. */
  727. void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
  728. {
  729. RT_ASSERT(huart != NULL);
  730. struct stm32_uart *uart = (struct stm32_uart *)huart;
  731. LOG_D("%s: %s %d\n", __FUNCTION__, uart->config->name, huart->ErrorCode);
  732. UNUSED(uart);
  733. }
  734. /**
  735. * @brief Rx Transfer completed callback
  736. * @param huart: UART handle
  737. * @note This example shows a simple way to report end of DMA Rx transfer, and
  738. * you can add your own implementation.
  739. * @retval None
  740. */
  741. void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
  742. {
  743. struct stm32_uart *uart;
  744. RT_ASSERT(huart != NULL);
  745. uart = (struct stm32_uart *)huart;
  746. dma_isr(&uart->serial);
  747. }
  748. /**
  749. * @brief Rx Half transfer completed callback
  750. * @param huart: UART handle
  751. * @note This example shows a simple way to report end of DMA Rx Half transfer,
  752. * and you can add your own implementation.
  753. * @retval None
  754. */
  755. void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
  756. {
  757. struct stm32_uart *uart;
  758. RT_ASSERT(huart != NULL);
  759. uart = (struct stm32_uart *)huart;
  760. dma_isr(&uart->serial);
  761. }
  762. void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
  763. {
  764. struct stm32_uart *uart;
  765. RT_ASSERT(huart != NULL);
  766. uart = (struct stm32_uart *)huart;
  767. rt_hw_serial_isr(&uart->serial, RT_SERIAL_EVENT_TX_DMADONE);
  768. }
  769. #endif /* RT_SERIAL_USING_DMA */
  770. static void stm32_uart_get_dma_config(void)
  771. {
  772. #ifdef BSP_USING_UART1
  773. uart_obj[UART1_INDEX].uart_dma_flag = 0;
  774. #ifdef BSP_UART1_RX_USING_DMA
  775. uart_obj[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  776. static struct dma_config uart1_dma_rx = UART1_DMA_RX_CONFIG;
  777. uart_config[UART1_INDEX].dma_rx = &uart1_dma_rx;
  778. #endif
  779. #ifdef BSP_UART1_TX_USING_DMA
  780. uart_obj[UART1_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  781. static struct dma_config uart1_dma_tx = UART1_DMA_TX_CONFIG;
  782. uart_config[UART1_INDEX].dma_tx = &uart1_dma_tx;
  783. #endif
  784. #endif
  785. #ifdef BSP_USING_UART2
  786. uart_obj[UART2_INDEX].uart_dma_flag = 0;
  787. #ifdef BSP_UART2_RX_USING_DMA
  788. uart_obj[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  789. static struct dma_config uart2_dma_rx = UART2_DMA_RX_CONFIG;
  790. uart_config[UART2_INDEX].dma_rx = &uart2_dma_rx;
  791. #endif
  792. #ifdef BSP_UART2_TX_USING_DMA
  793. uart_obj[UART2_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  794. static struct dma_config uart2_dma_tx = UART2_DMA_TX_CONFIG;
  795. uart_config[UART2_INDEX].dma_tx = &uart2_dma_tx;
  796. #endif
  797. #endif
  798. #ifdef BSP_USING_UART3
  799. uart_obj[UART3_INDEX].uart_dma_flag = 0;
  800. #ifdef BSP_UART3_RX_USING_DMA
  801. uart_obj[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  802. static struct dma_config uart3_dma_rx = UART3_DMA_RX_CONFIG;
  803. uart_config[UART3_INDEX].dma_rx = &uart3_dma_rx;
  804. #endif
  805. #ifdef BSP_UART3_TX_USING_DMA
  806. uart_obj[UART3_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  807. static struct dma_config uart3_dma_tx = UART3_DMA_TX_CONFIG;
  808. uart_config[UART3_INDEX].dma_tx = &uart3_dma_tx;
  809. #endif
  810. #endif
  811. #ifdef BSP_USING_UART4
  812. uart_obj[UART4_INDEX].uart_dma_flag = 0;
  813. #ifdef BSP_UART4_RX_USING_DMA
  814. uart_obj[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  815. static struct dma_config uart4_dma_rx = UART4_DMA_RX_CONFIG;
  816. uart_config[UART4_INDEX].dma_rx = &uart4_dma_rx;
  817. #endif
  818. #ifdef BSP_UART4_TX_USING_DMA
  819. uart_obj[UART4_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  820. static struct dma_config uart4_dma_tx = UART4_DMA_TX_CONFIG;
  821. uart_config[UART4_INDEX].dma_tx = &uart4_dma_tx;
  822. #endif
  823. #endif
  824. #ifdef BSP_USING_UART5
  825. uart_obj[UART5_INDEX].uart_dma_flag = 0;
  826. #ifdef BSP_UART5_RX_USING_DMA
  827. uart_obj[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  828. static struct dma_config uart5_dma_rx = UART5_DMA_RX_CONFIG;
  829. uart_config[UART5_INDEX].dma_rx = &uart5_dma_rx;
  830. #endif
  831. #ifdef BSP_UART5_TX_USING_DMA
  832. uart_obj[UART5_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  833. static struct dma_config uart5_dma_tx = UART5_DMA_TX_CONFIG;
  834. uart_config[UART5_INDEX].dma_tx = &uart5_dma_tx;
  835. #endif
  836. #endif
  837. #ifdef BSP_USING_UART6
  838. uart_obj[UART6_INDEX].uart_dma_flag = 0;
  839. #ifdef BSP_UART6_RX_USING_DMA
  840. uart_obj[UART6_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_RX;
  841. static struct dma_config uart6_dma_rx = UART6_DMA_RX_CONFIG;
  842. uart_config[UART6_INDEX].dma_rx = &uart6_dma_rx;
  843. #endif
  844. #ifdef BSP_UART6_TX_USING_DMA
  845. uart_obj[UART6_INDEX].uart_dma_flag |= RT_DEVICE_FLAG_DMA_TX;
  846. static struct dma_config uart6_dma_tx = UART6_DMA_TX_CONFIG;
  847. uart_config[UART6_INDEX].dma_tx = &uart6_dma_tx;
  848. #endif
  849. #endif
  850. }
  851. int rt_hw_usart_init(void)
  852. {
  853. rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct stm32_uart);
  854. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  855. rt_err_t result = 0;
  856. stm32_uart_get_dma_config();
  857. for (int i = 0; i < obj_num; i++)
  858. {
  859. uart_obj[i].config = &uart_config[i];
  860. uart_obj[i].serial.ops = &stm32_uart_ops;
  861. uart_obj[i].serial.config = config;
  862. /* register UART device */
  863. result = rt_hw_serial_register(&uart_obj[i].serial, uart_obj[i].config->name,
  864. RT_DEVICE_FLAG_RDWR
  865. | RT_DEVICE_FLAG_INT_RX
  866. | RT_DEVICE_FLAG_INT_TX
  867. | uart_obj[i].uart_dma_flag
  868. , NULL);
  869. RT_ASSERT(result == RT_EOK);
  870. }
  871. return result;
  872. }
  873. #endif /* RT_USING_SERIAL */