sam7x_emac.h 3.5 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364
  1. #ifndef __SAM7X_EMAC_H__
  2. #define __SAM7X_EMAC_H__
  3. #define AT91C_PHY_ADDR 0x01
  4. #define MII_RTL8201_ID 0x82010000
  5. /* RTL8201 PHY registers. */
  6. #define PHY_REG_BMCR 0x00 /* Basic mode control register */
  7. #define PHY_REG_BMSR 0x01 /* Basic mode status register */
  8. #define PHY_REG_PHYID1 0x02 /* PHY ID identifier #1 */
  9. #define PHY_REG_PHYID2 0x03 /* PHY ID identifier #2 */
  10. #define PHY_REG_ANAR 0x04 /* AutoNegotiation Advertisement reg.*/
  11. #define PHY_REG_ANLPAR 0x05 /* AutoNeg.Link partner ability reg */
  12. #define PHY_REG_ANER 0x06 /* AutoNeg. Expansion register */
  13. #define PHY_REG_DSCR 0x10 /* DAVICOM Specified Config. reg */
  14. #define PHY_REG_DSCSR 0x11 /* DAVICOM Spec. Config/Status reg */
  15. #define PHY_REG_10BTCSR 0x12 /* 10BASET Configuration/Status reg */
  16. #define PHY_REG_PWDOR 0x13 /* Power Down Control Register */
  17. #define PHY_REG_SCR 0x14 /* Specified Config register */
  18. #define PHY_REG_INTR 0x15 /* Interrupt register */
  19. #define PHY_REG_RECR 0x16 /* Receive Error Counter register */
  20. #define PHY_REG_DISCR 0x17 /* Disconnect Counter register */
  21. #define PHY_REG_RLSR 0x18 /* Hardware Reset Latch State reg. */
  22. #define PHY_FULLD_100M 0x2100 /* Full Duplex 100Mbit */
  23. #define PHY_HALFD_100M 0x2000 /* Half Duplex 100Mbit */
  24. #define PHY_FULLD_10M 0x0100 /* Full Duplex 10Mbit */
  25. #define PHY_HALFD_10M 0x0000 /* Half Duplex 10MBit */
  26. #define PHY_AUTO_NEG 0x3000 /* Select Auto Negotiation */
  27. /* Basic mode status register. */
  28. #define BMSR_ERCAP 0x0001 /* Ext-reg capability */
  29. #define BMSR_JCD 0x0002 /* Jabber detected */
  30. #define BMSR_LINKST 0x0004 /* Link status */
  31. #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
  32. #define BMSR_RFAULT 0x0010 /* Remote fault detected */
  33. #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
  34. #define BMSR_MIIPRESUP 0x0040 /* MII Frame Preamble Suppression */
  35. #define BMSR_RESV 0x0780 /* Unused... */
  36. #define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
  37. #define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
  38. #define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
  39. #define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */
  40. #define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */
  41. #define RxDESC_FLAG_ADDR_MASK 0xfffffffc
  42. #define RxDESC_FLAG_WARP 0x00000002
  43. #define RxDESC_FLAG_OWNSHIP 0x00000001
  44. #define RxDESC_STATUS_BUF_SIZE (0x00000FFF)
  45. #define RxDESC_STATUS_FRAME_START (1U << 14)
  46. #define RxDESC_STATUS_FRAME_END (1U << 15)
  47. #define TxDESC_STATUS_BUF_SIZE (0x000007FF)
  48. #define TxDESC_STATUS_LAST_BUF (1U << 15)
  49. #define TxDESC_STATUS_NO_CRC (1U << 16)
  50. #define TxDESC_STATUS_BUF_EXHAUSTED (1U << 27)
  51. #define TxDESC_STATUS_Tx_UNDERRUN (1U << 28)
  52. #define TxDESC_STATUS_Tx_ERROR (1U << 29)
  53. #define TxDESC_STATUS_WRAP (1U << 30)
  54. #define TxDESC_STATUS_USED (1U << 31)
  55. int sam7xether_register(char *name);
  56. #endif