drv_usart.c 13 KB

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  1. /*
  2. * File : usart.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2009, RT-Thread Development Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2009-01-05 Bernard the first version
  13. * 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
  14. * 2012-02-08 aozima update for F4.
  15. * 2012-07-28 aozima update for ART board.
  16. * 2016-05-28 armink add DMA Rx mode
  17. */
  18. #include <gd32f4xx.h>
  19. #include <drv_usart.h>
  20. #include <board.h>
  21. #ifdef RT_USING_SERIAL
  22. #if !defined(RT_USING_USART0) && !defined(RT_USING_USART1) && \
  23. !defined(RT_USING_USART2) && !defined(RT_USING_UART3) && \
  24. !defined(RT_USING_UART4) && !defined(RT_USING_USART5) && \
  25. !defined(RT_USING_UART6) && !defined(RT_USING_UART7)
  26. #error "Please define "
  27. #endif
  28. #include <rtdevice.h>
  29. /* GD32 uart driver */
  30. // Todo: compress uart info
  31. struct gd32_uart
  32. {
  33. uint32_t uart_periph; //Todo: 3bits
  34. IRQn_Type irqn; //Todo: 7bits
  35. rcu_periph_enum per_clk; //Todo: 5bits
  36. rcu_periph_enum tx_gpio_clk; //Todo: 5bits
  37. rcu_periph_enum rx_gpio_clk; //Todo: 5bits
  38. uint32_t tx_port; //Todo: 4bits
  39. uint16_t tx_af; //Todo: 4bits
  40. uint16_t tx_pin; //Todo: 4bits
  41. uint32_t rx_port; //Todo: 4bits
  42. uint16_t rx_af; //Todo: 4bits
  43. uint16_t rx_pin; //Todo: 4bits
  44. struct rt_serial_device * serial;
  45. char *device_name;
  46. };
  47. static void uart_isr(struct rt_serial_device *serial);
  48. #if defined(RT_USING_USART0)
  49. struct rt_serial_device serial0;
  50. /* UART1 device driver structure */
  51. const struct gd32_uart usart0 =
  52. {
  53. USART0, // uart peripheral index
  54. USART0_IRQn, // uart iqrn
  55. RCU_USART0, RCU_GPIOA, RCU_GPIOA, // periph clock, tx gpio clock, rt gpio clock
  56. GPIOA, GPIO_AF_7, GPIO_PIN_9, // tx port, tx alternate, tx pin
  57. GPIOA, GPIO_AF_7, GPIO_PIN_10, // rx port, rx alternate, rx pin
  58. &serial0,
  59. "uart0",
  60. };
  61. void USART0_IRQHandler(void)
  62. {
  63. /* enter interrupt */
  64. rt_interrupt_enter();
  65. uart_isr(&serial0);
  66. /* leave interrupt */
  67. rt_interrupt_leave();
  68. }
  69. #endif /* RT_USING_USART0 */
  70. #if defined(RT_USING_USART1)
  71. struct rt_serial_device serial1;
  72. /* UART1 device driver structure */
  73. const struct gd32_uart usart1 =
  74. {
  75. USART1, // uart peripheral index
  76. USART1_IRQn, // uart iqrn
  77. RCU_USART1, RCU_GPIOA, RCU_GPIOA, // periph clock, tx gpio clock, rt gpio clock
  78. GPIOA, GPIO_AF_7, GPIO_PIN_2, // tx port, tx alternate, tx pin
  79. GPIOA, GPIO_AF_7, GPIO_PIN_3, // rx port, rx alternate, rx pin
  80. &serial1,
  81. "uart1",
  82. };
  83. void USART1_IRQHandler(void)
  84. {
  85. /* enter interrupt */
  86. rt_interrupt_enter();
  87. uart_isr(&serial1);
  88. /* leave interrupt */
  89. rt_interrupt_leave();
  90. }
  91. #endif /* RT_USING_UART1 */
  92. #if defined(RT_USING_USART2)
  93. struct rt_serial_device serial2;
  94. /* UART2 device driver structure */
  95. const struct gd32_uart usart2 =
  96. {
  97. USART2, // uart peripheral index
  98. USART2_IRQn, // uart iqrn
  99. RCU_USART2, RCU_GPIOB, RCU_GPIOB, // periph clock, tx gpio clock, rt gpio clock
  100. GPIOB, GPIO_AF_7, GPIO_PIN_10, // tx port, tx alternate, tx pin
  101. GPIOB, GPIO_AF_7, GPIO_PIN_11, // rx port, rx alternate, rx pin
  102. &serial2,
  103. "uart2",
  104. };
  105. void USART2_IRQHandler(void)
  106. {
  107. /* enter interrupt */
  108. rt_interrupt_enter();
  109. uart_isr(&serial2);
  110. /* leave interrupt */
  111. rt_interrupt_leave();
  112. }
  113. #endif /* RT_USING_UART2 */
  114. #if defined(RT_USING_UART3)
  115. struct rt_serial_device serial3;
  116. /* UART3 device driver structure */
  117. const struct gd32_uart uart3 =
  118. {
  119. UART3, // uart peripheral index
  120. UART3_IRQn, // uart iqrn
  121. RCU_UART3, RCU_GPIOC, RCU_GPIOC, // periph clock, tx gpio clock, rt gpio clock
  122. GPIOC, GPIO_AF_8, GPIO_PIN_10, // tx port, tx alternate, tx pin
  123. GPIOC, GPIO_AF_8, GPIO_PIN_11, // rx port, rx alternate, rx pin
  124. &serial3,
  125. "uart3",
  126. };
  127. void UART3_IRQHandler(void)
  128. {
  129. /* enter interrupt */
  130. rt_interrupt_enter();
  131. uart_isr(&serial3);
  132. /* leave interrupt */
  133. rt_interrupt_leave();
  134. }
  135. #endif /* RT_USING_UART3 */
  136. #if defined(RT_USING_UART4)
  137. struct rt_serial_device serial4;
  138. /* UART4 device driver structure */
  139. const struct gd32_uart uart4 =
  140. {
  141. UART4, // uart peripheral index
  142. UART4_IRQn, // uart iqrn
  143. RCU_UART4, RCU_GPIOC, RCU_GPIOD, // periph clock, tx gpio clock, rt gpio clock
  144. GPIOC, GPIO_AF_8, GPIO_PIN_12, // tx port, tx alternate, tx pin
  145. GPIOD, GPIO_AF_8, GPIO_PIN_2, // rx port, rx alternate, rx pin
  146. &serial4,
  147. "uart4",
  148. };
  149. void UART4_IRQHandler(void)
  150. {
  151. /* enter interrupt */
  152. rt_interrupt_enter();
  153. uart_isr(&serial4);
  154. /* leave interrupt */
  155. rt_interrupt_leave();
  156. }
  157. #endif /* RT_USING_UART4 */
  158. #if defined(RT_USING_USART5)
  159. struct rt_serial_device serial5;
  160. /* UART5 device driver structure */
  161. const struct gd32_uart usart5 =
  162. {
  163. USART5, // uart peripheral index
  164. USART5_IRQn, // uart iqrn
  165. RCU_USART5, RCU_GPIOC, RCU_GPIOC, // periph clock, tx gpio clock, rt gpio clock
  166. GPIOC, GPIO_AF_8, GPIO_PIN_6, // tx port, tx alternate, tx pin
  167. GPIOC, GPIO_AF_8, GPIO_PIN_7, // rx port, rx alternate, rx pin
  168. &serial5,
  169. "uart5",
  170. };
  171. void USART5_IRQHandler(void)
  172. {
  173. /* enter interrupt */
  174. rt_interrupt_enter();
  175. uart_isr(&serial5);
  176. /* leave interrupt */
  177. rt_interrupt_leave();
  178. }
  179. #endif /* RT_USING_UART5 */
  180. #if defined(RT_USING_UART6)
  181. struct rt_serial_device serial6;
  182. /* UART6 device driver structure */
  183. const struct gd32_uart uart6 =
  184. {
  185. UART6, // uart peripheral index
  186. UART6_IRQn, // uart iqrn
  187. RCU_UART6, RCU_GPIOE, RCU_GPIOE, // periph clock, tx gpio clock, rt gpio clock
  188. GPIOE, GPIO_AF_8, GPIO_PIN_7, // tx port, tx alternate, tx pin
  189. GPIOE, GPIO_AF_8, GPIO_PIN_8, // rx port, rx alternate, rx pin
  190. &serial6,
  191. "uart6",
  192. };
  193. void UART6_IRQHandler(void)
  194. {
  195. /* enter interrupt */
  196. rt_interrupt_enter();
  197. uart_isr(&serial6);
  198. /* leave interrupt */
  199. rt_interrupt_leave();
  200. }
  201. #endif /* RT_USING_UART6 */
  202. #if defined(RT_USING_UART7)
  203. struct rt_serial_device serial7;
  204. /* UART7 device driver structure */
  205. const struct gd32_uart uart7 =
  206. {
  207. UART7, // uart peripheral index
  208. UART7_IRQn, // uart iqrn
  209. RCU_UART7, RCU_GPIOE, RCU_GPIOE, // periph clock, tx gpio clock, rt gpio clock
  210. GPIOE, GPIO_AF_8, GPIO_PIN_0, // tx port, tx alternate, tx pin
  211. GPIOE, GPIO_AF_8, GPIO_PIN_1, // rx port, rx alternate, rx pin
  212. &serial7,
  213. "uart7",
  214. };
  215. void UART7_IRQHandler(void)
  216. {
  217. /* enter interrupt */
  218. rt_interrupt_enter();
  219. uart_isr(&serial7);
  220. /* leave interrupt */
  221. rt_interrupt_leave();
  222. }
  223. #endif /* RT_USING_UART7 */
  224. /**
  225. * @brief UART MSP Initialization
  226. * This function configures the hardware resources used in this example:
  227. * - Peripheral's clock enable
  228. * - Peripheral's GPIO Configuration
  229. * - NVIC configuration for UART interrupt request enable
  230. * @param huart: UART handle pointer
  231. * @retval None
  232. */
  233. void gd32_uart_gpio_init(struct gd32_uart *uart)
  234. {
  235. /* enable USART clock */
  236. rcu_periph_clock_enable(uart->tx_gpio_clk);
  237. rcu_periph_clock_enable(uart->rx_gpio_clk);
  238. rcu_periph_clock_enable(uart->per_clk);
  239. /* connect port to USARTx_Tx */
  240. gpio_af_set(uart->tx_port, uart->tx_af, uart->tx_pin);
  241. /* connect port to USARTx_Rx */
  242. gpio_af_set(uart->rx_port, uart->rx_af, uart->rx_pin);
  243. /* configure USART Tx as alternate function push-pull */
  244. gpio_mode_set(uart->tx_port, GPIO_MODE_AF, GPIO_PUPD_PULLUP, uart->tx_pin);
  245. gpio_output_options_set(uart->tx_port, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, uart->tx_pin);
  246. /* configure USART Rx as alternate function push-pull */
  247. gpio_mode_set(uart->rx_port, GPIO_MODE_AF, GPIO_PUPD_PULLUP, uart->rx_pin);
  248. gpio_output_options_set(uart->rx_port, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, uart->rx_pin);
  249. NVIC_SetPriority(uart->irqn, 0);
  250. NVIC_EnableIRQ(uart->irqn);
  251. }
  252. static rt_err_t gd32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  253. {
  254. struct gd32_uart *uart;
  255. RT_ASSERT(serial != RT_NULL);
  256. RT_ASSERT(cfg != RT_NULL);
  257. uart = (struct gd32_uart *)serial->parent.user_data;
  258. gd32_uart_gpio_init(uart);
  259. usart_baudrate_set(uart->uart_periph, cfg->baud_rate);
  260. switch (cfg->data_bits)
  261. {
  262. case DATA_BITS_9:
  263. usart_word_length_set(uart->uart_periph, USART_WL_9BIT);
  264. break;
  265. default:
  266. usart_word_length_set(uart->uart_periph, USART_WL_8BIT);
  267. break;
  268. }
  269. switch (cfg->stop_bits)
  270. {
  271. case STOP_BITS_2:
  272. usart_stop_bit_set(uart->uart_periph, USART_STB_2BIT);
  273. break;
  274. default:
  275. usart_stop_bit_set(uart->uart_periph, USART_STB_1BIT);
  276. break;
  277. }
  278. switch (cfg->parity)
  279. {
  280. case PARITY_ODD:
  281. usart_parity_config(uart->uart_periph, USART_PM_ODD);
  282. break;
  283. case PARITY_EVEN:
  284. usart_parity_config(uart->uart_periph, USART_PM_EVEN);
  285. break;
  286. default:
  287. usart_parity_config(uart->uart_periph, USART_PM_NONE);
  288. break;
  289. }
  290. usart_receive_config(uart->uart_periph, USART_RECEIVE_ENABLE);
  291. usart_transmit_config(uart->uart_periph, USART_TRANSMIT_ENABLE);
  292. usart_enable(uart->uart_periph);
  293. return RT_EOK;
  294. }
  295. static rt_err_t gd32_control(struct rt_serial_device *serial, int cmd, void *arg)
  296. {
  297. struct gd32_uart *uart;
  298. RT_ASSERT(serial != RT_NULL);
  299. uart = (struct gd32_uart *)serial->parent.user_data;
  300. switch (cmd)
  301. {
  302. case RT_DEVICE_CTRL_CLR_INT:
  303. /* disable rx irq */
  304. NVIC_DisableIRQ(uart->irqn);
  305. /* disable interrupt */
  306. usart_interrupt_disable(uart->uart_periph, USART_INTEN_RBNEIE);
  307. break;
  308. case RT_DEVICE_CTRL_SET_INT:
  309. /* enable rx irq */
  310. NVIC_EnableIRQ(uart->irqn);
  311. /* enable interrupt */
  312. usart_interrupt_enable(uart->uart_periph, USART_INTEN_RBNEIE);
  313. break;
  314. }
  315. return RT_EOK;
  316. }
  317. static int gd32_putc(struct rt_serial_device *serial, char ch)
  318. {
  319. struct gd32_uart *uart;
  320. RT_ASSERT(serial != RT_NULL);
  321. uart = (struct gd32_uart *)serial->parent.user_data;
  322. usart_data_transmit(uart->uart_periph, ch);
  323. while((usart_flag_get(uart->uart_periph, USART_FLAG_TC) == RESET));
  324. return 1;
  325. }
  326. static int gd32_getc(struct rt_serial_device *serial)
  327. {
  328. int ch;
  329. struct gd32_uart *uart;
  330. RT_ASSERT(serial != RT_NULL);
  331. uart = (struct gd32_uart *)serial->parent.user_data;
  332. ch = -1;
  333. if (usart_flag_get(uart->uart_periph, USART_FLAG_RBNE) != RESET)
  334. ch = usart_data_receive(uart->uart_periph);
  335. return ch;
  336. }
  337. /**
  338. * Uart common interrupt process. This need add to uart ISR.
  339. *
  340. * @param serial serial device
  341. */
  342. static void uart_isr(struct rt_serial_device *serial)
  343. {
  344. struct gd32_uart *uart = (struct gd32_uart *) serial->parent.user_data;
  345. RT_ASSERT(uart != RT_NULL);
  346. /* UART in mode Receiver -------------------------------------------------*/
  347. if ((usart_interrupt_flag_get(uart->uart_periph, USART_INT_RBNEIE) != RESET) &&
  348. (usart_flag_get(uart->uart_periph, USART_FLAG_RBNE) != RESET))
  349. {
  350. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  351. /* Clear RXNE interrupt flag */
  352. usart_flag_clear(uart->uart_periph, USART_FLAG_RBNE);
  353. }
  354. }
  355. static const struct rt_uart_ops gd32_uart_ops =
  356. {
  357. gd32_configure,
  358. gd32_control,
  359. gd32_putc,
  360. gd32_getc,
  361. };
  362. int gd32_hw_usart_init(void)
  363. {
  364. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  365. int i;
  366. static const struct gd32_uart * uarts[] = {
  367. #ifdef RT_USING_USART0
  368. &usart0,
  369. #endif
  370. #ifdef RT_USING_USART1
  371. &usart1,
  372. #endif
  373. #ifdef RT_USING_USART2
  374. &usart2,
  375. #endif
  376. #ifdef RT_USING_UART3
  377. &uart3,
  378. #endif
  379. #ifdef RT_USING_UART4
  380. &uart4,
  381. #endif
  382. #ifdef RT_USING_USART5
  383. &usart5,
  384. #endif
  385. #ifdef RT_USING_UART6
  386. &uart6,
  387. #endif
  388. #ifdef RT_USING_UART7
  389. &uart7,
  390. #endif
  391. };
  392. for (i = 0; i < sizeof(uarts) / sizeof(uarts[0]); i++)
  393. {
  394. uarts[i]->serial->ops = &gd32_uart_ops;
  395. uarts[i]->serial->config = config;
  396. /* register UART1 device */
  397. rt_hw_serial_register(uarts[i]->serial,
  398. uarts[i]->device_name,
  399. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  400. (void *)uarts[i]);
  401. }
  402. return 0;
  403. }
  404. INIT_BOARD_EXPORT(gd32_hw_usart_init);
  405. #endif