stm32f1_rtc.c 3.8 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2009-01-05 Bernard the first version.
  9. * 2011-11-26 aozima implementation time.
  10. * 2015-07-16 FlyM rename rtc to stm32f1_rtc. remove finsh export function
  11. */
  12. #include <rtthread.h>
  13. #include <stm32f10x.h>
  14. #include "stm32f1_rtc.h"
  15. static struct rt_device rtc;
  16. static rt_err_t rt_rtc_open(rt_device_t dev, rt_uint16_t oflag)
  17. {
  18. if (dev->rx_indicate != RT_NULL)
  19. {
  20. /* Open Interrupt */
  21. }
  22. return RT_EOK;
  23. }
  24. static rt_size_t rt_rtc_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
  25. {
  26. return 0;
  27. }
  28. static rt_err_t rt_rtc_control(rt_device_t dev, int cmd, void *args)
  29. {
  30. rt_time_t *time;
  31. RT_ASSERT(dev != RT_NULL);
  32. switch (cmd)
  33. {
  34. case RT_DEVICE_CTRL_RTC_GET_TIME:
  35. time = (rt_time_t *)args;
  36. /* read device */
  37. *time = RTC_GetCounter();
  38. break;
  39. case RT_DEVICE_CTRL_RTC_SET_TIME:
  40. {
  41. time = (rt_time_t *)args;
  42. /* Enable PWR and BKP clocks */
  43. RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
  44. /* Allow access to BKP Domain */
  45. PWR_BackupAccessCmd(ENABLE);
  46. /* Wait until last write operation on RTC registers has finished */
  47. RTC_WaitForLastTask();
  48. /* Change the current time */
  49. RTC_SetCounter(*time);
  50. /* Wait until last write operation on RTC registers has finished */
  51. RTC_WaitForLastTask();
  52. BKP_WriteBackupRegister(BKP_DR1, 0xA5A5);
  53. }
  54. break;
  55. }
  56. return RT_EOK;
  57. }
  58. /*******************************************************************************
  59. * Function Name : RTC_Configuration
  60. * Description : Configures the RTC.
  61. * Input : None
  62. * Output : None
  63. * Return : 0 reday,-1 error.
  64. *******************************************************************************/
  65. int RTC_Configuration(void)
  66. {
  67. u32 count=0x200000;
  68. /* Enable PWR and BKP clocks */
  69. RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR | RCC_APB1Periph_BKP, ENABLE);
  70. /* Allow access to BKP Domain */
  71. PWR_BackupAccessCmd(ENABLE);
  72. /* Reset Backup Domain */
  73. BKP_DeInit();
  74. /* Enable LSE */
  75. RCC_LSEConfig(RCC_LSE_ON);
  76. /* Wait till LSE is ready */
  77. while ( (RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET) && (--count) );
  78. if ( count == 0 )
  79. {
  80. return -1;
  81. }
  82. /* Select LSE as RTC Clock Source */
  83. RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
  84. /* Enable RTC Clock */
  85. RCC_RTCCLKCmd(ENABLE);
  86. /* Wait for RTC registers synchronization */
  87. RTC_WaitForSynchro();
  88. /* Wait until last write operation on RTC registers has finished */
  89. RTC_WaitForLastTask();
  90. /* Set RTC prescaler: set RTC period to 1sec */
  91. RTC_SetPrescaler(32767); /* RTC period = RTCCLK/RTC_PR = (32.768 KHz)/(32767+1) */
  92. /* Wait until last write operation on RTC registers has finished */
  93. RTC_WaitForLastTask();
  94. return 0;
  95. }
  96. void rt_hw_rtc_init(void)
  97. {
  98. rtc.type = RT_Device_Class_RTC;
  99. if (BKP_ReadBackupRegister(BKP_DR1) != 0xA5A5)
  100. {
  101. rt_kprintf("rtc is not configured\n");
  102. rt_kprintf("please configure with set_date and set_time\n");
  103. if ( RTC_Configuration() != 0)
  104. {
  105. rt_kprintf("rtc configure fail...\r\n");
  106. return ;
  107. }
  108. }
  109. else
  110. {
  111. /* Wait for RTC registers synchronization */
  112. RTC_WaitForSynchro();
  113. }
  114. /* register rtc device */
  115. rtc.init = RT_NULL;
  116. rtc.open = rt_rtc_open;
  117. rtc.close = RT_NULL;
  118. rtc.read = rt_rtc_read;
  119. rtc.write = RT_NULL;
  120. rtc.control = rt_rtc_control;
  121. /* no private */
  122. rtc.user_data = RT_NULL;
  123. rt_device_register(&rtc, "rtc", RT_DEVICE_FLAG_RDWR);
  124. return;
  125. }