drv_hwtimer.c 14 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-12-10 zylx first version
  9. * 2020-06-16 thread-liu Porting for stm32mp1
  10. * 2020-08-25 linyongkang Fix the timer clock frequency doubling problem
  11. */
  12. #include <board.h>
  13. #ifdef BSP_USING_TIM
  14. #include "drv_config.h"
  15. //#define DRV_DEBUG
  16. #define LOG_TAG "drv.hwtimer"
  17. #include <drv_log.h>
  18. #ifdef RT_USING_HWTIMER
  19. enum
  20. {
  21. #ifdef BSP_USING_TIM1
  22. TIM1_INDEX,
  23. #endif
  24. #ifdef BSP_USING_TIM2
  25. TIM2_INDEX,
  26. #endif
  27. #ifdef BSP_USING_TIM3
  28. TIM3_INDEX,
  29. #endif
  30. #ifdef BSP_USING_TIM4
  31. TIM4_INDEX,
  32. #endif
  33. #ifdef BSP_USING_TIM5
  34. TIM5_INDEX,
  35. #endif
  36. #ifdef BSP_USING_TIM6
  37. TIM6_INDEX,
  38. #endif
  39. #ifdef BSP_USING_TIM7
  40. TIM7_INDEX,
  41. #endif
  42. #ifdef BSP_USING_TIM8
  43. TIM8_INDEX,
  44. #endif
  45. #ifdef BSP_USING_TIM9
  46. TIM9_INDEX,
  47. #endif
  48. #ifdef BSP_USING_TIM10
  49. TIM10_INDEX,
  50. #endif
  51. #ifdef BSP_USING_TIM11
  52. TIM11_INDEX,
  53. #endif
  54. #ifdef BSP_USING_TIM12
  55. TIM12_INDEX,
  56. #endif
  57. #ifdef BSP_USING_TIM13
  58. TIM13_INDEX,
  59. #endif
  60. #ifdef BSP_USING_TIM14
  61. TIM14_INDEX,
  62. #endif
  63. #ifdef BSP_USING_TIM15
  64. TIM15_INDEX,
  65. #endif
  66. #ifdef BSP_USING_TIM16
  67. TIM16_INDEX,
  68. #endif
  69. #ifdef BSP_USING_TIM17
  70. TIM17_INDEX,
  71. #endif
  72. };
  73. struct stm32_hwtimer
  74. {
  75. rt_hwtimer_t time_device;
  76. TIM_HandleTypeDef tim_handle;
  77. IRQn_Type tim_irqn;
  78. char *name;
  79. };
  80. static struct stm32_hwtimer stm32_hwtimer_obj[] =
  81. {
  82. #ifdef BSP_USING_TIM1
  83. TIM1_CONFIG,
  84. #endif
  85. #ifdef BSP_USING_TIM2
  86. TIM2_CONFIG,
  87. #endif
  88. #ifdef BSP_USING_TIM3
  89. TIM3_CONFIG,
  90. #endif
  91. #ifdef BSP_USING_TIM4
  92. TIM4_CONFIG,
  93. #endif
  94. #ifdef BSP_USING_TIM5
  95. TIM5_CONFIG,
  96. #endif
  97. #ifdef BSP_USING_TIM6
  98. TIM6_CONFIG,
  99. #endif
  100. #ifdef BSP_USING_TIM7
  101. TIM7_CONFIG,
  102. #endif
  103. #ifdef BSP_USING_TIM8
  104. TIM8_CONFIG,
  105. #endif
  106. #ifdef BSP_USING_TIM9
  107. TIM9_CONFIG,
  108. #endif
  109. #ifdef BSP_USING_TIM10
  110. TIM10_CONFIG,
  111. #endif
  112. #ifdef BSP_USING_TIM11
  113. TIM11_CONFIG,
  114. #endif
  115. #ifdef BSP_USING_TIM12
  116. TIM12_CONFIG,
  117. #endif
  118. #ifdef BSP_USING_TIM13
  119. TIM13_CONFIG,
  120. #endif
  121. #ifdef BSP_USING_TIM14
  122. TIM14_CONFIG,
  123. #endif
  124. #ifdef BSP_USING_TIM15
  125. TIM15_CONFIG,
  126. #endif
  127. #ifdef BSP_USING_TIM16
  128. TIM16_CONFIG,
  129. #endif
  130. #ifdef BSP_USING_TIM17
  131. TIM17_CONFIG,
  132. #endif
  133. };
  134. /* APBx timer clocks frequency doubler state related to APB1CLKDivider value */
  135. static void pclkx_doubler_get(rt_uint32_t *pclk1_doubler, rt_uint32_t *pclk2_doubler)
  136. {
  137. rt_uint32_t flatency = 0;
  138. RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  139. RT_ASSERT(pclk1_doubler != RT_NULL);
  140. RT_ASSERT(pclk1_doubler != RT_NULL);
  141. HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &flatency);
  142. *pclk1_doubler = 1;
  143. *pclk2_doubler = 1;
  144. #if defined(SOC_SERIES_STM32MP1)
  145. if (RCC_ClkInitStruct.APB1_Div != RCC_APB1_DIV1)
  146. {
  147. *pclk1_doubler = 2;
  148. }
  149. if (RCC_ClkInitStruct.APB2_Div != RCC_APB2_DIV1)
  150. {
  151. *pclk2_doubler = 2;
  152. }
  153. #else
  154. if (RCC_ClkInitStruct.APB1CLKDivider != RCC_HCLK_DIV1)
  155. {
  156. *pclk1_doubler = 2;
  157. }
  158. #if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
  159. if (RCC_ClkInitStruct.APB2CLKDivider != RCC_HCLK_DIV1)
  160. {
  161. *pclk2_doubler = 2;
  162. }
  163. #endif
  164. #endif
  165. }
  166. static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
  167. {
  168. uint32_t prescaler_value = 0;
  169. uint32_t pclk1_doubler, pclk2_doubler;
  170. TIM_HandleTypeDef *tim = RT_NULL;
  171. struct stm32_hwtimer *tim_device = RT_NULL;
  172. RT_ASSERT(timer != RT_NULL);
  173. if (state)
  174. {
  175. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  176. tim_device = (struct stm32_hwtimer *)timer;
  177. pclkx_doubler_get(&pclk1_doubler, &pclk2_doubler);
  178. /* time init */
  179. #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  180. if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
  181. #elif defined(SOC_SERIES_STM32L4)
  182. if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
  183. #elif defined(SOC_SERIES_STM32MP1)
  184. if(tim->Instance == TIM14 || tim->Instance == TIM16 || tim->Instance == TIM17)
  185. #elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
  186. if (0)
  187. #endif
  188. {
  189. #if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
  190. prescaler_value = (uint32_t)(HAL_RCC_GetPCLK2Freq() * pclk2_doubler / 10000) - 1;
  191. #endif
  192. }
  193. else
  194. {
  195. prescaler_value = (uint32_t)(HAL_RCC_GetPCLK1Freq() * pclk1_doubler / 10000) - 1;
  196. }
  197. tim->Init.Period = 10000 - 1;
  198. tim->Init.Prescaler = prescaler_value;
  199. tim->Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  200. if (timer->info->cntmode == HWTIMER_CNTMODE_UP)
  201. {
  202. tim->Init.CounterMode = TIM_COUNTERMODE_UP;
  203. }
  204. else
  205. {
  206. tim->Init.CounterMode = TIM_COUNTERMODE_DOWN;
  207. }
  208. tim->Init.RepetitionCounter = 0;
  209. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1)
  210. tim->Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  211. #endif
  212. if (HAL_TIM_Base_Init(tim) != HAL_OK)
  213. {
  214. LOG_E("%s init failed", tim_device->name);
  215. return;
  216. }
  217. else
  218. {
  219. /* set the TIMx priority */
  220. HAL_NVIC_SetPriority(tim_device->tim_irqn, 3, 0);
  221. /* enable the TIMx global Interrupt */
  222. HAL_NVIC_EnableIRQ(tim_device->tim_irqn);
  223. /* clear update flag */
  224. __HAL_TIM_CLEAR_FLAG(tim, TIM_FLAG_UPDATE);
  225. /* enable update request source */
  226. __HAL_TIM_URS_ENABLE(tim);
  227. LOG_D("%s init success", tim_device->name);
  228. }
  229. }
  230. }
  231. static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
  232. {
  233. rt_err_t result = RT_EOK;
  234. TIM_HandleTypeDef *tim = RT_NULL;
  235. RT_ASSERT(timer != RT_NULL);
  236. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  237. /* set tim cnt */
  238. __HAL_TIM_SET_COUNTER(tim, 0);
  239. /* set tim arr */
  240. __HAL_TIM_SET_AUTORELOAD(tim, t - 1);
  241. if (opmode == HWTIMER_MODE_ONESHOT)
  242. {
  243. /* set timer to single mode */
  244. tim->Instance->CR1 |= TIM_OPMODE_SINGLE;
  245. }
  246. else
  247. {
  248. tim->Instance->CR1 &= (~TIM_OPMODE_SINGLE);
  249. }
  250. /* start timer */
  251. if (HAL_TIM_Base_Start_IT(tim) != HAL_OK)
  252. {
  253. LOG_E("TIM start failed");
  254. result = -RT_ERROR;
  255. }
  256. return result;
  257. }
  258. static void timer_stop(rt_hwtimer_t *timer)
  259. {
  260. TIM_HandleTypeDef *tim = RT_NULL;
  261. RT_ASSERT(timer != RT_NULL);
  262. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  263. /* stop timer */
  264. HAL_TIM_Base_Stop_IT(tim);
  265. /* set tim cnt */
  266. __HAL_TIM_SET_COUNTER(tim, 0);
  267. }
  268. static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
  269. {
  270. TIM_HandleTypeDef *tim = RT_NULL;
  271. rt_err_t result = RT_EOK;
  272. uint32_t pclk1_doubler, pclk2_doubler;
  273. RT_ASSERT(timer != RT_NULL);
  274. RT_ASSERT(arg != RT_NULL);
  275. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  276. switch (cmd)
  277. {
  278. case HWTIMER_CTRL_FREQ_SET:
  279. {
  280. rt_uint32_t freq;
  281. rt_uint16_t val;
  282. /* set timer frequence */
  283. freq = *((rt_uint32_t *)arg);
  284. pclkx_doubler_get(&pclk1_doubler, &pclk2_doubler);
  285. #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  286. if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
  287. #elif defined(SOC_SERIES_STM32L4)
  288. if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
  289. #elif defined(SOC_SERIES_STM32MP1)
  290. if(tim->Instance == TIM14 || tim->Instance == TIM16 || tim->Instance == TIM17)
  291. #elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
  292. if (0)
  293. #endif
  294. {
  295. #if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
  296. val = HAL_RCC_GetPCLK2Freq() * pclk2_doubler / freq;
  297. #endif
  298. }
  299. else
  300. {
  301. val = HAL_RCC_GetPCLK1Freq() * pclk1_doubler / freq;
  302. }
  303. __HAL_TIM_SET_PRESCALER(tim, val - 1);
  304. /* Update frequency value */
  305. tim->Instance->EGR |= TIM_EVENTSOURCE_UPDATE;
  306. }
  307. break;
  308. default:
  309. {
  310. result = -RT_ENOSYS;
  311. }
  312. break;
  313. }
  314. return result;
  315. }
  316. static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer)
  317. {
  318. TIM_HandleTypeDef *tim = RT_NULL;
  319. RT_ASSERT(timer != RT_NULL);
  320. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  321. return tim->Instance->CNT;
  322. }
  323. static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG;
  324. static const struct rt_hwtimer_ops _ops =
  325. {
  326. .init = timer_init,
  327. .start = timer_start,
  328. .stop = timer_stop,
  329. .count_get = timer_counter_get,
  330. .control = timer_ctrl,
  331. };
  332. #ifdef BSP_USING_TIM2
  333. void TIM2_IRQHandler(void)
  334. {
  335. /* enter interrupt */
  336. rt_interrupt_enter();
  337. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM2_INDEX].tim_handle);
  338. /* leave interrupt */
  339. rt_interrupt_leave();
  340. }
  341. #endif
  342. #ifdef BSP_USING_TIM3
  343. void TIM3_IRQHandler(void)
  344. {
  345. /* enter interrupt */
  346. rt_interrupt_enter();
  347. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM3_INDEX].tim_handle);
  348. /* leave interrupt */
  349. rt_interrupt_leave();
  350. }
  351. #endif
  352. #ifdef BSP_USING_TIM4
  353. void TIM4_IRQHandler(void)
  354. {
  355. /* enter interrupt */
  356. rt_interrupt_enter();
  357. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM4_INDEX].tim_handle);
  358. /* leave interrupt */
  359. rt_interrupt_leave();
  360. }
  361. #endif
  362. #ifdef BSP_USING_TIM5
  363. void TIM5_IRQHandler(void)
  364. {
  365. /* enter interrupt */
  366. rt_interrupt_enter();
  367. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM5_INDEX].tim_handle);
  368. /* leave interrupt */
  369. rt_interrupt_leave();
  370. }
  371. #endif
  372. #ifdef BSP_USING_TIM11
  373. void TIM1_TRG_COM_TIM11_IRQHandler(void)
  374. {
  375. /* enter interrupt */
  376. rt_interrupt_enter();
  377. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM11_INDEX].tim_handle);
  378. /* leave interrupt */
  379. rt_interrupt_leave();
  380. }
  381. #endif
  382. #ifdef BSP_USING_TIM13
  383. void TIM8_UP_TIM13_IRQHandler(void)
  384. {
  385. /* enter interrupt */
  386. rt_interrupt_enter();
  387. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM13_INDEX].tim_handle);
  388. /* leave interrupt */
  389. rt_interrupt_leave();
  390. }
  391. #endif
  392. #ifdef BSP_USING_TIM14
  393. #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  394. void TIM8_TRG_COM_TIM14_IRQHandler(void)
  395. #elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32MP1)
  396. void TIM14_IRQHandler(void)
  397. #endif
  398. {
  399. /* enter interrupt */
  400. rt_interrupt_enter();
  401. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM14_INDEX].tim_handle);
  402. /* leave interrupt */
  403. rt_interrupt_leave();
  404. }
  405. #endif
  406. #ifdef BSP_USING_TIM15
  407. void TIM1_BRK_TIM15_IRQHandler(void)
  408. {
  409. /* enter interrupt */
  410. rt_interrupt_enter();
  411. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM15_INDEX].tim_handle);
  412. /* leave interrupt */
  413. rt_interrupt_leave();
  414. }
  415. #endif
  416. #ifdef BSP_USING_TIM16
  417. #if defined(SOC_SERIES_STM32L4)
  418. void TIM1_UP_TIM16_IRQHandler(void)
  419. #elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32MP1)
  420. void TIM16_IRQHandler(void)
  421. #endif
  422. {
  423. /* enter interrupt */
  424. rt_interrupt_enter();
  425. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM16_INDEX].tim_handle);
  426. /* leave interrupt */
  427. rt_interrupt_leave();
  428. }
  429. #endif
  430. #ifdef BSP_USING_TIM17
  431. #if defined(SOC_SERIES_STM32L4)
  432. void TIM1_TRG_COM_TIM17_IRQHandler(void)
  433. #elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32MP1)
  434. void TIM17_IRQHandler(void)
  435. #endif
  436. {
  437. /* enter interrupt */
  438. rt_interrupt_enter();
  439. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM17_INDEX].tim_handle);
  440. /* leave interrupt */
  441. rt_interrupt_leave();
  442. }
  443. #endif
  444. void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
  445. {
  446. #ifdef BSP_USING_TIM2
  447. if (htim->Instance == TIM2)
  448. {
  449. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM2_INDEX].time_device);
  450. }
  451. #endif
  452. #ifdef BSP_USING_TIM3
  453. if (htim->Instance == TIM3)
  454. {
  455. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM3_INDEX].time_device);
  456. }
  457. #endif
  458. #ifdef BSP_USING_TIM4
  459. if (htim->Instance == TIM4)
  460. {
  461. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM4_INDEX].time_device);
  462. }
  463. #endif
  464. #ifdef BSP_USING_TIM5
  465. if (htim->Instance == TIM5)
  466. {
  467. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM5_INDEX].time_device);
  468. }
  469. #endif
  470. #ifdef BSP_USING_TIM11
  471. if (htim->Instance == TIM11)
  472. {
  473. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM11_INDEX].time_device);
  474. }
  475. #endif
  476. #ifdef BSP_USING_TIM13
  477. if (htim->Instance == TIM13)
  478. {
  479. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM13_INDEX].time_device);
  480. }
  481. #endif
  482. #ifdef BSP_USING_TIM14
  483. if (htim->Instance == TIM14)
  484. {
  485. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM14_INDEX].time_device);
  486. }
  487. #endif
  488. #ifdef BSP_USING_TIM15
  489. if (htim->Instance == TIM15)
  490. {
  491. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM15_INDEX].time_device);
  492. }
  493. #endif
  494. #ifdef BSP_USING_TIM16
  495. if (htim->Instance == TIM16)
  496. {
  497. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM16_INDEX].time_device);
  498. }
  499. #endif
  500. #ifdef BSP_USING_TIM17
  501. if (htim->Instance == TIM17)
  502. {
  503. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM17_INDEX].time_device);
  504. }
  505. #endif
  506. }
  507. static int stm32_hwtimer_init(void)
  508. {
  509. int i = 0;
  510. int result = RT_EOK;
  511. for (i = 0; i < sizeof(stm32_hwtimer_obj) / sizeof(stm32_hwtimer_obj[0]); i++)
  512. {
  513. stm32_hwtimer_obj[i].time_device.info = &_info;
  514. stm32_hwtimer_obj[i].time_device.ops = &_ops;
  515. if (rt_device_hwtimer_register(&stm32_hwtimer_obj[i].time_device, stm32_hwtimer_obj[i].name, &stm32_hwtimer_obj[i].tim_handle) == RT_EOK)
  516. {
  517. LOG_D("%s register success", stm32_hwtimer_obj[i].name);
  518. }
  519. else
  520. {
  521. LOG_E("%s register failed", stm32_hwtimer_obj[i].name);
  522. result = -RT_ERROR;
  523. }
  524. }
  525. return result;
  526. }
  527. INIT_BOARD_EXPORT(stm32_hwtimer_init);
  528. #endif /* RT_USING_HWTIMER */
  529. #endif /* BSP_USING_TIM */