drv_usart.c 15 KB

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  1. /*
  2. * Copyright (C) 2021, Huada Semiconductor Co., Ltd.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2021-08-19 pjq first version
  9. */
  10. /*******************************************************************************
  11. * Include files
  12. ******************************************************************************/
  13. #include <rtdevice.h>
  14. #include <rthw.h>
  15. #include "gpio.h"
  16. #include "uart.h"
  17. #include "drv_usart.h"
  18. #ifdef RT_USING_SERIAL
  19. #if !defined(BSP_USING_UART0) && !defined(BSP_USING_UART1)
  20. #error "Please define at least one BSP_USING_UARTx"
  21. /* UART instance can be selected at menuconfig -> Hardware Drivers Config -> On-chip Peripheral Drivers -> Enable UART */
  22. #endif
  23. /*******************************************************************************
  24. * Local type definitions ('typedef')
  25. ******************************************************************************/
  26. /* HC32 config Rx timeout */
  27. struct hc32_uart_rxto
  28. {
  29. rt_uint32_t channel;
  30. rt_size_t timeout_bits;
  31. };
  32. /* HC32 UART index */
  33. struct uart_index
  34. {
  35. rt_uint8_t index;
  36. rt_uint8_t idx;
  37. };
  38. /* HC32 UART irq handler */
  39. struct uart_irq_handler
  40. {
  41. void (*tx_irq_handler)(void);
  42. void (*rxerr_irq_handler)(void);
  43. void (*rx_irq_handler)(void);
  44. void (*cts_irq_handler)(void);
  45. void (*pei_irq_handler)(void);
  46. };
  47. /*******************************************************************************
  48. * Local pre-processor symbols/macros ('#define')
  49. ******************************************************************************/
  50. /*******************************************************************************
  51. * Global variable definitions (declared in header file with 'extern')
  52. ******************************************************************************/
  53. /*******************************************************************************
  54. * Local function prototypes ('static')
  55. ******************************************************************************/
  56. #ifdef RT_SERIAL_USING_DMA
  57. static void hc32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag);
  58. #endif
  59. /*******************************************************************************
  60. * Local variable definitions ('static')
  61. ******************************************************************************/
  62. enum
  63. {
  64. #ifdef BSP_USING_UART0
  65. UART0_INDEX,
  66. #endif
  67. #ifdef BSP_USING_UART1
  68. UART1_INDEX,
  69. #endif
  70. UART_INDEX_MAX,
  71. };
  72. static const struct uart_index uart_map[] =
  73. {
  74. #ifdef BSP_USING_UART0
  75. {UART0_INDEX, UARTCH0},
  76. #endif
  77. #ifdef BSP_USING_UART1
  78. {UART1_INDEX, UARTCH1},
  79. #endif
  80. };
  81. static struct hc32_uart_config uart_config[] =
  82. {
  83. #ifdef BSP_USING_UART0
  84. { \
  85. .name = "uart0", \
  86. .idx = UARTCH0, \
  87. },
  88. #endif
  89. #ifdef BSP_USING_UART1
  90. { \
  91. .name = "uart1", \
  92. .idx = UARTCH1, \
  93. }
  94. #endif
  95. };
  96. #ifdef BSP_USING_UART0
  97. static int uart0_rx_flag;
  98. #endif
  99. #ifdef BSP_USING_UART1
  100. static int uart1_rx_flag;
  101. #endif
  102. static struct hc32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
  103. static const struct uart_irq_handler uart_irq_handlers[sizeof(uart_obj) / sizeof(uart_obj[0])];
  104. /*******************************************************************************
  105. * Function implementation - global ('extern') and local ('static')
  106. ******************************************************************************/
  107. //static uint32_t hc32_get_uart_index(M0P_UART_TypeDef *Instance)
  108. static uint32_t hc32_get_uart_index(uint8_t idx)
  109. {
  110. uint32_t index = UART_INDEX_MAX;
  111. for (uint8_t i = 0U; i < ARRAY_SZ(uart_map); i++)
  112. {
  113. if (uart_map[i].idx == idx)
  114. {
  115. index = uart_map[i].index;
  116. RT_ASSERT(index < UART_INDEX_MAX)
  117. break;
  118. }
  119. }
  120. return index;
  121. }
  122. #if defined(BSP_USING_UART0)
  123. void uart0_gpioinit(void)
  124. {
  125. stc_gpio_config_t stcGpioCfg;
  126. DDL_ZERO_STRUCT(stcGpioCfg);
  127. stcGpioCfg.enDir = GpioDirOut;
  128. Gpio_Init(GpioPortA,GpioPin9,&stcGpioCfg);
  129. Gpio_SetAfMode(GpioPortA,GpioPin9,GpioAf1);//TX
  130. stcGpioCfg.enDir = GpioDirIn;
  131. Gpio_Init(GpioPortA,GpioPin10,&stcGpioCfg);
  132. Gpio_SetAfMode(GpioPortA,GpioPin10,GpioAf1);//RX
  133. }
  134. #endif
  135. #if defined(BSP_USING_UART1)
  136. void uart1_gpioinit(void)
  137. {
  138. stc_gpio_config_t stcGpioCfg;
  139. DDL_ZERO_STRUCT(stcGpioCfg);
  140. stcGpioCfg.enDir = GpioDirOut;
  141. Gpio_Init(GpioPortA,GpioPin2,&stcGpioCfg);
  142. Gpio_SetAfMode(GpioPortA,GpioPin2,GpioAf1);//TX
  143. stcGpioCfg.enDir = GpioDirIn;
  144. Gpio_Init(GpioPortA,GpioPin3,&stcGpioCfg);
  145. Gpio_SetAfMode(GpioPortA,GpioPin3,GpioAf1);//RX
  146. }
  147. #endif
  148. static rt_err_t hc32_configure(struct rt_serial_device *serial,
  149. struct serial_configure *cfg)
  150. {
  151. struct hc32_uart *uart;
  152. uint16_t u16Scnt = 0;
  153. stc_uart_config_t stcConfig;
  154. stc_uart_irq_cb_t stcUartIrqCb;
  155. stc_uart_multimode_t stcMulti;
  156. stc_uart_baud_t stcBaud;
  157. uint8_t index;
  158. en_uart_mmdorck_t enTb8;
  159. DDL_ZERO_STRUCT(stcConfig);
  160. DDL_ZERO_STRUCT(stcUartIrqCb);
  161. DDL_ZERO_STRUCT(stcMulti);
  162. DDL_ZERO_STRUCT(stcBaud);
  163. RT_ASSERT(RT_NULL != cfg);
  164. RT_ASSERT(RT_NULL != serial);
  165. uart = rt_container_of(serial, struct hc32_uart, serial);
  166. #if defined(BSP_USING_UART0)
  167. if (uart->config->idx == UARTCH0)
  168. {
  169. uart0_gpioinit();
  170. }
  171. #endif
  172. #if defined(BSP_USING_UART1)
  173. if (uart->config->idx == UARTCH1)
  174. {
  175. uart1_gpioinit();
  176. }
  177. #endif
  178. /* Configure USART initialization structure */
  179. index = hc32_get_uart_index(uart->config->idx);
  180. stcUartIrqCb.pfnRxIrqCb = uart_irq_handlers[index].rx_irq_handler;
  181. stcUartIrqCb.pfnTxIrqCb = uart_irq_handlers[index].tx_irq_handler;
  182. stcUartIrqCb.pfnRxFEIrqCb = uart_irq_handlers[index].rxerr_irq_handler;
  183. stcUartIrqCb.pfnPEIrqCb = uart_irq_handlers[index].pei_irq_handler;
  184. stcUartIrqCb.pfnCtsIrqCb = uart_irq_handlers[index].cts_irq_handler;
  185. stcConfig.pstcIrqCb = &stcUartIrqCb;
  186. stcConfig.bTouchNvic = TRUE;
  187. stcConfig.enRunMode = UartMode3;
  188. stcMulti.enMulti_mode = UartNormal;
  189. if(BIT_ORDER_LSB == cfg->bit_order)
  190. {
  191. }
  192. else
  193. {
  194. }
  195. switch(cfg->stop_bits)
  196. {
  197. case STOP_BITS_1:
  198. stcConfig.enStopBit = Uart1bit;
  199. break;
  200. case STOP_BITS_2:
  201. stcConfig.enStopBit = Uart2bit;
  202. break;
  203. default:
  204. break;
  205. }
  206. switch(cfg->parity)
  207. {
  208. case PARITY_NONE:
  209. enTb8 = UartDataOrAddr;
  210. break;
  211. case PARITY_EVEN:
  212. enTb8 = UartEven;
  213. break;
  214. case PARITY_ODD:
  215. enTb8 = UartOdd;
  216. break;
  217. default:
  218. enTb8 = UartDataOrAddr;
  219. break;
  220. }
  221. switch(cfg->data_bits)
  222. {
  223. case DATA_BITS_8:
  224. break;
  225. default:
  226. return -RT_ERROR;
  227. }
  228. Uart_SetMMDOrCk(uart->config->idx, enTb8);
  229. stcConfig.pstcMultiMode = &stcMulti;
  230. Uart_Init(uart->config->idx, &stcConfig);
  231. Uart_SetClkDiv(uart->config->idx, Uart8Or16Div);
  232. stcBaud.u32Pclk = Sysctrl_GetPClkFreq();
  233. stcBaud.enRunMode = UartMode3;
  234. stcBaud.u32Baud = cfg->baud_rate;
  235. u16Scnt = Uart_CalScnt(uart->config->idx, &stcBaud);
  236. Uart_SetBaud(uart->config->idx, u16Scnt);
  237. Uart_ClrStatus(uart->config->idx, UartTC);
  238. Uart_ClrStatus(uart->config->idx, UartRC);
  239. Uart_DisableIrq(uart->config->idx, UartTxIrq);
  240. Uart_DisableIrq(uart->config->idx, UartRxIrq);
  241. Uart_EnableFunc(uart->config->idx, UartRx);
  242. return RT_EOK;
  243. }
  244. static rt_err_t hc32_control(struct rt_serial_device *serial, int cmd, void *arg)
  245. {
  246. struct hc32_uart *uart;
  247. RT_ASSERT(serial != RT_NULL);
  248. uart = rt_container_of(serial, struct hc32_uart, serial);
  249. switch (cmd)
  250. {
  251. /* disable interrupt */
  252. case RT_DEVICE_CTRL_CLR_INT:
  253. Uart_DisableIrq(uart->config->idx, UartRxIrq);
  254. break;
  255. /* enable interrupt */
  256. case RT_DEVICE_CTRL_SET_INT:
  257. /* enable rx irq */
  258. Uart_ClrStatus(uart->config->idx, UartRC);
  259. Uart_EnableIrq(uart->config->idx, UartRxIrq);
  260. break;
  261. case RT_DEVICE_CTRL_CLOSE:
  262. break;
  263. }
  264. return RT_EOK;
  265. }
  266. static int hc32_putc(struct rt_serial_device *serial, char c)
  267. {
  268. struct hc32_uart *uart;
  269. RT_ASSERT(RT_NULL != serial);
  270. uart = rt_container_of(serial, struct hc32_uart, serial);
  271. if(serial->parent.open_flag & RT_DEVICE_FLAG_INT_TX)
  272. {
  273. if (Uart_GetStatus(uart->config->idx, UartTC) == FALSE)
  274. {
  275. return -1;
  276. }
  277. }
  278. Uart_SendData(uart->config->idx, c);
  279. return 1;
  280. }
  281. static int hc32_getc(struct rt_serial_device *serial)
  282. {
  283. int ch= -1;
  284. struct hc32_uart *uart;
  285. RT_ASSERT(RT_NULL != serial);
  286. uart = rt_container_of(serial, struct hc32_uart, serial);
  287. #if defined(BSP_USING_UART0)
  288. if (uart->config->idx == UARTCH0)
  289. {
  290. if (serial->parent.open_flag & RT_DEVICE_FLAG_INT_RX)
  291. {
  292. if (uart0_rx_flag)
  293. {
  294. ch = Uart_ReceiveData(uart->config->idx);
  295. uart0_rx_flag = 0;
  296. }
  297. }
  298. else
  299. {
  300. if(Uart_GetStatus(uart->config->idx, UartRC))
  301. {
  302. Uart_ClrStatus(uart->config->idx, UartRC);
  303. ch = Uart_ReceiveData(uart->config->idx);
  304. }
  305. }
  306. }
  307. #endif
  308. #if defined(BSP_USING_UART1)
  309. if (uart->config->idx == UARTCH1)
  310. {
  311. if (serial->parent.open_flag & RT_DEVICE_FLAG_INT_RX)
  312. {
  313. if (uart1_rx_flag)
  314. {
  315. ch = Uart_ReceiveData(uart->config->idx);
  316. uart1_rx_flag = 0;
  317. }
  318. }
  319. else
  320. {
  321. if(Uart_GetStatus(uart->config->idx, UartRC))
  322. {
  323. Uart_ClrStatus(uart->config->idx, UartRC);
  324. ch = Uart_ReceiveData(uart->config->idx);
  325. }
  326. }
  327. }
  328. #endif
  329. return ch;
  330. }
  331. static rt_size_t hc32_dma_transmit(struct rt_serial_device *serial,
  332. rt_uint8_t *buf,
  333. rt_size_t size,
  334. int direction)
  335. {
  336. return 0;
  337. }
  338. static void hc32_uart_rx_irq_handler(struct hc32_uart *uart)
  339. {
  340. RT_ASSERT(RT_NULL != uart);
  341. rt_hw_serial_isr(&uart->serial, RT_SERIAL_EVENT_RX_IND);
  342. }
  343. static void hc32_uart_tx_irq_handler(struct hc32_uart *uart)
  344. {
  345. RT_ASSERT(RT_NULL != uart);
  346. if (uart->serial.parent.open_flag & RT_DEVICE_FLAG_INT_TX)
  347. {
  348. rt_hw_serial_isr(&uart->serial, RT_SERIAL_EVENT_TX_DONE);
  349. }
  350. }
  351. static void hc32_uart_rxerr_irq_handler(struct hc32_uart *uart)
  352. {
  353. RT_ASSERT(RT_NULL != uart);
  354. }
  355. static void hc32_uart_cts_irq_handler(struct hc32_uart *uart)
  356. {
  357. RT_ASSERT(RT_NULL != uart);
  358. }
  359. static void hc32_uart_pei_irq_handler(struct hc32_uart *uart)
  360. {
  361. RT_ASSERT(RT_NULL != uart);
  362. }
  363. #ifdef RT_SERIAL_USING_DMA
  364. static void hc32_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
  365. {
  366. }
  367. #endif
  368. #if defined(BSP_USING_UART0)
  369. static void hc32_uart0_rx_irq_handler(void)
  370. {
  371. /* enter interrupt */
  372. rt_interrupt_enter();
  373. uart0_rx_flag = 1;
  374. hc32_uart_rx_irq_handler(&uart_obj[UART0_INDEX]);
  375. /* leave interrupt */
  376. rt_interrupt_leave();
  377. }
  378. static void hc32_uart0_tx_irq_handler(void)
  379. {
  380. /* enter interrupt */
  381. rt_interrupt_enter();
  382. hc32_uart_tx_irq_handler(&uart_obj[UART0_INDEX]);
  383. /* leave interrupt */
  384. rt_interrupt_leave();
  385. }
  386. static void hc32_uart0_rxerr_irq_handler(void)
  387. {
  388. /* enter interrupt */
  389. rt_interrupt_enter();
  390. hc32_uart_rxerr_irq_handler(&uart_obj[UART0_INDEX]);
  391. /* leave interrupt */
  392. rt_interrupt_leave();
  393. }
  394. static void hc32_uart0_cts_irq_handler(void)
  395. {
  396. /* enter interrupt */
  397. rt_interrupt_enter();
  398. hc32_uart_cts_irq_handler(&uart_obj[UART0_INDEX]);
  399. /* leave interrupt */
  400. rt_interrupt_leave();
  401. }
  402. static void hc32_uart0_pei_irq_handler(void)
  403. {
  404. /* enter interrupt */
  405. rt_interrupt_enter();
  406. hc32_uart_pei_irq_handler(&uart_obj[UART0_INDEX]);
  407. /* leave interrupt */
  408. rt_interrupt_leave();
  409. }
  410. #endif /* BSP_USING_UART0 */
  411. #if defined(BSP_USING_UART1)
  412. static void hc32_uart1_tx_irq_handler(void)
  413. {
  414. /* enter interrupt */
  415. rt_interrupt_enter();
  416. hc32_uart_tx_irq_handler(&uart_obj[UART1_INDEX]);
  417. /* leave interrupt */
  418. rt_interrupt_leave();
  419. }
  420. static void hc32_uart1_rxerr_irq_handler(void)
  421. {
  422. /* enter interrupt */
  423. rt_interrupt_enter();
  424. hc32_uart_rxerr_irq_handler(&uart_obj[UART1_INDEX]);
  425. /* leave interrupt */
  426. rt_interrupt_leave();
  427. }
  428. static void hc32_uart1_rx_irq_handler(void)
  429. {
  430. /* enter interrupt */
  431. rt_interrupt_enter();
  432. uart1_rx_flag = 1;
  433. hc32_uart_rx_irq_handler(&uart_obj[UART1_INDEX]);
  434. /* leave interrupt */
  435. rt_interrupt_leave();
  436. }
  437. static void hc32_uart1_cts_irq_handler(void)
  438. {
  439. /* enter interrupt */
  440. rt_interrupt_enter();
  441. hc32_uart_cts_irq_handler(&uart_obj[UART1_INDEX]);
  442. /* leave interrupt */
  443. rt_interrupt_leave();
  444. }
  445. static void hc32_uart1_pei_irq_handler(void)
  446. {
  447. /* enter interrupt */
  448. rt_interrupt_enter();
  449. hc32_uart_pei_irq_handler(&uart_obj[UART1_INDEX]);
  450. /* leave interrupt */
  451. rt_interrupt_leave();
  452. }
  453. #endif /* BSP_USING_UART1 */
  454. static const struct uart_irq_handler uart_irq_handlers[] =
  455. {
  456. #ifdef BSP_USING_UART0
  457. { hc32_uart0_tx_irq_handler, hc32_uart0_rxerr_irq_handler, hc32_uart0_rx_irq_handler,
  458. hc32_uart0_cts_irq_handler, hc32_uart0_pei_irq_handler
  459. },
  460. #endif
  461. #ifdef BSP_USING_UART1
  462. { hc32_uart1_tx_irq_handler, hc32_uart1_rxerr_irq_handler, hc32_uart1_rx_irq_handler,
  463. hc32_uart1_cts_irq_handler, hc32_uart1_pei_irq_handler
  464. },
  465. #endif
  466. };
  467. static void hc32_uart_get_dma_config(void)
  468. {
  469. }
  470. static const struct rt_uart_ops hc32_uart_ops =
  471. {
  472. .configure = hc32_configure,
  473. .control = hc32_control,
  474. .putc = hc32_putc,
  475. .getc = hc32_getc,
  476. .dma_transmit = hc32_dma_transmit
  477. };
  478. int hc32_hw_uart_init(void)
  479. {
  480. rt_err_t result = RT_EOK;
  481. rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct hc32_uart);
  482. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  483. hc32_uart_get_dma_config();
  484. Sysctrl_SetPeripheralGate(SysctrlPeripheralGpio,TRUE);
  485. #ifdef BSP_USING_UART0
  486. Sysctrl_SetPeripheralGate(SysctrlPeripheralUart0,TRUE);
  487. #endif
  488. #ifdef BSP_USING_UART1
  489. Sysctrl_SetPeripheralGate(SysctrlPeripheralUart1,TRUE);
  490. #endif
  491. for (int i = 0; i < obj_num; i++)
  492. {
  493. /* init UART object */
  494. uart_obj[i].serial.ops = &hc32_uart_ops;
  495. uart_obj[i].serial.config = config;
  496. uart_obj[i].config = &uart_config[i];
  497. /* register UART device */
  498. result = rt_hw_serial_register(&uart_obj[i].serial,
  499. uart_obj[i].config->name,
  500. (RT_DEVICE_FLAG_RDWR |
  501. RT_DEVICE_FLAG_INT_RX |
  502. RT_DEVICE_FLAG_INT_TX |
  503. uart_obj[i].uart_dma_flag),
  504. &uart_obj[i]);
  505. RT_ASSERT(result == RT_EOK);
  506. }
  507. return result;
  508. }
  509. INIT_BOARD_EXPORT(hc32_hw_uart_init);
  510. #endif /* RT_USING_SERIAL */
  511. /*******************************************************************************
  512. * EOF (not truncated)
  513. ******************************************************************************/