lcd_n35.c 7.3 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2010-01-01 bernard first version from QiuYi's driver
  9. */
  10. #include <rtthread.h>
  11. #include <s3c24x0.h>
  12. /* LCD driver for N3'5 */
  13. #define LCD_WIDTH 240
  14. #define LCD_HEIGHT 320
  15. #define LCD_PIXCLOCK 4
  16. #define LCD_RIGHT_MARGIN 36
  17. #define LCD_LEFT_MARGIN 19
  18. #define LCD_HSYNC_LEN 5
  19. #define LCD_UPPER_MARGIN 1
  20. #define LCD_LOWER_MARGIN 5
  21. #define LCD_VSYNC_LEN 1
  22. #define LCD_XSIZE LCD_WIDTH
  23. #define LCD_YSIZE LCD_HEIGHT
  24. #define SCR_XSIZE LCD_WIDTH
  25. #define SCR_YSIZE LCD_HEIGHT
  26. #define RT_HW_LCD_WIDTH LCD_WIDTH
  27. #define RT_HW_LCD_HEIGHT LCD_HEIGHT
  28. #define MVAL (13)
  29. #define MVAL_USED (0) //0=each frame 1=rate by MVAL
  30. #define INVVDEN (1) //0=normal 1=inverted
  31. #define BSWP (0) //Byte swap control
  32. #define HWSWP (1) //Half word swap control
  33. #define GPB1_TO_OUT() (GPBUP &= 0xfffd, GPBCON &= 0xfffffff3, GPBCON |= 0x00000004)
  34. #define GPB1_TO_1() (GPBDAT |= 0x0002)
  35. #define GPB1_TO_0() (GPBDAT &= 0xfffd)
  36. #define S3C2410_LCDCON1_CLKVAL(x) ((x) << 8)
  37. #define S3C2410_LCDCON1_MMODE (1<<7)
  38. #define S3C2410_LCDCON1_DSCAN4 (0<<5)
  39. #define S3C2410_LCDCON1_STN4 (1<<5)
  40. #define S3C2410_LCDCON1_STN8 (2<<5)
  41. #define S3C2410_LCDCON1_TFT (3<<5)
  42. #define S3C2410_LCDCON1_STN1BPP (0<<1)
  43. #define S3C2410_LCDCON1_STN2GREY (1<<1)
  44. #define S3C2410_LCDCON1_STN4GREY (2<<1)
  45. #define S3C2410_LCDCON1_STN8BPP (3<<1)
  46. #define S3C2410_LCDCON1_STN12BPP (4<<1)
  47. #define S3C2410_LCDCON1_TFT1BPP (8<<1)
  48. #define S3C2410_LCDCON1_TFT2BPP (9<<1)
  49. #define S3C2410_LCDCON1_TFT4BPP (10<<1)
  50. #define S3C2410_LCDCON1_TFT8BPP (11<<1)
  51. #define S3C2410_LCDCON1_TFT16BPP (12<<1)
  52. #define S3C2410_LCDCON1_TFT24BPP (13<<1)
  53. #define S3C2410_LCDCON1_ENVID (1)
  54. #define S3C2410_LCDCON1_MODEMASK 0x1E
  55. #define S3C2410_LCDCON2_VBPD(x) ((x) << 24)
  56. #define S3C2410_LCDCON2_LINEVAL(x) ((x) << 14)
  57. #define S3C2410_LCDCON2_VFPD(x) ((x) << 6)
  58. #define S3C2410_LCDCON2_VSPW(x) ((x) << 0)
  59. #define S3C2410_LCDCON2_GET_VBPD(x) ( ((x) >> 24) & 0xFF)
  60. #define S3C2410_LCDCON2_GET_VFPD(x) ( ((x) >> 6) & 0xFF)
  61. #define S3C2410_LCDCON2_GET_VSPW(x) ( ((x) >> 0) & 0x3F)
  62. #define S3C2410_LCDCON3_HBPD(x) ((x) << 19)
  63. #define S3C2410_LCDCON3_WDLY(x) ((x) << 19)
  64. #define S3C2410_LCDCON3_HOZVAL(x) ((x) << 8)
  65. #define S3C2410_LCDCON3_HFPD(x) ((x) << 0)
  66. #define S3C2410_LCDCON3_LINEBLANK(x)((x) << 0)
  67. #define S3C2410_LCDCON3_GET_HBPD(x) ( ((x) >> 19) & 0x7F)
  68. #define S3C2410_LCDCON3_GET_HFPD(x) ( ((x) >> 0) & 0xFF)
  69. #define S3C2410_LCDCON4_MVAL(x) ((x) << 8)
  70. #define S3C2410_LCDCON4_HSPW(x) ((x) << 0)
  71. #define S3C2410_LCDCON4_WLH(x) ((x) << 0)
  72. #define S3C2410_LCDCON4_GET_HSPW(x) ( ((x) >> 0) & 0xFF)
  73. #define S3C2410_LCDCON5_BPP24BL (1<<12)
  74. #define S3C2410_LCDCON5_FRM565 (1<<11)
  75. #define S3C2410_LCDCON5_INVVCLK (1<<10)
  76. #define S3C2410_LCDCON5_INVVLINE (1<<9)
  77. #define S3C2410_LCDCON5_INVVFRAME (1<<8)
  78. #define S3C2410_LCDCON5_INVVD (1<<7)
  79. #define S3C2410_LCDCON5_INVVDEN (1<<6)
  80. #define S3C2410_LCDCON5_INVPWREN (1<<5)
  81. #define S3C2410_LCDCON5_INVLEND (1<<4)
  82. #define S3C2410_LCDCON5_PWREN (1<<3)
  83. #define S3C2410_LCDCON5_ENLEND (1<<2)
  84. #define S3C2410_LCDCON5_BSWP (1<<1)
  85. #define S3C2410_LCDCON5_HWSWP (1<<0)
  86. #define S3C2410_LCDINT_FRSYNC (1<<1)
  87. static volatile rt_uint16_t _rt_framebuffer[RT_HW_LCD_HEIGHT][RT_HW_LCD_WIDTH];
  88. //static volatile rt_uint16_t _rt_hw_framebuffer[RT_HW_LCD_HEIGHT][RT_HW_LCD_WIDTH];
  89. static struct rt_device_graphic_info _lcd_info;
  90. static void lcd_power_enable(int invpwren, int pwren)
  91. {
  92. //GPG4 is setted as LCD_PWREN
  93. GPGUP = GPGUP | (1<<4); // Pull-up disable
  94. GPGCON = GPGCON | (3<<8); //GPG4=LCD_PWREN
  95. //Enable LCD POWER ENABLE Function
  96. LCDCON5 = LCDCON5&(~(1<<3))|(pwren<<3); // PWREN
  97. LCDCON5 = LCDCON5&(~(1<<5))|(invpwren<<5); // INVPWREN
  98. }
  99. static void lcd_envid_on_off(int onoff)
  100. {
  101. if(onoff==1)
  102. /*ENVID=ON*/
  103. LCDCON1|=1;
  104. else
  105. /*ENVID Off*/
  106. LCDCON1 =LCDCON1 & 0x3fffe;
  107. }
  108. //********************** BOARD LCD backlight ****************************
  109. static void LcdBkLtSet(rt_uint32_t HiRatio)
  110. {
  111. #define FREQ_PWM1 1000
  112. if(!HiRatio)
  113. {
  114. GPBCON = GPBCON & (~(3<<2)) | (1<<2) ;
  115. GPBDAT &= ~(1<<1);
  116. return;
  117. }
  118. GPBCON = GPBCON & (~(3<<2)) | (2<<2) ;
  119. if( HiRatio > 100 ) HiRatio = 100 ;
  120. TCON = TCON & (~(0xf<<8)) ; // clear manual update bit, stop Timer1
  121. TCFG0 &= 0xffffff00; // set Timer 0&1 prescaler 0
  122. TCFG0 |= 15; //prescaler = 15+1
  123. TCFG1 &= 0xffffff0f; // set Timer 1 MUX 1/16
  124. TCFG1 |= 0x00000030; // set Timer 1 MUX 1/16
  125. TCNTB1 = ( 100000000>>8 )/FREQ_PWM1; //if set inverter off, when TCNT2<=TCMP2, TOUT is high, TCNT2>TCMP2, TOUT is low
  126. TCMPB1 = ( TCNTB1*(100-HiRatio))/100 ; //if set inverter on, when TCNT2<=TCMP2, TOUT is low, TCNT2>TCMP2, TOUT is high
  127. TCON = TCON & (~(0xf<<8)) | (0x0e<<8) ;
  128. TCON = TCON & (~(0xf<<8)) | (0x0d<<8) ;
  129. }
  130. /* RT-Thread Device Interface */
  131. static rt_err_t rt_lcd_init (rt_device_t dev)
  132. {
  133. GPB1_TO_OUT();
  134. GPB1_TO_1();
  135. GPCUP = 0x00000000;
  136. GPCCON = 0xaaaa02a9;
  137. GPDUP = 0x00000000;
  138. GPDCON = 0xaaaaaaaa;
  139. #define M5D(n) ((n)&0x1fffff)
  140. #define LCD_ADDR ((rt_uint32_t)_rt_framebuffer)
  141. LCDCON1 = (LCD_PIXCLOCK << 8) | (3 << 5) | (12 << 1);
  142. LCDCON2 = (LCD_UPPER_MARGIN << 24) | ((LCD_HEIGHT - 1) << 14) | (LCD_LOWER_MARGIN << 6) | (LCD_VSYNC_LEN << 0);
  143. LCDCON3 = (LCD_RIGHT_MARGIN << 19) | ((LCD_WIDTH - 1) << 8) | (LCD_LEFT_MARGIN << 0);
  144. LCDCON4 = (13 << 8) | (LCD_HSYNC_LEN << 0);
  145. #if !defined(LCD_CON5)
  146. #define LCD_CON5 ((1<<11) | (1 << 9) | (1 << 8) | (1 << 3) | (1 << 0))
  147. #endif
  148. LCDCON5 = LCD_CON5;
  149. LCDSADDR1 = ((LCD_ADDR >> 22) << 21) | ((M5D(LCD_ADDR >> 1)) << 0);
  150. LCDSADDR2 = M5D((LCD_ADDR + LCD_WIDTH * LCD_HEIGHT * 2) >> 1);
  151. LCDSADDR3 = LCD_WIDTH;
  152. LCDINTMSK |= (3);
  153. LPCSEL &= (~7) ;
  154. TPAL=0;
  155. LcdBkLtSet(70) ;
  156. lcd_power_enable(0, 1);
  157. lcd_envid_on_off(1);
  158. return RT_EOK;
  159. }
  160. static rt_err_t rt_lcd_control (rt_device_t dev, int cmd, void *args)
  161. {
  162. switch (cmd)
  163. {
  164. case RTGRAPHIC_CTRL_RECT_UPDATE:
  165. break;
  166. case RTGRAPHIC_CTRL_POWERON:
  167. break;
  168. case RTGRAPHIC_CTRL_POWEROFF:
  169. break;
  170. case RTGRAPHIC_CTRL_GET_INFO:
  171. rt_memcpy(args, &_lcd_info, sizeof(_lcd_info));
  172. break;
  173. case RTGRAPHIC_CTRL_SET_MODE:
  174. break;
  175. }
  176. return RT_EOK;
  177. }
  178. int rt_hw_lcd_init(void)
  179. {
  180. rt_device_t lcd = rt_malloc(sizeof(struct rt_device));
  181. if (lcd == RT_NULL)
  182. return -RT_ERROR; /* no memory yet */
  183. _lcd_info.bits_per_pixel = 16;
  184. _lcd_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565P;
  185. _lcd_info.framebuffer = (void*)_rt_framebuffer;
  186. _lcd_info.width = LCD_WIDTH;
  187. _lcd_info.height = LCD_HEIGHT;
  188. /* init device structure */
  189. lcd->type = RT_Device_Class_Unknown;
  190. lcd->init = rt_lcd_init;
  191. lcd->open = RT_NULL;
  192. lcd->close = RT_NULL;
  193. lcd->control = rt_lcd_control;
  194. lcd->user_data = (void*)&_lcd_info;
  195. /* register lcd device to RT-Thread */
  196. rt_device_register(lcd, "lcd", RT_DEVICE_FLAG_RDWR);
  197. }
  198. INIT_BOARD_EXPORT(rt_hw_lcd_init);