stm32f7xx_hal_spdifrx.c 40 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f7xx_hal_spdifrx.c
  4. * @author MCD Application Team
  5. * @version V1.0.1
  6. * @date 25-June-2015
  7. * @brief This file provides firmware functions to manage the following
  8. * functionalities of the SPDIFRX audio interface:
  9. * + Initialization and Configuration
  10. * + Data transfers functions
  11. * + DMA transfers management
  12. * + Interrupts and flags management
  13. @verbatim
  14. ===============================================================================
  15. ##### How to use this driver #####
  16. ===============================================================================
  17. [..]
  18. The SPDIFRX HAL driver can be used as follow:
  19. (#) Declare SPDIFRX_HandleTypeDef handle structure.
  20. (#) Initialize the SPDIFRX low level resources by implement the HAL_SPDIFRX_MspInit() API:
  21. (##) Enable the SPDIFRX interface clock.
  22. (##) SPDIFRX pins configuration:
  23. (+++) Enable the clock for the SPDIFRX GPIOs.
  24. (+++) Configure these SPDIFRX pins as alternate function pull-up.
  25. (##) NVIC configuration if you need to use interrupt process (HAL_SPDIFRX_ReceiveControlFlow_IT() and HAL_SPDIFRX_ReceiveDataFlow_IT() API's).
  26. (+++) Configure the SPDIFRX interrupt priority.
  27. (+++) Enable the NVIC SPDIFRX IRQ handle.
  28. (##) DMA Configuration if you need to use DMA process (HAL_SPDIFRX_ReceiveDataFlow_DMA() and HAL_SPDIFRX_ReceiveControlFlow_DMA() API's).
  29. (+++) Declare a DMA handle structure for the reception of the Data Flow channel.
  30. (+++) Declare a DMA handle structure for the reception of the Control Flow channel.
  31. (+++) Enable the DMAx interface clock.
  32. (+++) Configure the declared DMA handle structure CtrlRx/DataRx with the required parameters.
  33. (+++) Configure the DMA Channel.
  34. (+++) Associate the initialized DMA handle to the SPDIFRX DMA CtrlRx/DataRx handle.
  35. (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
  36. DMA CtrlRx/DataRx channel.
  37. (#) Program the input selection, re-tries number, wait for activity, channel status selection, data format, stereo mode and masking of user bits
  38. using HAL_SPDIFRX_Init() function.
  39. -@- The specific SPDIFRX interrupts (RXNE/CSRNE and Error Interrupts) will be managed using the macros
  40. __SPDIFRX_ENABLE_IT() and __SPDIFRX_DISABLE_IT() inside the receive process.
  41. -@- Make sure that ck_spdif clock is configured.
  42. (#) Three operation modes are available within this driver :
  43. *** Polling mode for reception operation (for debug purpose) ***
  44. ================================================================
  45. [..]
  46. (+) Receive data flow in blocking mode using HAL_SPDIFRX_ReceiveDataFlow()
  47. (+) Receive control flow of data in blocking mode using HAL_SPDIFRX_ReceiveControlFlow()
  48. *** Interrupt mode for reception operation ***
  49. =========================================
  50. [..]
  51. (+) Receive an amount of data (Data Flow) in non blocking mode using HAL_SPDIFRX_ReceiveDataFlow_IT()
  52. (+) Receive an amount of data (Control Flow) in non blocking mode using HAL_SPDIFRX_ReceiveControlFlow_IT()
  53. (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
  54. add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
  55. (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
  56. add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
  57. (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
  58. add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
  59. *** DMA mode for reception operation ***
  60. ========================================
  61. [..]
  62. (+) Receive an amount of data (Data Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveDataFlow_DMA()
  63. (+) Receive an amount of data (Control Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveControlFlow_DMA()
  64. (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
  65. add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
  66. (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
  67. add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
  68. (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
  69. add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
  70. (+) Stop the DMA Transfer using HAL_SPDIFRX_DMAStop()
  71. *** SPDIFRX HAL driver macros list ***
  72. =============================================
  73. [..]
  74. Below the list of most used macros in USART HAL driver.
  75. (+) __HAL_SPDIFRX_IDLE: Disable the specified SPDIFRX peripheral (IDEL State)
  76. (+) __HAL_SPDIFRX_SYNC: Enable the synchronization state of the specified SPDIFRX peripheral (SYNC State)
  77. (+) __HAL_SPDIFRX_RCV: Enable the receive state of the specified SPDIFRX peripheral (RCV State)
  78. (+) __HAL_SPDIFRX_ENABLE_IT : Enable the specified SPDIFRX interrupts
  79. (+) __HAL_SPDIFRX_DISABLE_IT : Disable the specified SPDIFRX interrupts
  80. (+) __HAL_SPDIFRX_GET_FLAG: Check whether the specified SPDIFRX flag is set or not.
  81. [..]
  82. (@) You can refer to the SPDIFRX HAL driver header file for more useful macros
  83. @endverbatim
  84. ******************************************************************************
  85. * @attention
  86. *
  87. * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
  88. *
  89. * Redistribution and use in source and binary forms, with or without modification,
  90. * are permitted provided that the following conditions are met:
  91. * 1. Redistributions of source code must retain the above copyright notice,
  92. * this list of conditions and the following disclaimer.
  93. * 2. Redistributions in binary form must reproduce the above copyright notice,
  94. * this list of conditions and the following disclaimer in the documentation
  95. * and/or other materials provided with the distribution.
  96. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  97. * may be used to endorse or promote products derived from this software
  98. * without specific prior written permission.
  99. *
  100. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  101. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  102. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  103. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  104. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  105. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  106. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  107. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  108. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  109. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  110. *
  111. ******************************************************************************
  112. */
  113. /* Includes ------------------------------------------------------------------*/
  114. #include "stm32f7xx_hal.h"
  115. /** @addtogroup STM32F7xx_HAL_Driver
  116. * @{
  117. */
  118. /** @defgroup SPDIFRX SPDIFRX
  119. * @brief SPDIFRX HAL module driver
  120. * @{
  121. */
  122. #ifdef HAL_SPDIFRX_MODULE_ENABLED
  123. /* Private typedef -----------------------------------------------------------*/
  124. /* Private define ------------------------------------------------------------*/
  125. #define SPDIFRX_TIMEOUT_VALUE 0xFFFF
  126. /* Private macro -------------------------------------------------------------*/
  127. /* Private variables ---------------------------------------------------------*/
  128. /* Private function prototypes -----------------------------------------------*/
  129. /** @addtogroup SPDIFRX_Private_Functions
  130. * @{
  131. */
  132. static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma);
  133. static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
  134. static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma);
  135. static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma);
  136. static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma);
  137. static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
  138. static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
  139. static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
  140. /**
  141. * @}
  142. */
  143. /* Exported functions ---------------------------------------------------------*/
  144. /** @defgroup SPDIFRX_Exported_Functions SPDIFRX Exported Functions
  145. * @{
  146. */
  147. /** @defgroup SPDIFRX_Exported_Functions_Group1 Initialization and de-initialization functions
  148. * @brief Initialization and Configuration functions
  149. *
  150. @verbatim
  151. ===============================================================================
  152. ##### Initialization and de-initialization functions #####
  153. ===============================================================================
  154. [..] This subsection provides a set of functions allowing to initialize and
  155. de-initialize the SPDIFRX peripheral:
  156. (+) User must Implement HAL_SPDIFRX_MspInit() function in which he configures
  157. all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
  158. (+) Call the function HAL_SPDIFRX_Init() to configure the SPDIFRX peripheral with
  159. the selected configuration:
  160. (++) Input Selection (IN0, IN1,...)
  161. (++) Maximum allowed re-tries during synchronization phase
  162. (++) Wait for activity on SPDIF selected input
  163. (++) Channel status selection (from channel A or B)
  164. (++) Data format (LSB, MSB, ...)
  165. (++) Stereo mode
  166. (++) User bits masking (PT,C,U,V,...)
  167. (+) Call the function HAL_SPDIFRX_DeInit() to restore the default configuration
  168. of the selected SPDIFRXx peripheral.
  169. @endverbatim
  170. * @{
  171. */
  172. /**
  173. * @brief Initializes the SPDIFRX according to the specified parameters
  174. * in the SPDIFRX_InitTypeDef and create the associated handle.
  175. * @param hspdif: SPDIFRX handle
  176. * @retval HAL status
  177. */
  178. HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif)
  179. {
  180. uint32_t tmpreg = 0;
  181. /* Check the SPDIFRX handle allocation */
  182. if(hspdif == NULL)
  183. {
  184. return HAL_ERROR;
  185. }
  186. /* Check the SPDIFRX parameters */
  187. assert_param(IS_STEREO_MODE(hspdif->Init.StereoMode));
  188. assert_param(IS_SPDIFRX_INPUT_SELECT(hspdif->Init.InputSelection));
  189. assert_param(IS_SPDIFRX_MAX_RETRIES(hspdif->Init.Retries));
  190. assert_param(IS_SPDIFRX_WAIT_FOR_ACTIVITY(hspdif->Init.WaitForActivity));
  191. assert_param(IS_SPDIFRX_CHANNEL(hspdif->Init.ChannelSelection));
  192. assert_param(IS_SPDIFRX_DATA_FORMAT(hspdif->Init.DataFormat));
  193. assert_param(IS_PREAMBLE_TYPE_MASK(hspdif->Init.PreambleTypeMask));
  194. assert_param(IS_CHANNEL_STATUS_MASK(hspdif->Init.ChannelStatusMask));
  195. assert_param(IS_VALIDITY_MASK(hspdif->Init.ValidityBitMask));
  196. assert_param(IS_PARITY_ERROR_MASK(hspdif->Init.ParityErrorMask));
  197. if(hspdif->State == HAL_SPDIFRX_STATE_RESET)
  198. {
  199. /* Allocate lock resource and initialize it */
  200. hspdif->Lock = HAL_UNLOCKED;
  201. /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
  202. HAL_SPDIFRX_MspInit(hspdif);
  203. }
  204. /* SPDIFRX peripheral state is BUSY*/
  205. hspdif->State = HAL_SPDIFRX_STATE_BUSY;
  206. /* Disable SPDIFRX interface (IDLE State) */
  207. __HAL_SPDIFRX_IDLE(hspdif);
  208. /* Reset the old SPDIFRX CR configuration */
  209. tmpreg = hspdif->Instance->CR;
  210. tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
  211. SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK |
  212. SPDIFRX_CR_CHSEL | SPDIFRX_CR_NBTR | SPDIFRX_CR_WFA |
  213. SPDIFRX_CR_INSEL);
  214. /* Sets the new configuration of the SPDIFRX peripheral */
  215. tmpreg |= ((uint16_t) hspdif->Init.StereoMode |
  216. hspdif->Init.InputSelection |
  217. hspdif->Init.Retries |
  218. hspdif->Init.WaitForActivity |
  219. hspdif->Init.ChannelSelection |
  220. hspdif->Init.DataFormat |
  221. hspdif->Init.PreambleTypeMask |
  222. hspdif->Init.ChannelStatusMask |
  223. hspdif->Init.ValidityBitMask |
  224. hspdif->Init.ParityErrorMask);
  225. hspdif->Instance->CR = tmpreg;
  226. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  227. /* SPDIFRX peripheral state is READY*/
  228. hspdif->State = HAL_SPDIFRX_STATE_READY;
  229. return HAL_OK;
  230. }
  231. /**
  232. * @brief DeInitializes the SPDIFRX peripheral
  233. * @param hspdif: SPDIFRX handle
  234. * @retval HAL status
  235. */
  236. HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif)
  237. {
  238. /* Check the SPDIFRX handle allocation */
  239. if(hspdif == NULL)
  240. {
  241. return HAL_ERROR;
  242. }
  243. /* Check the parameters */
  244. assert_param(IS_SPDIFRX_ALL_INSTANCE(hspdif->Instance));
  245. hspdif->State = HAL_SPDIFRX_STATE_BUSY;
  246. /* Disable SPDIFRX interface (IDLE state) */
  247. __HAL_SPDIFRX_IDLE(hspdif);
  248. /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
  249. HAL_SPDIFRX_MspDeInit(hspdif);
  250. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  251. /* SPDIFRX peripheral state is RESET*/
  252. hspdif->State = HAL_SPDIFRX_STATE_RESET;
  253. /* Release Lock */
  254. __HAL_UNLOCK(hspdif);
  255. return HAL_OK;
  256. }
  257. /**
  258. * @brief SPDIFRX MSP Init
  259. * @param hspdif: SPDIFRX handle
  260. * @retval None
  261. */
  262. __weak void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif)
  263. {
  264. /* NOTE : This function Should not be modified, when the callback is needed,
  265. the HAL_SPDIFRX_MspInit could be implemented in the user file
  266. */
  267. }
  268. /**
  269. * @brief SPDIFRX MSP DeInit
  270. * @param hspdif: SPDIFRX handle
  271. * @retval None
  272. */
  273. __weak void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif)
  274. {
  275. /* NOTE : This function Should not be modified, when the callback is needed,
  276. the HAL_SPDIFRX_MspDeInit could be implemented in the user file
  277. */
  278. }
  279. /**
  280. * @brief Sets the SPDIFRX dtat format according to the specified parameters
  281. * in the SPDIFRX_InitTypeDef.
  282. * @param hspdif: SPDIFRX handle
  283. * @param sDataFormat: SPDIFRX data format
  284. * @retval HAL status
  285. */
  286. HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat)
  287. {
  288. uint32_t tmpreg = 0;
  289. /* Check the SPDIFRX handle allocation */
  290. if(hspdif == NULL)
  291. {
  292. return HAL_ERROR;
  293. }
  294. /* Check the SPDIFRX parameters */
  295. assert_param(IS_STEREO_MODE(sDataFormat.StereoMode));
  296. assert_param(IS_SPDIFRX_DATA_FORMAT(sDataFormat.DataFormat));
  297. assert_param(IS_PREAMBLE_TYPE_MASK(sDataFormat.PreambleTypeMask));
  298. assert_param(IS_CHANNEL_STATUS_MASK(sDataFormat.ChannelStatusMask));
  299. assert_param(IS_VALIDITY_MASK(sDataFormat.ValidityBitMask));
  300. assert_param(IS_PARITY_ERROR_MASK(sDataFormat.ParityErrorMask));
  301. /* Reset the old SPDIFRX CR configuration */
  302. tmpreg = hspdif->Instance->CR;
  303. if(((tmpreg & SPDIFRX_STATE_RCV) == SPDIFRX_STATE_RCV) &&
  304. (((tmpreg & SPDIFRX_CR_DRFMT) != sDataFormat.DataFormat) ||
  305. ((tmpreg & SPDIFRX_CR_RXSTEO) != sDataFormat.StereoMode)))
  306. {
  307. return HAL_ERROR;
  308. }
  309. tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
  310. SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK);
  311. /* Sets the new configuration of the SPDIFRX peripheral */
  312. tmpreg |= ((uint16_t) sDataFormat.StereoMode |
  313. sDataFormat.DataFormat |
  314. sDataFormat.PreambleTypeMask |
  315. sDataFormat.ChannelStatusMask |
  316. sDataFormat.ValidityBitMask |
  317. sDataFormat.ParityErrorMask);
  318. hspdif->Instance->CR = tmpreg;
  319. return HAL_OK;
  320. }
  321. /**
  322. * @}
  323. */
  324. /** @defgroup SPDIFRX_Exported_Functions_Group2 IO operation functions
  325. * @brief Data transfers functions
  326. *
  327. @verbatim
  328. ===============================================================================
  329. ##### IO operation functions #####
  330. ===============================================================================
  331. [..]
  332. This subsection provides a set of functions allowing to manage the SPDIFRX data
  333. transfers.
  334. (#) There is two mode of transfer:
  335. (++) Blocking mode : The communication is performed in the polling mode.
  336. The status of all data processing is returned by the same function
  337. after finishing transfer.
  338. (++) No-Blocking mode : The communication is performed using Interrupts
  339. or DMA. These functions return the status of the transfer start-up.
  340. The end of the data processing will be indicated through the
  341. dedicated SPDIFRX IRQ when using Interrupt mode or the DMA IRQ when
  342. using DMA mode.
  343. (#) Blocking mode functions are :
  344. (++) HAL_SPDIFRX_ReceiveDataFlow()
  345. (++) HAL_SPDIFRX_ReceiveControlFlow()
  346. (+@) Do not use blocking mode to receive both control and data flow at the same time.
  347. (#) No-Blocking mode functions with Interrupt are :
  348. (++) HAL_SPDIFRX_ReceiveControlFlow_IT()
  349. (++) HAL_SPDIFRX_ReceiveDataFlow_IT()
  350. (#) No-Blocking mode functions with DMA are :
  351. (++) HAL_SPDIFRX_ReceiveControlFlow_DMA()
  352. (++) HAL_SPDIFRX_ReceiveDataFlow_DMA()
  353. (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
  354. (++) HAL_SPDIFRX_RxCpltCallback()
  355. (++) HAL_SPDIFRX_ErrorCallback()
  356. @endverbatim
  357. * @{
  358. */
  359. /**
  360. * @brief Receives an amount of data (Data Flow) in blocking mode.
  361. * @param hspdif: pointer to SPDIFRX_HandleTypeDef structure that contains
  362. * the configuration information for SPDIFRX module.
  363. * @param pData: Pointer to data buffer
  364. * @param Size: Amount of data to be received
  365. * @param Timeout: Timeout duration
  366. * @retval HAL status
  367. */
  368. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
  369. {
  370. if((pData == NULL ) || (Size == 0))
  371. {
  372. return HAL_ERROR;
  373. }
  374. if(hspdif->State == HAL_SPDIFRX_STATE_READY)
  375. {
  376. /* Process Locked */
  377. __HAL_LOCK(hspdif);
  378. hspdif->State = HAL_SPDIFRX_STATE_BUSY;
  379. /* Start synchronisation */
  380. __HAL_SPDIFRX_SYNC(hspdif);
  381. /* Wait until SYNCD flag is set */
  382. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout) != HAL_OK)
  383. {
  384. return HAL_TIMEOUT;
  385. }
  386. /* Start reception */
  387. __HAL_SPDIFRX_RCV(hspdif);
  388. /* Receive data flow */
  389. while(Size > 0)
  390. {
  391. /* Wait until RXNE flag is set */
  392. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  393. {
  394. return HAL_TIMEOUT;
  395. }
  396. (*pData++) = hspdif->Instance->DR;
  397. Size--;
  398. }
  399. /* SPDIFRX ready */
  400. hspdif->State = HAL_SPDIFRX_STATE_READY;
  401. /* Process Unlocked */
  402. __HAL_UNLOCK(hspdif);
  403. return HAL_OK;
  404. }
  405. else
  406. {
  407. return HAL_BUSY;
  408. }
  409. }
  410. /**
  411. * @brief Receives an amount of data (Control Flow) in blocking mode.
  412. * @param hspdif: pointer to a SPDIFRX_HandleTypeDef structure that contains
  413. * the configuration information for SPDIFRX module.
  414. * @param pData: Pointer to data buffer
  415. * @param Size: Amount of data to be received
  416. * @param Timeout: Timeout duration
  417. * @retval HAL status
  418. */
  419. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
  420. {
  421. if((pData == NULL ) || (Size == 0))
  422. {
  423. return HAL_ERROR;
  424. }
  425. if(hspdif->State == HAL_SPDIFRX_STATE_READY)
  426. {
  427. /* Process Locked */
  428. __HAL_LOCK(hspdif);
  429. hspdif->State = HAL_SPDIFRX_STATE_BUSY;
  430. /* Start synchronization */
  431. __HAL_SPDIFRX_SYNC(hspdif);
  432. /* Wait until SYNCD flag is set */
  433. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout) != HAL_OK)
  434. {
  435. return HAL_TIMEOUT;
  436. }
  437. /* Start reception */
  438. __HAL_SPDIFRX_RCV(hspdif);
  439. /* Receive control flow */
  440. while(Size > 0)
  441. {
  442. /* Wait until CSRNE flag is set */
  443. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_CSRNE, RESET, Timeout) != HAL_OK)
  444. {
  445. return HAL_TIMEOUT;
  446. }
  447. (*pData++) = hspdif->Instance->CSR;
  448. Size--;
  449. }
  450. /* SPDIFRX ready */
  451. hspdif->State = HAL_SPDIFRX_STATE_READY;
  452. /* Process Unlocked */
  453. __HAL_UNLOCK(hspdif);
  454. return HAL_OK;
  455. }
  456. else
  457. {
  458. return HAL_BUSY;
  459. }
  460. }
  461. /**
  462. * @brief Receive an amount of data (Data Flow) in non-blocking mode with Interrupt
  463. * @param hspdif: SPDIFRX handle
  464. * @param pData: a 32-bit pointer to the Receive data buffer.
  465. * @param Size: number of data sample to be received .
  466. * @retval HAL status
  467. */
  468. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
  469. {
  470. if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
  471. {
  472. if((pData == NULL) || (Size == 0))
  473. {
  474. return HAL_ERROR;
  475. }
  476. /* Process Locked */
  477. __HAL_LOCK(hspdif);
  478. hspdif->pRxBuffPtr = pData;
  479. hspdif->RxXferSize = Size;
  480. hspdif->RxXferCount = Size;
  481. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  482. /* Check if a receive process is ongoing or not */
  483. hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
  484. /* Enable the SPDIFRX PE Error Interrupt */
  485. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  486. /* Enable the SPDIFRX OVR Error Interrupt */
  487. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  488. /* Process Unlocked */
  489. __HAL_UNLOCK(hspdif);
  490. /* Enable the SPDIFRX RXNE interrupt */
  491. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  492. if (((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC) || ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00))
  493. {
  494. /* Start synchronization */
  495. __HAL_SPDIFRX_SYNC(hspdif);
  496. /* Wait until SYNCD flag is set */
  497. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE) != HAL_OK)
  498. {
  499. return HAL_TIMEOUT;
  500. }
  501. /* Start reception */
  502. __HAL_SPDIFRX_RCV(hspdif);
  503. }
  504. return HAL_OK;
  505. }
  506. else
  507. {
  508. return HAL_BUSY;
  509. }
  510. }
  511. /**
  512. * @brief Receive an amount of data (Control Flow) with Interrupt
  513. * @param hspdif: SPDIFRX handle
  514. * @param pData: a 32-bit pointer to the Receive data buffer.
  515. * @param Size: number of data sample (Control Flow) to be received :
  516. * @retval HAL status
  517. */
  518. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
  519. {
  520. if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
  521. {
  522. if((pData == NULL ) || (Size == 0))
  523. {
  524. return HAL_ERROR;
  525. }
  526. /* Process Locked */
  527. __HAL_LOCK(hspdif);
  528. hspdif->pCsBuffPtr = pData;
  529. hspdif->CsXferSize = Size;
  530. hspdif->CsXferCount = Size;
  531. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  532. /* Check if a receive process is ongoing or not */
  533. hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
  534. /* Enable the SPDIFRX PE Error Interrupt */
  535. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  536. /* Enable the SPDIFRX OVR Error Interrupt */
  537. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  538. /* Process Unlocked */
  539. __HAL_UNLOCK(hspdif);
  540. /* Enable the SPDIFRX CSRNE interrupt */
  541. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  542. if (((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC) || ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00))
  543. {
  544. /* Start synchronization */
  545. __HAL_SPDIFRX_SYNC(hspdif);
  546. /* Wait until SYNCD flag is set */
  547. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE) != HAL_OK)
  548. {
  549. return HAL_TIMEOUT;
  550. }
  551. /* Start reception */
  552. __HAL_SPDIFRX_RCV(hspdif);
  553. }
  554. return HAL_OK;
  555. }
  556. else
  557. {
  558. return HAL_BUSY;
  559. }
  560. }
  561. /**
  562. * @brief Receive an amount of data (Data Flow) mode with DMA
  563. * @param hspdif: SPDIFRX handle
  564. * @param pData: a 32-bit pointer to the Receive data buffer.
  565. * @param Size: number of data sample to be received :
  566. * @retval HAL status
  567. */
  568. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
  569. {
  570. if((pData == NULL) || (Size == 0))
  571. {
  572. return HAL_ERROR;
  573. }
  574. if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
  575. {
  576. hspdif->pRxBuffPtr = pData;
  577. hspdif->RxXferSize = Size;
  578. hspdif->RxXferCount = Size;
  579. /* Process Locked */
  580. __HAL_LOCK(hspdif);
  581. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  582. hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
  583. /* Set the SPDIFRX Rx DMA Half transfer complete callback */
  584. hspdif->hdmaDrRx->XferHalfCpltCallback = SPDIFRX_DMARxHalfCplt;
  585. /* Set the SPDIFRX Rx DMA transfer complete callback */
  586. hspdif->hdmaDrRx->XferCpltCallback = SPDIFRX_DMARxCplt;
  587. /* Set the DMA error callback */
  588. hspdif->hdmaDrRx->XferErrorCallback = SPDIFRX_DMAError;
  589. /* Enable the DMA request */
  590. HAL_DMA_Start_IT(hspdif->hdmaDrRx, (uint32_t)&hspdif->Instance->DR, (uint32_t)hspdif->pRxBuffPtr, Size);
  591. /* Enable RXDMAEN bit in SPDIFRX CR register for data flow reception*/
  592. hspdif->Instance->CR |= SPDIFRX_CR_RXDMAEN;
  593. if (((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC) || ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00))
  594. {
  595. /* Start synchronization */
  596. __HAL_SPDIFRX_SYNC(hspdif);
  597. /* Wait until SYNCD flag is set */
  598. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE) != HAL_OK)
  599. {
  600. return HAL_TIMEOUT;
  601. }
  602. /* Start reception */
  603. __HAL_SPDIFRX_RCV(hspdif);
  604. }
  605. /* Process Unlocked */
  606. __HAL_UNLOCK(hspdif);
  607. return HAL_OK;
  608. }
  609. else
  610. {
  611. return HAL_BUSY;
  612. }
  613. }
  614. /**
  615. * @brief Receive an amount of data (Control Flow) with DMA
  616. * @param hspdif: SPDIFRX handle
  617. * @param pData: a 32-bit pointer to the Receive data buffer.
  618. * @param Size: number of data (Control Flow) sample to be received :
  619. * @retval HAL status
  620. */
  621. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
  622. {
  623. if((pData == NULL) || (Size == 0))
  624. {
  625. return HAL_ERROR;
  626. }
  627. if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
  628. {
  629. hspdif->pCsBuffPtr = pData;
  630. hspdif->CsXferSize = Size;
  631. hspdif->CsXferCount = Size;
  632. /* Process Locked */
  633. __HAL_LOCK(hspdif);
  634. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  635. hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
  636. /* Set the SPDIFRX Rx DMA Half transfer complete callback */
  637. hspdif->hdmaCsRx->XferHalfCpltCallback = SPDIFRX_DMACxHalfCplt;
  638. /* Set the SPDIFRX Rx DMA transfer complete callback */
  639. hspdif->hdmaCsRx->XferCpltCallback = SPDIFRX_DMACxCplt;
  640. /* Set the DMA error callback */
  641. hspdif->hdmaCsRx->XferErrorCallback = SPDIFRX_DMAError;
  642. /* Enable the DMA request */
  643. HAL_DMA_Start_IT(hspdif->hdmaCsRx, (uint32_t)&hspdif->Instance->CSR, (uint32_t)hspdif->pCsBuffPtr, Size);
  644. /* Enable CBDMAEN bit in SPDIFRX CR register for control flow reception*/
  645. hspdif->Instance->CR |= SPDIFRX_CR_CBDMAEN;
  646. if (((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC) || ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00))
  647. {
  648. /* Start synchronization */
  649. __HAL_SPDIFRX_SYNC(hspdif);
  650. /* Wait until SYNCD flag is set */
  651. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE) != HAL_OK)
  652. {
  653. return HAL_TIMEOUT;
  654. }
  655. /* Start reception */
  656. __HAL_SPDIFRX_RCV(hspdif);
  657. }
  658. /* Process Unlocked */
  659. __HAL_UNLOCK(hspdif);
  660. return HAL_OK;
  661. }
  662. else
  663. {
  664. return HAL_BUSY;
  665. }
  666. }
  667. /**
  668. * @brief stop the audio stream receive from the Media.
  669. * @param hspdif: SPDIFRX handle
  670. * @retval None
  671. */
  672. HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif)
  673. {
  674. /* Process Locked */
  675. __HAL_LOCK(hspdif);
  676. /* Disable the SPDIFRX DMA requests */
  677. hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
  678. hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
  679. /* Disable the SPDIFRX DMA channel */
  680. __HAL_DMA_DISABLE(hspdif->hdmaDrRx);
  681. __HAL_DMA_DISABLE(hspdif->hdmaCsRx);
  682. /* Disable SPDIFRX peripheral */
  683. __HAL_SPDIFRX_IDLE(hspdif);
  684. hspdif->State = HAL_SPDIFRX_STATE_READY;
  685. /* Process Unlocked */
  686. __HAL_UNLOCK(hspdif);
  687. return HAL_OK;
  688. }
  689. /**
  690. * @brief This function handles SPDIFRX interrupt request.
  691. * @param hspdif: SPDIFRX handle
  692. * @retval HAL status
  693. */
  694. void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif)
  695. {
  696. /* SPDIFRX in mode Data Flow Reception ------------------------------------------------*/
  697. if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_RXNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_RXNE) != RESET))
  698. {
  699. __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_RXNE);
  700. SPDIFRX_ReceiveDataFlow_IT(hspdif);
  701. }
  702. /* SPDIFRX in mode Control Flow Reception ------------------------------------------------*/
  703. if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_CSRNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_CSRNE) != RESET))
  704. {
  705. __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_CSRNE);
  706. SPDIFRX_ReceiveControlFlow_IT(hspdif);
  707. }
  708. /* SPDIFRX Overrun error interrupt occurred ---------------------------------*/
  709. if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_OVR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_OVRIE) != RESET))
  710. {
  711. __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_OVR);
  712. /* Change the SPDIFRX error code */
  713. hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_OVR;
  714. /* the transfer is not stopped */
  715. HAL_SPDIFRX_ErrorCallback(hspdif);
  716. }
  717. /* SPDIFRX Parity error interrupt occurred ---------------------------------*/
  718. if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_PERR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_PERRIE) != RESET))
  719. {
  720. __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_PERR);
  721. /* Change the SPDIFRX error code */
  722. hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_PE;
  723. /* the transfer is not stopped */
  724. HAL_SPDIFRX_ErrorCallback(hspdif);
  725. }
  726. }
  727. /**
  728. * @brief Rx Transfer (Data flow) half completed callbacks
  729. * @param hspdif: SPDIFRX handle
  730. * @retval None
  731. */
  732. __weak void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
  733. {
  734. /* NOTE : This function Should not be modified, when the callback is needed,
  735. the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
  736. */
  737. }
  738. /**
  739. * @brief Rx Transfer (Data flow) completed callbacks
  740. * @param hspdif: SPDIFRX handle
  741. * @retval None
  742. */
  743. __weak void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
  744. {
  745. /* NOTE : This function Should not be modified, when the callback is needed,
  746. the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
  747. */
  748. }
  749. /**
  750. * @brief Rx (Control flow) Transfer half completed callbacks
  751. * @param hspdif: SPDIFRX handle
  752. * @retval None
  753. */
  754. __weak void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
  755. {
  756. /* NOTE : This function Should not be modified, when the callback is needed,
  757. the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
  758. */
  759. }
  760. /**
  761. * @brief Rx Transfer (Control flow) completed callbacks
  762. * @param hspdif: SPDIFRX handle
  763. * @retval None
  764. */
  765. __weak void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
  766. {
  767. /* NOTE : This function Should not be modified, when the callback is needed,
  768. the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
  769. */
  770. }
  771. /**
  772. * @brief SPDIFRX error callbacks
  773. * @param hspdif: SPDIFRX handle
  774. * @retval None
  775. */
  776. __weak void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif)
  777. {
  778. /* NOTE : This function Should not be modified, when the callback is needed,
  779. the HAL_SPDIFRX_ErrorCallback could be implemented in the user file
  780. */
  781. }
  782. /**
  783. * @}
  784. */
  785. /** @defgroup SPDIFRX_Exported_Functions_Group3 Peripheral State and Errors functions
  786. * @brief Peripheral State functions
  787. *
  788. @verbatim
  789. ===============================================================================
  790. ##### Peripheral State and Errors functions #####
  791. ===============================================================================
  792. [..]
  793. This subsection permit to get in run-time the status of the peripheral
  794. and the data flow.
  795. @endverbatim
  796. * @{
  797. */
  798. /**
  799. * @brief Return the SPDIFRX state
  800. * @param hspdif : SPDIFRX handle
  801. * @retval HAL state
  802. */
  803. HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef *hspdif)
  804. {
  805. return hspdif->State;
  806. }
  807. /**
  808. * @brief Return the SPDIFRX error code
  809. * @param hspdif : SPDIFRX handle
  810. * @retval SPDIFRX Error Code
  811. */
  812. uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef *hspdif)
  813. {
  814. return hspdif->ErrorCode;
  815. }
  816. /**
  817. * @}
  818. */
  819. /**
  820. * @brief DMA SPDIFRX receive process (Data flow) complete callback
  821. * @param hdma : DMA handle
  822. * @retval None
  823. */
  824. static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma)
  825. {
  826. SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  827. /* Disable Rx DMA Request */
  828. hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
  829. hspdif->RxXferCount = 0;
  830. hspdif->State = HAL_SPDIFRX_STATE_READY;
  831. HAL_SPDIFRX_RxCpltCallback(hspdif);
  832. }
  833. /**
  834. * @brief DMA SPDIFRX receive process (Data flow) half complete callback
  835. * @param hdma : DMA handle
  836. * @retval None
  837. */
  838. static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
  839. {
  840. SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  841. HAL_SPDIFRX_RxHalfCpltCallback(hspdif);
  842. }
  843. /**
  844. * @brief DMA SPDIFRX receive process (Control flow) complete callback
  845. * @param hdma : DMA handle
  846. * @retval None
  847. */
  848. static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma)
  849. {
  850. SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  851. /* Disable Cb DMA Request */
  852. hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
  853. hspdif->CsXferCount = 0;
  854. hspdif->State = HAL_SPDIFRX_STATE_READY;
  855. HAL_SPDIFRX_CxCpltCallback(hspdif);
  856. }
  857. /**
  858. * @brief DMA SPDIFRX receive process (Control flow) half complete callback
  859. * @param hdma : DMA handle
  860. * @retval None
  861. */
  862. static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma)
  863. {
  864. SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  865. HAL_SPDIFRX_CxHalfCpltCallback(hspdif);
  866. }
  867. /**
  868. * @brief DMA SPDIFRX communication error callback
  869. * @param hdma : DMA handle
  870. * @retval None
  871. */
  872. static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma)
  873. {
  874. SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  875. /* Disable Rx and Cb DMA Request */
  876. hspdif->Instance->CR &= (uint16_t)(~(SPDIFRX_CR_RXDMAEN | SPDIFRX_CR_CBDMAEN));
  877. hspdif->RxXferCount = 0;
  878. hspdif->State= HAL_SPDIFRX_STATE_READY;
  879. /* Set the error code and execute error callback*/
  880. hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_DMA;
  881. HAL_SPDIFRX_ErrorCallback(hspdif);
  882. }
  883. /**
  884. * @brief Receive an amount of data (Data Flow) with Interrupt
  885. * @param hspdif: SPDIFRX handle
  886. * @retval None
  887. */
  888. static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
  889. {
  890. /* Receive data */
  891. (*hspdif->pRxBuffPtr++) = hspdif->Instance->DR;
  892. hspdif->RxXferCount--;
  893. if(hspdif->RxXferCount == 0)
  894. {
  895. /* Disable RXNE/PE and OVR interrupts */
  896. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE | SPDIFRX_IT_PERRIE | SPDIFRX_IT_RXNE);
  897. hspdif->State = HAL_SPDIFRX_STATE_READY;
  898. /* Process Unlocked */
  899. __HAL_UNLOCK(hspdif);
  900. HAL_SPDIFRX_RxCpltCallback(hspdif);
  901. }
  902. }
  903. /**
  904. * @brief Receive an amount of data (Control Flow) with Interrupt
  905. * @param hspdif: SPDIFRX handle
  906. * @retval None
  907. */
  908. static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
  909. {
  910. /* Receive data */
  911. (*hspdif->pCsBuffPtr++) = hspdif->Instance->CSR;
  912. hspdif->CsXferCount--;
  913. if(hspdif->CsXferCount == 0)
  914. {
  915. /* Disable CSRNE interrupt */
  916. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  917. hspdif->State = HAL_SPDIFRX_STATE_READY;
  918. /* Process Unlocked */
  919. __HAL_UNLOCK(hspdif);
  920. HAL_SPDIFRX_CxCpltCallback(hspdif);
  921. }
  922. }
  923. /**
  924. * @brief This function handles SPDIFRX Communication Timeout.
  925. * @param hspdif: SPDIFRX handle
  926. * @param Flag: Flag checked
  927. * @param Status: Value of the flag expected
  928. * @param Timeout: Duration of the timeout
  929. * @retval HAL status
  930. */
  931. static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
  932. {
  933. uint32_t tickstart = 0;
  934. /* Get tick */
  935. tickstart = HAL_GetTick();
  936. /* Wait until flag is set */
  937. if(Status == RESET)
  938. {
  939. while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) == RESET)
  940. {
  941. /* Check for the Timeout */
  942. if(Timeout != HAL_MAX_DELAY)
  943. {
  944. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  945. {
  946. /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
  947. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  948. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  949. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  950. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  951. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
  952. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
  953. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
  954. hspdif->State= HAL_SPDIFRX_STATE_READY;
  955. /* Process Unlocked */
  956. __HAL_UNLOCK(hspdif);
  957. return HAL_TIMEOUT;
  958. }
  959. }
  960. }
  961. }
  962. else
  963. {
  964. while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) != RESET)
  965. {
  966. /* Check for the Timeout */
  967. if(Timeout != HAL_MAX_DELAY)
  968. {
  969. if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
  970. {
  971. /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
  972. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  973. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  974. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  975. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  976. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
  977. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
  978. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
  979. hspdif->State= HAL_SPDIFRX_STATE_READY;
  980. /* Process Unlocked */
  981. __HAL_UNLOCK(hspdif);
  982. return HAL_TIMEOUT;
  983. }
  984. }
  985. }
  986. }
  987. return HAL_OK;
  988. }
  989. /**
  990. * @}
  991. */
  992. #endif /* HAL_SPDIFRX_MODULE_ENABLED */
  993. /**
  994. * @}
  995. */
  996. /**
  997. * @}
  998. */
  999. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/