board.c 2.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105
  1. /*
  2. * File : board.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006-2012, RT-Thread Develop Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2010-06-25 Bernard first version
  13. * 2011-08-08 lgnq modified for Loongson LS1B
  14. */
  15. #include <rtthread.h>
  16. #include <rthw.h>
  17. #include "board.h"
  18. #include "uart.h"
  19. #include "ls1b.h"
  20. /**
  21. * @addtogroup Loongson LS1B
  22. */
  23. /*@{*/
  24. /**
  25. * This is the timer interrupt service routine.
  26. */
  27. void rt_hw_timer_handler(void)
  28. {
  29. unsigned int count;
  30. count = read_c0_compare();
  31. write_c0_compare(count);
  32. write_c0_count(0);
  33. /* increase a OS tick */
  34. rt_tick_increase();
  35. }
  36. /**
  37. * This function will initial OS timer
  38. */
  39. void rt_hw_timer_init(void)
  40. {
  41. write_c0_compare(CPU_HZ/2/RT_TICK_PER_SECOND);
  42. write_c0_count(0);
  43. }
  44. /**
  45. * This function will initial sam7s64 board.
  46. */
  47. void rt_hw_board_init(void)
  48. {
  49. #ifdef RT_USING_UART
  50. /* init hardware UART device */
  51. rt_hw_uart_init();
  52. #endif
  53. #ifdef RT_USING_CONSOLE
  54. /* set console device */
  55. rt_console_set_device("uart0");
  56. #endif
  57. /* init operating system timer */
  58. rt_hw_timer_init();
  59. rt_kprintf("current sr: 0x%08x\n", read_c0_status());
  60. }
  61. /* UART line status register value */
  62. #define UARTLSR_ERROR (1 << 7)
  63. #define UARTLSR_TE (1 << 6)
  64. #define UARTLSR_TFE (1 << 5)
  65. #define UARTLSR_BI (1 << 4)
  66. #define UARTLSR_FE (1 << 3)
  67. #define UARTLSR_PE (1 << 2)
  68. #define UARTLSR_OE (1 << 1)
  69. #define UARTLSR_DR (1 << 0)
  70. void rt_hw_console_output(const char *ptr)
  71. {
  72. /* stream mode */
  73. while (*ptr)
  74. {
  75. if (*ptr == '\n')
  76. {
  77. /* FIFO status, contain valid data */
  78. while (!(UART_LSR(UART0_BASE) & (UARTLSR_TE | UARTLSR_TFE)));
  79. /* write data */
  80. UART_DAT(UART0_BASE) = '\r';
  81. }
  82. /* FIFO status, contain valid data */
  83. while (!(UART_LSR(UART0_BASE) & (UARTLSR_TE | UARTLSR_TFE)));
  84. /* write data */
  85. UART_DAT(UART0_BASE) = *ptr;
  86. ptr ++;
  87. }
  88. }
  89. /*@}*/