board.c 7.4 KB

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  1. /*
  2. * File : board.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006 - 2009 RT-Thread Develop Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2006-08-23 Bernard first implementation
  13. */
  14. #include <rthw.h>
  15. #include <rtthread.h>
  16. #include "stm32f10x.h"
  17. #include "board.h"
  18. static void rt_hw_console_init(void);
  19. /**
  20. * @addtogroup STM32
  21. */
  22. /*@{*/
  23. /*******************************************************************************
  24. * Function Name : RCC_Configuration
  25. * Description : Configures the different system clocks.
  26. * Input : None
  27. * Output : None
  28. * Return : None
  29. *******************************************************************************/
  30. void RCC_Configuration(void)
  31. {
  32. ErrorStatus HSEStartUpStatus;
  33. /* RCC system reset(for debug purpose) */
  34. RCC_DeInit();
  35. /* Enable HSE */
  36. RCC_HSEConfig(RCC_HSE_ON);
  37. /* Wait till HSE is ready */
  38. HSEStartUpStatus = RCC_WaitForHSEStartUp();
  39. if (HSEStartUpStatus == SUCCESS)
  40. {
  41. /* HCLK = SYSCLK */
  42. RCC_HCLKConfig(RCC_SYSCLK_Div1);
  43. /* PCLK2 = HCLK */
  44. RCC_PCLK2Config(RCC_HCLK_Div1);
  45. /* PCLK1 = HCLK/2 */
  46. RCC_PCLK1Config(RCC_HCLK_Div2);
  47. /* Flash 2 wait state */
  48. FLASH_SetLatency(FLASH_Latency_2);
  49. /* Enable Prefetch Buffer */
  50. FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
  51. /* PLLCLK = 8MHz * 9 = 72 MHz */
  52. RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
  53. /* Enable PLL */
  54. RCC_PLLCmd(ENABLE);
  55. /* Wait till PLL is ready */
  56. while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) ;
  57. /* Select PLL as system clock source */
  58. RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
  59. /* Wait till PLL is used as system clock source */
  60. while (RCC_GetSYSCLKSource() != 0x08) ;
  61. }
  62. }
  63. /*******************************************************************************
  64. * Function Name : NVIC_Configuration
  65. * Description : Configures Vector Table base location.
  66. * Input : None
  67. * Output : None
  68. * Return : None
  69. *******************************************************************************/
  70. void NVIC_Configuration(void)
  71. {
  72. #ifdef VECT_TAB_RAM
  73. /* Set the Vector Table base location at 0x20000000 */
  74. NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0);
  75. #else /* VECT_TAB_FLASH */
  76. /* Set the Vector Table base location at 0x08000000 */
  77. NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0);
  78. #endif
  79. }
  80. /*******************************************************************************
  81. * Function Name : SysTick_Configuration
  82. * Description : Configures the SysTick for OS tick.
  83. * Input : None
  84. * Output : None
  85. * Return : None
  86. *******************************************************************************/
  87. void SysTick_Configuration(void)
  88. {
  89. RCC_ClocksTypeDef rcc_clocks;
  90. rt_uint32_t cnts;
  91. RCC_GetClocksFreq(&rcc_clocks);
  92. cnts = (rt_uint32_t)rcc_clocks.HCLK_Frequency / RT_TICK_PER_SECOND;
  93. SysTick_Config(cnts);
  94. SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK);
  95. }
  96. extern void rt_hw_interrupt_thread_switch(void);
  97. /**
  98. * This is the timer interrupt service routine.
  99. *
  100. */
  101. void rt_hw_timer_handler(void)
  102. {
  103. /* enter interrupt */
  104. rt_interrupt_enter();
  105. rt_tick_increase();
  106. /* leave interrupt */
  107. rt_interrupt_leave();
  108. }
  109. /* NAND Flash */
  110. #include "fsmc_nand.h"
  111. /**
  112. * This function will initial STM32 Radio board.
  113. */
  114. extern void FSMC_SRAM_Init(void);
  115. void rt_hw_board_init()
  116. {
  117. NAND_IDTypeDef NAND_ID;
  118. /* Configure the system clocks */
  119. RCC_Configuration();
  120. /* NVIC Configuration */
  121. NVIC_Configuration();
  122. /* Configure the SysTick */
  123. SysTick_Configuration();
  124. /* Console Initialization*/
  125. rt_hw_console_init();
  126. /* FSMC Initialization */
  127. FSMC_NAND_Init();
  128. /* NAND read ID command */
  129. FSMC_NAND_ReadID(&NAND_ID);
  130. rt_kprintf("Read the NAND ID:%02X%02X%02X%02X\n",NAND_ID.Maker_ID,NAND_ID.Device_ID,NAND_ID.Third_ID,NAND_ID.Fourth_ID);
  131. /* SRAM init */
  132. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
  133. FSMC_SRAM_Init();
  134. {
  135. /* PC6 for SDCard Rst */
  136. GPIO_InitTypeDef GPIO_InitStructure;
  137. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
  138. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
  139. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  140. GPIO_Init(GPIOC,&GPIO_InitStructure);
  141. GPIO_SetBits(GPIOC,GPIO_Pin_6);
  142. }
  143. }
  144. /* init console to support rt_kprintf */
  145. static void rt_hw_console_init()
  146. {
  147. /* Enable USART1 and GPIOA clocks */
  148. RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1
  149. | RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOC
  150. | RCC_APB2Periph_GPIOF, ENABLE);
  151. /* GPIO configuration */
  152. {
  153. GPIO_InitTypeDef GPIO_InitStructure;
  154. /* Configure USART1 Tx (PA.09) as alternate function push-pull */
  155. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
  156. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  157. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  158. GPIO_Init(GPIOA, &GPIO_InitStructure);
  159. /* Configure USART1 Rx (PA.10) as input floating */
  160. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
  161. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  162. GPIO_Init(GPIOA, &GPIO_InitStructure);
  163. }
  164. /* USART configuration */
  165. {
  166. USART_InitTypeDef USART_InitStructure;
  167. /* USART1 configured as follow:
  168. - BaudRate = 115200 baud
  169. - Word Length = 8 Bits
  170. - One Stop Bit
  171. - No parity
  172. - Hardware flow control disabled (RTS and CTS signals)
  173. - Receive and transmit enabled
  174. - USART Clock disabled
  175. - USART CPOL: Clock is active low
  176. - USART CPHA: Data is captured on the middle
  177. - USART LastBit: The clock pulse of the last data bit is not output to
  178. the SCLK pin
  179. */
  180. USART_InitStructure.USART_BaudRate = 115200;
  181. USART_InitStructure.USART_WordLength = USART_WordLength_8b;
  182. USART_InitStructure.USART_StopBits = USART_StopBits_1;
  183. USART_InitStructure.USART_Parity = USART_Parity_No;
  184. USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
  185. USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
  186. USART_Init(USART1, &USART_InitStructure);
  187. /* Enable USART1 */
  188. USART_Cmd(USART1, ENABLE);
  189. }
  190. }
  191. /* write one character to serial, must not trigger interrupt */
  192. static void rt_hw_console_putc(const char c)
  193. {
  194. /*
  195. to be polite with serial console add a line feed
  196. to the carriage return character
  197. */
  198. if (c=='\n')rt_hw_console_putc('\r');
  199. while (!(USART1->SR & USART_FLAG_TXE));
  200. USART1->DR = (c & 0x1FF);
  201. }
  202. /**
  203. * This function is used by rt_kprintf to display a string on console.
  204. *
  205. * @param str the displayed string
  206. */
  207. void rt_hw_console_output(const char* str)
  208. {
  209. while (*str)
  210. {
  211. rt_hw_console_putc (*str++);
  212. }
  213. }
  214. /*@}*/