drv_adc.c 6.2 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2023-03-29 rose_man first version
  9. */
  10. #include "board.h"
  11. #include "drv_adc.h"
  12. #if defined BSP_USING_ADC
  13. #define DBG_TAG "drv.adc"
  14. #define DBG_LVL DBG_INFO
  15. #include <rtdbg.h>
  16. #if defined(BSP_USING_BL70X) || defined(BSP_USING_BL60X)
  17. #define ADC_GPIP_BASE ((uint32_t)0x40002000)
  18. #elif defined(BSP_USING_BL61X) || defined(BSP_USING_BL808)
  19. #define ADC_GPIP_BASE ((uint32_t)0x20002000)
  20. #endif
  21. static struct bflb_dma_channel_lli_pool_s lli[1];
  22. static volatile uint32_t raw_data[16 + 10];
  23. static struct bflb_adc_result_s adc_value[10];
  24. static struct bflb_adc_config_s adc_config =
  25. {
  26. .clk_div = ADC_CLK_DIV_32,
  27. .scan_conv_mode = false,
  28. .continuous_conv_mode = true,
  29. .differential_mode = false,
  30. .resolution = ADC_RESOLUTION_16B,
  31. .vref = ADC_VREF_3P2V,
  32. };
  33. struct bl_adc
  34. {
  35. struct rt_adc_device bl_adc_device;
  36. struct bflb_device_s *adc;
  37. struct bflb_device_s *dma;
  38. rt_sem_t sem;
  39. };
  40. static struct bl_adc bl_adc_obj;
  41. struct _adc_channel_cfg
  42. {
  43. struct bflb_adc_channel_s chan;
  44. uint16_t chan_gpio;
  45. };
  46. static struct _adc_channel_cfg chan[] = {
  47. #ifdef BSP_USING_ADC_CH0
  48. { .chan.pos_chan = ADC_CHANNEL_0,
  49. .chan.neg_chan = ADC_CHANNEL_GND,
  50. .chan_gpio = BSP_ADC_CH0_PIN,},
  51. #endif
  52. #ifdef BSP_USING_ADC_CH1
  53. { .chan.pos_chan = ADC_CHANNEL_1,
  54. .chan.neg_chan = ADC_CHANNEL_GND,
  55. .chan_gpio = BSP_ADC_CH1_PIN,},
  56. #endif
  57. #ifdef BSP_USING_ADC_CH2
  58. { .chan.pos_chan = ADC_CHANNEL_2,
  59. .chan.neg_chan = ADC_CHANNEL_GND,
  60. .chan_gpio = BSP_ADC_CH2_PIN,},
  61. #endif
  62. #ifdef BSP_USING_ADC_CH3
  63. { .chan.pos_chan = ADC_CHANNEL_3,
  64. .chan.neg_chan = ADC_CHANNEL_GND,
  65. .chan_gpio = BSP_ADC_CH3_PIN,},
  66. #endif
  67. #ifdef BSP_USING_ADC_CH4
  68. { .chan.pos_chan = ADC_CHANNEL_4,
  69. .chan.neg_chan = ADC_CHANNEL_GND,
  70. .chan_gpio = BSP_ADC_CH4_PIN,},
  71. #endif
  72. #ifdef BSP_USING_ADC_CH5
  73. { .chan.pos_chan = ADC_CHANNEL_5,
  74. .chan.neg_chan = ADC_CHANNEL_GND,
  75. .chan_gpio = BSP_ADC_CH5_PIN,},
  76. #endif
  77. #ifdef BSP_USING_ADC_CH6
  78. { .chan.pos_chan = ADC_CHANNEL_6,
  79. .chan.neg_chan = ADC_CHANNEL_GND,
  80. .chan_gpio = BSP_ADC_CH6_PIN,},
  81. #endif
  82. #ifdef BSP_USING_ADC_CH7
  83. { .chan.pos_chan = ADC_CHANNEL_7,
  84. .chan.neg_chan = ADC_CHANNEL_GND,
  85. .chan_gpio = BSP_ADC_CH7_PIN,},
  86. #endif
  87. #ifdef BSP_USING_ADC_CH8
  88. { .chan.pos_chan = ADC_CHANNEL_8,
  89. .chan.neg_chan = ADC_CHANNEL_GND,
  90. .chan_gpio = BSP_ADC_CH8_PIN,},
  91. #endif
  92. #ifdef BSP_USING_ADC_CH9
  93. { .chan.pos_chan = ADC_CHANNEL_9,
  94. .chan.neg_chan = ADC_CHANNEL_GND,
  95. .chan_gpio = BSP_ADC_CH9_PIN,},
  96. #endif
  97. #ifdef BSP_USING_ADC_CH10
  98. { .chan.pos_chan = ADC_CHANNEL_10,
  99. .chan.neg_chan = ADC_CHANNEL_GND,
  100. .chan_gpio = BSP_ADC_CH10_PIN,},
  101. #endif
  102. };
  103. static void bl_adc_pin_init(void)
  104. {
  105. struct bflb_device_s *gpio;
  106. gpio = bflb_device_get_by_name("gpio");
  107. for (uint8_t i = 0; i < sizeof(chan) / sizeof(chan[0]); i++)
  108. {
  109. bflb_gpio_init(gpio, chan[i].chan_gpio, GPIO_ANALOG | GPIO_SMT_EN | GPIO_DRV_0);
  110. }
  111. }
  112. static rt_err_t bl_adc_enabled(struct rt_adc_device *device, rt_int8_t channel, rt_bool_t enabled)
  113. {
  114. RT_ASSERT(device != RT_NULL);
  115. struct bl_adc *_adc;
  116. struct bflb_dma_channel_lli_transfer_s transfers[1];
  117. _adc = (struct bl_adc *)device->parent.user_data;
  118. struct bflb_adc_channel_s chan;
  119. chan.pos_chan = channel;
  120. chan.neg_chan = ADC_CHANNEL_GND;
  121. bflb_adc_channel_config(_adc->adc, &chan, channel);
  122. transfers[0].src_addr = (uint32_t)DMA_ADDR_ADC_RDR;
  123. transfers[0].dst_addr = (uint32_t)raw_data;
  124. transfers[0].nbytes = sizeof(raw_data);
  125. bflb_dma_channel_lli_reload(_adc->dma, lli, 1, transfers, 1);
  126. bflb_dma_channel_start(_adc->dma);
  127. if (enabled)
  128. {
  129. bflb_adc_start_conversion(_adc->adc);
  130. }
  131. else
  132. {
  133. bflb_adc_stop_conversion(_adc->adc);
  134. }
  135. return RT_EOK;
  136. }
  137. static rt_err_t bl_adc_get_value(struct rt_adc_device *device, rt_int8_t channel, rt_uint32_t *value)
  138. {
  139. struct bl_adc *_adc;
  140. RT_ASSERT(device != RT_NULL);
  141. RT_ASSERT(value != RT_NULL);
  142. _adc = device->parent.user_data;
  143. rt_sem_take(_adc->sem, RT_WAITING_FOREVER);
  144. /* get ADC value */
  145. *value = (rt_uint32_t)raw_data[10 + channel];
  146. return RT_EOK;
  147. }
  148. static const struct rt_adc_ops bl_adc_ops =
  149. {
  150. .enabled = bl_adc_enabled,
  151. .convert = bl_adc_get_value,
  152. };
  153. static void bl_adc_dma_isr(void *arg)
  154. {
  155. struct bl_adc *_adc = (struct bl_adc *)arg;
  156. LOG_D("adc dma done ");
  157. // bflb_adc_parse_result(_adc->adc, raw_data, adc_value, 10);
  158. rt_sem_release(_adc->sem);
  159. }
  160. int rt_hw_adc_init(void)
  161. {
  162. int result = RT_EOK;
  163. bl_adc_pin_init();
  164. bl_adc_obj.adc = bflb_device_get_by_name("adc");
  165. bl_adc_obj.dma = bflb_device_get_by_name(BSP_ADC_DMA_CHANNEL);
  166. if(bl_adc_obj.adc == RT_NULL || bl_adc_obj.dma == RT_NULL)
  167. {
  168. LOG_E("adc dma device not found");
  169. return -RT_ERROR;
  170. }
  171. bl_adc_obj.sem = rt_sem_create("adc_sem", 0, RT_IPC_FLAG_PRIO);
  172. if(bl_adc_obj.sem == RT_NULL)
  173. {
  174. LOG_E("rt_sem_create adc_dma_sem error");
  175. return -RT_ENOMEM;
  176. }
  177. bflb_adc_init(bl_adc_obj.adc, &adc_config);
  178. bflb_adc_link_rxdma(bl_adc_obj.adc, true);
  179. struct bflb_dma_channel_config_s config;
  180. config.direction = DMA_PERIPH_TO_MEMORY;
  181. config.src_req = DMA_REQUEST_ADC;
  182. config.dst_req = DMA_REQUEST_NONE;
  183. config.src_addr_inc = DMA_ADDR_INCREMENT_DISABLE;
  184. config.dst_addr_inc = DMA_ADDR_INCREMENT_ENABLE;
  185. config.src_burst_count = DMA_BURST_INCR1;
  186. config.dst_burst_count = DMA_BURST_INCR1;
  187. config.src_width = DMA_DATA_WIDTH_32BIT;
  188. config.dst_width = DMA_DATA_WIDTH_32BIT;
  189. bflb_dma_channel_init(bl_adc_obj.dma, &config);
  190. bflb_dma_channel_irq_attach(bl_adc_obj.dma, bl_adc_dma_isr, (void *)&bl_adc_obj);
  191. /* register ADC device */
  192. if (rt_hw_adc_register(&bl_adc_obj.bl_adc_device, "adc", &bl_adc_ops, &bl_adc_obj) == RT_EOK)
  193. {
  194. LOG_D("adc init success");
  195. }
  196. else
  197. {
  198. LOG_E("adc register failed");
  199. result = -RT_ERROR;
  200. }
  201. return result;
  202. }
  203. INIT_BOARD_EXPORT(rt_hw_adc_init);
  204. #endif /* BSP_USING_ADC */