context.asm 3.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117
  1. /*
  2. * File : context.asm
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2009, RT-Thread Development Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2010-04-09 fify the first version
  13. *
  14. * For : Renesas M16C
  15. * Toolchain : IAR's EW for M16C v3.401
  16. */
  17. ;********************************************************************************************************
  18. ; PUBLIC FUNCTIONS
  19. ;********************************************************************************************************
  20. RSEG CSTACK
  21. RSEG ISTACK
  22. RSEG CODE(1)
  23. EXTERN rt_thread_switch_interrput_flag
  24. EXTERN rt_interrupt_from_thread
  25. EXTERN rt_interrupt_to_thread
  26. EXTERN rt_interrupt_enter
  27. EXTERN rt_tick_increase
  28. EXTERN rt_interrupt_leave
  29. EXTERN u0rec_handler
  30. PUBLIC rt_hw_interrupt_disable
  31. PUBLIC rt_hw_interrupt_enable
  32. PUBLIC rt_hw_context_switch_to
  33. PUBLIC rt_hw_context_switch
  34. PUBLIC rt_hw_context_switch_interrupt
  35. PUBLIC rt_hw_timer_handler
  36. PUBLIC rt_hw_uart0_receive_handler
  37. rt_hw_interrupt_disable
  38. FCLR I
  39. RTS
  40. rt_hw_interrupt_enable
  41. FSET I
  42. RTS
  43. ;/*
  44. ; * void rt_hw_context_switch_to(rt_uint32 to);
  45. ; * r0 --> to
  46. ; * this fucntion is used to perform the first thread switch
  47. ; */
  48. rt_hw_context_switch_to
  49. MOV.W R0, A0
  50. LDC [A0], ISP
  51. POPM R0,R1,R2,R3,A0,A1,SB,FB
  52. REIT
  53. rt_hw_context_switch
  54. PUSHM R0,R1,R2,R3,A0,A1,SB,FB
  55. MOV.W R0, A0
  56. STC ISP, [A0]
  57. MOV.W R1, A0
  58. LDC [A0], ISP
  59. POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore all processor registers from the new task's stack
  60. REIT
  61. rt_hw_context_switch_interrupt
  62. CMP.W #1,rt_thread_switch_interrput_flag
  63. JEQ jump
  64. MOV.W #1,rt_thread_switch_interrput_flag
  65. MOV.W R0, rt_interrupt_from_thread
  66. jump
  67. MOV.W R1, rt_interrupt_to_thread
  68. RTS
  69. rt_hw_context_switch_interrupt_do
  70. MOV.W #0, rt_thread_switch_interrput_flag
  71. MOV.W rt_interrupt_from_thread, A0
  72. STC ISP, [A0]
  73. MOV.W rt_interrupt_to_thread, A0
  74. LDC [A0], ISP
  75. POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore all processor registers from the new task's stack
  76. RTS ; Normal return
  77. .EVEN
  78. rt_hw_timer_handler:
  79. PUSHM R0,R1,R2,R3,A0,A1,SB,FB ; Save current task's registers
  80. JSR rt_interrupt_enter
  81. JSR rt_tick_increase
  82. JSR rt_interrupt_leave
  83. CMP.W #1,rt_thread_switch_interrput_flag
  84. JEQ rt_hw_context_switch_interrupt_do
  85. POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore registers from the new task's stack
  86. REIT ; Return from interrup
  87. .EVEN
  88. rt_hw_uart0_receive_handler:
  89. PUSHM R0,R1,R2,R3,A0,A1,SB,FB ; Save current task's registers
  90. JSR rt_interrupt_enter
  91. JSR u0rec_handler
  92. JSR rt_interrupt_leave
  93. CMP.W #1, rt_thread_switch_interrput_flag
  94. JEQ rt_hw_context_switch_interrupt_do
  95. POPM R0,R1,R2,R3,A0,A1,SB,FB ; Restore registers from the new task's stack
  96. REIT ; Return from interrup
  97. END