drv_usart.c 49 KB

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  1. /***************************************************************************//**
  2. * @file drv_usart.c
  3. * @brief USART driver of RT-Thread RTOS for EFM32
  4. * COPYRIGHT (C) 2011, RT-Thread Development Team
  5. * @author onelife
  6. * @version 0.4 beta
  7. *******************************************************************************
  8. * @section License
  9. * The license and distribution terms for this file may be found in the file
  10. * LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
  11. *******************************************************************************
  12. * @section Change Logs of serial.c
  13. * Date Author Notes
  14. * 2009-02-05 Bernard first version
  15. * 2009-10-25 Bernard fix rt_serial_read bug when there is no data in the
  16. * buffer.
  17. * 2010-03-29 Bernard cleanup code.
  18. *
  19. * @section Change Logs
  20. * Date Author Notes
  21. * 2010-12-22 onelife Initial creation for EFM32
  22. * 2011-01-17 onelife Merge with serial.c
  23. * 2011-05-06 onelife Add sync mode (SPI) support
  24. * 2011-06-14 onelife Fix a bug of TX by DMA
  25. * 2011-06-16 onelife Modify init function for EFM32 library v2.0.0
  26. * upgrading
  27. * 2011-07-07 onelife Modify write function to avoid sleep in ISR
  28. * 2011-07-26 onelife Add lock (semaphore) to prevent simultaneously
  29. * access
  30. * 2011-11-29 onelife Modify init function for EFM32 library v2.2.2
  31. * upgrading
  32. * 2011-12-09 onelife Add giant gecko support
  33. * 2011-12-09 onelife Add UART module support
  34. * 2011-12-20 onelife Add 9-bit SPI mode support
  35. * 2011-12-20 onelife Change SPI write format (same as SPI read)
  36. * 2011-12-20 onelife Change USART status format
  37. * 2011-12-27 onelife Utilize "USART_PRESENT", "USART_COUNT",
  38. * "UART_PRESENT" and "UART_COUNT"
  39. ******************************************************************************/
  40. /***************************************************************************//**
  41. * @addtogroup efm32
  42. * @{
  43. ******************************************************************************/
  44. /* Includes ------------------------------------------------------------------*/
  45. #include "board.h"
  46. #include "hdl_interrupt.h"
  47. #include "drv_usart.h"
  48. #if (defined(RT_USING_USART0) || defined(RT_USING_USART1) || \
  49. defined(RT_USING_USART2) || defined(RT_USING_UART0) || \
  50. defined(RT_USING_UART1))
  51. #if ((defined(RT_USING_USART0) || defined(RT_USING_USART1) || \
  52. defined(RT_USING_USART2)) && !defined(USART_PRESENT))
  53. #error "USART module is not available"
  54. #endif
  55. #if ((defined(RT_USING_UART0) || defined(RT_USING_UART1)) && \
  56. !defined(UART_PRESENT))
  57. #error "UART module is not available"
  58. #endif
  59. /* Private typedef -----------------------------------------------------------*/
  60. /* Private define ------------------------------------------------------------*/
  61. /* Private macro -------------------------------------------------------------*/
  62. #ifdef RT_USART_DEBUG
  63. #define usart_debug(format,args...) rt_kprintf(format, ##args)
  64. #else
  65. #define usart_debug(format,args...)
  66. #endif
  67. /* Private variables ---------------------------------------------------------*/
  68. #ifdef RT_USING_USART0
  69. #if (RT_USING_USART0 >= EFM32_USART_LOCATION_COUNT)
  70. #error "Wrong location number"
  71. #endif
  72. struct rt_device usart0_device;
  73. static struct rt_semaphore usart0_lock;
  74. #endif
  75. #ifdef RT_USING_USART1
  76. #if (USART_COUNT <= 1)
  77. #error "Wrong unit number"
  78. #endif
  79. #if (RT_USING_USART1 >= EFM32_USART_LOCATION_COUNT)
  80. #error "Wrong location number"
  81. #endif
  82. struct rt_device usart1_device;
  83. static struct rt_semaphore usart1_lock;
  84. #endif
  85. #ifdef RT_USING_USART2
  86. #if (USART_COUNT <= 2)
  87. #error "Wrong unit number"
  88. #endif
  89. #if (RT_USING_USART2 >= EFM32_USART_LOCATION_COUNT)
  90. #error "Wrong location number"
  91. #endif
  92. struct rt_device usart2_device;
  93. static struct rt_semaphore usart2_lock;
  94. #endif
  95. #ifdef RT_USING_UART0
  96. #if (RT_USING_UART0 >= EFM32_UART_LOCATION_COUNT)
  97. #error "Wrong location number"
  98. #endif
  99. struct rt_device uart0_device;
  100. static struct rt_semaphore uart0_lock;
  101. #endif
  102. #ifdef RT_USING_UART1
  103. #if (UART_COUNT <= 1)
  104. #error "Wrong unit number"
  105. #endif
  106. #if (RT_USING_UART1 >= EFM32_UART_LOCATION_COUNT)
  107. #error "Wrong location number"
  108. #endif
  109. struct rt_device uart1_device;
  110. static struct rt_semaphore uart1_lock;
  111. #endif
  112. /* Private function prototypes -----------------------------------------------*/
  113. /* Private functions ---------------------------------------------------------*/
  114. /***************************************************************************//**
  115. * @brief
  116. * Initialize USART device
  117. *
  118. * @details
  119. *
  120. * @note
  121. *
  122. * @param[in] dev
  123. * Pointer to device descriptor
  124. *
  125. * @return
  126. * Error code
  127. ******************************************************************************/
  128. static rt_err_t rt_usart_init (rt_device_t dev)
  129. {
  130. struct efm32_usart_device_t *usart;
  131. usart = (struct efm32_usart_device_t *)(dev->user_data);
  132. if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
  133. {
  134. if (dev->flag & RT_DEVICE_FLAG_DMA_TX)
  135. {
  136. struct efm32_usart_dma_mode_t *dma_tx;
  137. dma_tx = (struct efm32_usart_dma_mode_t *)(usart->tx_mode);
  138. usart->state |= USART_STATE_RX_BUSY;
  139. }
  140. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  141. {
  142. struct efm32_usart_int_mode_t *int_rx;
  143. int_rx = (struct efm32_usart_int_mode_t *)(usart->rx_mode);
  144. int_rx->data_ptr = RT_NULL;
  145. }
  146. /* Enable USART */
  147. USART_Enable(usart->usart_device, usartEnable);
  148. dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
  149. }
  150. return RT_EOK;
  151. }
  152. /***************************************************************************//**
  153. * @brief
  154. * Open USART device
  155. *
  156. * @details
  157. *
  158. * @note
  159. *
  160. * @param[in] dev
  161. * Pointer to device descriptor
  162. *
  163. * @param[in] oflag
  164. * Device open flag
  165. *
  166. * @return
  167. * Error code
  168. ******************************************************************************/
  169. static rt_err_t rt_usart_open(rt_device_t dev, rt_uint16_t oflag)
  170. {
  171. RT_ASSERT(dev != RT_NULL);
  172. struct efm32_usart_device_t *usart;
  173. usart = (struct efm32_usart_device_t *)(dev->user_data);
  174. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  175. {
  176. IRQn_Type rxIrq;
  177. //if (usart->state & USART_STATE_CONSOLE)
  178. { /* Allocate new RX buffer */
  179. struct efm32_usart_int_mode_t *int_mode;
  180. int_mode = (struct efm32_usart_int_mode_t *)(usart->rx_mode);
  181. if ((int_mode->data_ptr = rt_malloc(USART_RX_BUFFER_SIZE)) == RT_NULL)
  182. {
  183. usart_debug("USART%d err: no mem for RX BUF\n", usart->unit);
  184. return -RT_ENOMEM;
  185. }
  186. rt_memset(int_mode->data_ptr, 0, USART_RX_BUFFER_SIZE);
  187. int_mode->data_size = USART_RX_BUFFER_SIZE;
  188. int_mode->read_index = 0;
  189. int_mode->save_index = 0;
  190. }
  191. /* Enable RX interrupt */
  192. #if defined(UART_PRESENT)
  193. if (usart->state & USART_STATE_ASYNC_ONLY)
  194. {
  195. usart->usart_device->IEN = UART_IEN_RXDATAV;
  196. }
  197. else
  198. #endif
  199. {
  200. usart->usart_device->IEN = USART_IEN_RXDATAV;
  201. }
  202. /* Enable IRQ */
  203. switch (usart->unit)
  204. {
  205. case 0:
  206. #if defined(UART_PRESENT)
  207. if (usart->state & USART_STATE_ASYNC_ONLY)
  208. {
  209. rxIrq = UART0_RX_IRQn;
  210. }
  211. else
  212. #endif
  213. {
  214. rxIrq = USART0_RX_IRQn;
  215. }
  216. break;
  217. #if ((defined(USART_PRESENT) && (USART_COUNT > 1)) || \
  218. (defined(UART_PRESENT) && (UART_COUNT > 1)))
  219. case 1:
  220. #if (defined(UART_PRESENT) && (UART_COUNT > 1))
  221. if (usart->state & USART_STATE_ASYNC_ONLY)
  222. {
  223. rxIrq = UART1_RX_IRQn;
  224. }
  225. else
  226. #endif
  227. {
  228. rxIrq = USART1_RX_IRQn;
  229. }
  230. break;
  231. #endif
  232. #if ((defined(USART_PRESENT) && (USART_COUNT > 2)) || \
  233. (defined(UART_PRESENT) && (UART_COUNT > 2)))
  234. case 2:
  235. #if (defined(UART_PRESENT) && (UART_COUNT > 2))
  236. if (usart->state & USART_STATE_ASYNC_ONLY)
  237. {
  238. rxIrq = UART2_RX_IRQn;
  239. }
  240. else
  241. #endif
  242. {
  243. rxIrq = USART2_RX_IRQn;
  244. }
  245. break;
  246. #endif
  247. }
  248. if (oflag != RT_DEVICE_OFLAG_WRONLY)
  249. {
  250. NVIC_ClearPendingIRQ(rxIrq);
  251. NVIC_SetPriority(rxIrq, EFM32_IRQ_PRI_DEFAULT);
  252. NVIC_EnableIRQ(rxIrq);
  253. }
  254. }
  255. /* Clear Flag */
  256. #if defined(UART_PRESENT)
  257. if (usart->state & USART_STATE_ASYNC_ONLY)
  258. {
  259. usart->usart_device->IFC = _UART_IFC_MASK;
  260. }
  261. else
  262. #endif
  263. {
  264. usart->usart_device->IFC = _USART_IFC_MASK;
  265. }
  266. if ((dev->flag & RT_DEVICE_FLAG_DMA_TX) && (oflag != RT_DEVICE_OFLAG_RDONLY))
  267. {
  268. /* DMA IRQ is enabled by DMA_Init() */
  269. NVIC_SetPriority(DMA_IRQn, EFM32_IRQ_PRI_DEFAULT);
  270. }
  271. usart->counter++;
  272. usart_debug("USART%d: Open with flag %x\n", usart->unit, oflag);
  273. return RT_EOK;
  274. }
  275. /***************************************************************************//**
  276. * @brief
  277. * Close USART device
  278. *
  279. * @details
  280. *
  281. * @note
  282. *
  283. * @param[in] dev
  284. * Pointer to device descriptor
  285. *
  286. * @return
  287. * Error code
  288. ******************************************************************************/
  289. static rt_err_t rt_usart_close(rt_device_t dev)
  290. {
  291. RT_ASSERT(dev != RT_NULL);
  292. struct efm32_usart_device_t *usart;
  293. usart = (struct efm32_usart_device_t *)(dev->user_data);
  294. if (--usart->counter == 0)
  295. {
  296. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  297. {
  298. struct efm32_usart_int_mode_t *int_rx;
  299. int_rx = (struct efm32_usart_int_mode_t *)usart->rx_mode;
  300. rt_free(int_rx->data_ptr);
  301. int_rx->data_ptr = RT_NULL;
  302. }
  303. }
  304. return RT_EOK;
  305. }
  306. /***************************************************************************//**
  307. * @brief
  308. * Read from USART device
  309. *
  310. * @details
  311. *
  312. * @note
  313. * 9-bit SPI mode and SPI slave mode is untested
  314. *
  315. * @param[in] dev
  316. * Pointer to device descriptor
  317. *
  318. * @param[in] pos
  319. * Offset
  320. *
  321. * @param[in] buffer
  322. * Poniter to the buffer
  323. *
  324. * @param[in] size
  325. * Buffer size in byte
  326. *
  327. * @return
  328. * Number of read bytes
  329. ******************************************************************************/
  330. static rt_size_t rt_usart_read (
  331. rt_device_t dev,
  332. rt_off_t pos,
  333. void *buffer,
  334. rt_size_t size)
  335. {
  336. rt_err_t err_code;
  337. struct efm32_usart_device_t *usart;
  338. rt_size_t read_len, len;
  339. rt_uint8_t *ptr;
  340. rt_uint32_t rx_flag, tx_flag, b8_flag;
  341. usart = (struct efm32_usart_device_t *)(dev->user_data);
  342. #if defined(UART_PRESENT)
  343. if (usart->state & USART_STATE_ASYNC_ONLY)
  344. {
  345. rx_flag = UART_STATUS_RXDATAV;
  346. tx_flag = UART_STATUS_TXBL;
  347. b8_flag = UART_CTRL_BIT8DV;
  348. }
  349. else
  350. #endif
  351. {
  352. rx_flag = USART_STATUS_RXDATAV;
  353. tx_flag = USART_STATUS_TXBL;
  354. b8_flag = USART_CTRL_BIT8DV;
  355. }
  356. /* Lock device */
  357. if (rt_hw_interrupt_check())
  358. {
  359. err_code = rt_sem_take(usart->lock, RT_WAITING_NO);
  360. }
  361. else
  362. {
  363. err_code = rt_sem_take(usart->lock, RT_WAITING_FOREVER);
  364. }
  365. if (err_code != RT_EOK)
  366. {
  367. rt_set_errno(err_code);
  368. return 0;
  369. }
  370. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  371. {
  372. len = size;
  373. ptr = buffer;
  374. /* interrupt mode Rx */
  375. while (len)
  376. {
  377. rt_base_t level;
  378. struct efm32_usart_int_mode_t *int_rx;
  379. int_rx = (struct efm32_usart_int_mode_t *)\
  380. (((struct efm32_usart_device_t *)(dev->user_data))->rx_mode);
  381. /* disable interrupt */
  382. level = rt_hw_interrupt_disable();
  383. if (int_rx->read_index != int_rx->save_index)
  384. {
  385. /* read a character */
  386. *ptr++ = int_rx->data_ptr[int_rx->read_index];
  387. len--;
  388. /* move to next position */
  389. int_rx->read_index ++;
  390. if (int_rx->read_index >= USART_RX_BUFFER_SIZE)
  391. {
  392. int_rx->read_index = 0;
  393. }
  394. }
  395. else
  396. {
  397. /* set error code */
  398. err_code = -RT_EEMPTY;
  399. /* enable interrupt */
  400. rt_hw_interrupt_enable(level);
  401. break;
  402. }
  403. /* enable interrupt */
  404. rt_hw_interrupt_enable(level);
  405. }
  406. read_len = (rt_uint32_t)ptr - (rt_uint32_t)buffer;
  407. }
  408. else
  409. {
  410. if (usart->state & USART_STATE_SYNC)
  411. {
  412. /* SPI read */
  413. rt_uint8_t inst_len = *((rt_uint8_t *)buffer);
  414. rt_uint8_t *inst_ptr = (rt_uint8_t *)(buffer + 1);
  415. rt_uint8_t *rx_buf = *((rt_uint8_t **)(buffer + inst_len + 1));
  416. rt_off_t i;
  417. ptr = inst_ptr;
  418. len = inst_len;
  419. /* Write instructions */
  420. if (len)
  421. {
  422. if (usart->state & USART_STATE_9BIT)
  423. {
  424. usart->usart_device->CTRL &= ~b8_flag;
  425. }
  426. while (len)
  427. {
  428. while (!(usart->usart_device->STATUS & tx_flag));
  429. usart->usart_device->TXDATA = (rt_uint32_t)*(ptr++);
  430. len--;
  431. }
  432. if (usart->state & USART_STATE_9BIT)
  433. {
  434. usart->usart_device->CTRL |= b8_flag;
  435. }
  436. }
  437. /* Flushing RX */
  438. usart->usart_device->CMD = USART_CMD_CLEARRX;
  439. /* Skip some bytes if necessary */
  440. for (i = 0; i < pos; i++)
  441. {
  442. /* dummy write */
  443. while (!(usart->usart_device->STATUS & tx_flag));
  444. usart->usart_device->TXDATA = (rt_uint32_t)0xff;
  445. /* dummy read */
  446. while (!(usart->usart_device->STATUS & rx_flag));
  447. *((rt_uint32_t *)0x00) = usart->usart_device->RXDATA;
  448. }
  449. ptr = rx_buf;
  450. len = size;
  451. /* Read data */
  452. while (len)
  453. {
  454. /* dummy write */
  455. while (!(usart->usart_device->STATUS & tx_flag));
  456. usart->usart_device->TXDATA = (rt_uint32_t)0xff;
  457. /* read a byte of data */
  458. while (!(usart->usart_device->STATUS & rx_flag));
  459. *(ptr++) = usart->usart_device->RXDATA & 0xff;
  460. len--;
  461. }
  462. }
  463. else
  464. {
  465. ptr = buffer;
  466. len = size;
  467. /* polling mode */
  468. while (len)
  469. {
  470. while (usart->usart_device->STATUS & rx_flag)
  471. {
  472. *(ptr++) = usart->usart_device->RXDATA & 0xff;
  473. }
  474. len--;
  475. }
  476. }
  477. read_len = size - len;
  478. }
  479. /* Unlock device */
  480. rt_sem_release(usart->lock);
  481. /* set error code */
  482. rt_set_errno(err_code);
  483. return read_len;
  484. }
  485. /***************************************************************************//**
  486. * @brief
  487. * Write to USART device
  488. *
  489. * @details
  490. *
  491. * @note
  492. *
  493. * @param[in] dev
  494. * Pointer to device descriptor
  495. *
  496. * @param[in] pos
  497. * Offset
  498. *
  499. * @param[in] buffer
  500. * Poniter to the buffer
  501. *
  502. * @param[in] size
  503. * Buffer size in byte
  504. *
  505. * @return
  506. * Number of written bytes
  507. ******************************************************************************/
  508. static rt_size_t rt_usart_write (
  509. rt_device_t dev,
  510. rt_off_t pos,
  511. const void* buffer,
  512. rt_size_t size)
  513. {
  514. rt_err_t err_code;
  515. struct efm32_usart_device_t* usart = (struct efm32_usart_device_t*)(dev->user_data);
  516. rt_size_t read_len, len;
  517. rt_uint8_t *ptr;
  518. rt_size_t write_size = 0;
  519. rt_uint32_t tx_flag, b8_flag;
  520. #if defined(UART_PRESENT)
  521. if (usart->state & USART_STATE_ASYNC_ONLY)
  522. {
  523. tx_flag = UART_STATUS_TXBL;
  524. b8_flag = UART_CTRL_BIT8DV;
  525. }
  526. else
  527. #endif
  528. {
  529. tx_flag = USART_STATUS_TXBL;
  530. b8_flag = USART_CTRL_BIT8DV;
  531. }
  532. /* Lock device */
  533. if (rt_hw_interrupt_check())
  534. {
  535. err_code = rt_sem_take(usart->lock, RT_WAITING_NO);
  536. }
  537. else
  538. {
  539. err_code = rt_sem_take(usart->lock, RT_WAITING_FOREVER);
  540. }
  541. if (err_code != RT_EOK)
  542. {
  543. rt_set_errno(err_code);
  544. return 0;
  545. }
  546. if (usart->state & USART_STATE_SYNC)
  547. { /* SPI write */
  548. rt_uint8_t inst_len = *((rt_uint8_t *)buffer);
  549. rt_uint8_t *inst_ptr = (rt_uint8_t *)(buffer + 1);
  550. rt_uint8_t *tx_buf = *((rt_uint8_t **)(buffer + inst_len + 1));
  551. ptr = inst_ptr;
  552. len = inst_len;
  553. /* Write instructions */
  554. if (len)
  555. {
  556. if (usart->state & USART_STATE_9BIT)
  557. {
  558. usart->usart_device->CTRL &= ~b8_flag;
  559. }
  560. if ((dev->flag & RT_DEVICE_FLAG_DMA_TX) && (len > 2))
  561. { /* DMA mode Tx */
  562. struct efm32_usart_dma_mode_t *dma_tx;
  563. usart_debug("USART: DMA TX INS (%d)\n", len);
  564. dma_tx = (struct efm32_usart_dma_mode_t *)(usart->tx_mode);
  565. dma_tx->data_ptr = (rt_uint32_t *)ptr;
  566. dma_tx->data_size = len;
  567. usart->state |= USART_STATE_TX_BUSY;
  568. DMA_ActivateBasic(
  569. dma_tx->dma_channel,
  570. true,
  571. false,
  572. (void *)&(usart->usart_device->TXDATA),
  573. (void *)ptr,
  574. (rt_uint32_t)(len - 1));
  575. /* Wait, otherwise the TX buffer is overwrite */
  576. // TODO: This function blocks the process => goto low power mode?
  577. // if (usart->state & USART_STATE_CONSOLE)
  578. // {
  579. while(usart->state & USART_STATE_TX_BUSY);
  580. // }
  581. // else
  582. // {
  583. // while(usart->state & USART_STATE_TX_BUSY)
  584. // {
  585. // rt_thread_sleep(USART_WAIT_TIME_TX);
  586. // }
  587. // }
  588. }
  589. else
  590. { /* polling mode */
  591. usart_debug("USART: Polling TX INS (%d)\n", len);
  592. while (len)
  593. {
  594. while (!(usart->usart_device->STATUS & tx_flag));
  595. usart->usart_device->TXDATA = (rt_uint32_t)*(ptr++);
  596. len--;
  597. }
  598. }
  599. if (usart->state & USART_STATE_9BIT)
  600. {
  601. usart->usart_device->CTRL |= b8_flag;
  602. }
  603. }
  604. ptr = tx_buf;
  605. }
  606. else
  607. {
  608. ptr = (rt_uint8_t *)buffer;
  609. }
  610. len = size;
  611. /* Write data */
  612. if (dev->flag & RT_DEVICE_FLAG_STREAM)
  613. {
  614. if (*(ptr + len - 1) == '\n')
  615. {
  616. *(ptr + len - 1) = '\r';
  617. *(ptr + len++) = '\n';
  618. *(ptr + len) = 0;
  619. }
  620. }
  621. if ((dev->flag & RT_DEVICE_FLAG_DMA_TX) && (len > 2))
  622. { /* DMA mode Tx */
  623. struct efm32_usart_dma_mode_t *dma_tx;
  624. usart_debug("USART: DMA TX data (%d)\n", len);
  625. dma_tx = (struct efm32_usart_dma_mode_t *)(usart->tx_mode);
  626. dma_tx->data_ptr = (rt_uint32_t *)ptr;
  627. dma_tx->data_size = len;
  628. usart->state |= USART_STATE_TX_BUSY;
  629. DMA_ActivateBasic(
  630. dma_tx->dma_channel,
  631. true,
  632. false,
  633. (void *)&(usart->usart_device->TXDATA),
  634. (void *)ptr,
  635. (rt_uint32_t)(len - 1));
  636. /* Wait, otherwise the TX buffer is overwrite */
  637. // TODO: This function blocks the process => goto low power mode?
  638. // if (usart->state & USART_STATE_CONSOLE)
  639. // {
  640. while(usart->state & USART_STATE_TX_BUSY);
  641. // }
  642. // else
  643. // {
  644. // while(usart->state & USART_STATE_TX_BUSY)
  645. // {
  646. // rt_thread_sleep(USART_WAIT_TIME_TX);
  647. // }
  648. // }
  649. write_size = size;
  650. }
  651. else
  652. { /* polling mode */
  653. usart_debug("USART: Polling TX data (%d)\n", len);
  654. while (len)
  655. {
  656. while (!(usart->usart_device->STATUS & tx_flag));
  657. usart->usart_device->TXDATA = (rt_uint32_t)*(ptr++);
  658. len--;
  659. }
  660. write_size = size - len;
  661. }
  662. /* Unlock device */
  663. rt_sem_release(usart->lock);
  664. /* set error code */
  665. rt_set_errno(err_code);
  666. return write_size;
  667. }
  668. /***************************************************************************//**
  669. * @brief
  670. * Configure USART device
  671. *
  672. * @details
  673. *
  674. * @note
  675. *
  676. * @param[in] dev
  677. * Pointer to device descriptor
  678. *
  679. * @param[in] cmd
  680. * IIC control command
  681. *
  682. * @param[in] args
  683. * Arguments
  684. *
  685. * @return
  686. * Error code
  687. ******************************************************************************/
  688. static rt_err_t rt_usart_control (
  689. rt_device_t dev,
  690. rt_uint8_t cmd,
  691. void *args)
  692. {
  693. RT_ASSERT(dev != RT_NULL);
  694. rt_err_t err_code;
  695. struct efm32_usart_device_t *usart;
  696. usart = (struct efm32_usart_device_t *)(dev->user_data);
  697. /* Lock device */
  698. if (rt_hw_interrupt_check())
  699. {
  700. err_code = rt_sem_take(usart->lock, RT_WAITING_NO);
  701. }
  702. else
  703. {
  704. err_code = rt_sem_take(usart->lock, RT_WAITING_FOREVER);
  705. }
  706. if (err_code != RT_EOK)
  707. {
  708. return err_code;
  709. }
  710. switch (cmd)
  711. {
  712. case RT_DEVICE_CTRL_SUSPEND:
  713. /* Suspend device */
  714. dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
  715. USART_Enable(usart->usart_device, usartDisable);
  716. break;
  717. case RT_DEVICE_CTRL_RESUME:
  718. /* Resume device */
  719. dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
  720. USART_Enable(usart->usart_device, usartEnable);
  721. break;
  722. case RT_DEVICE_CTRL_USART_RBUFFER:
  723. /* Set RX buffer */
  724. {
  725. struct efm32_usart_int_mode_t *int_rx;
  726. rt_uint8_t size;
  727. int_rx = (struct efm32_usart_int_mode_t *)(usart->rx_mode);
  728. size = (rt_uint8_t)((rt_uint32_t)args & 0xFFUL);
  729. /* Free previous RX buffer */
  730. if (int_rx->data_ptr != RT_NULL)
  731. {
  732. if (size == 0)
  733. { /* Free RX buffer */
  734. rt_free(int_rx->data_ptr);
  735. int_rx->data_ptr = RT_NULL;
  736. }
  737. else if (size != int_rx->data_size)
  738. {
  739. /* Re-allocate RX buffer */
  740. if ((int_rx->data_ptr = rt_realloc(int_rx->data_ptr, size)) \
  741. == RT_NULL)
  742. {
  743. usart_debug("USART%d err: no mem for RX BUF\n", usart->unit);
  744. err_code = -RT_ENOMEM;
  745. break;
  746. }
  747. // TODO: Is the following line necessary?
  748. //rt_memset(int_rx->data_ptr, 0, size);
  749. }
  750. }
  751. else
  752. {
  753. /* Allocate new RX buffer */
  754. if ((int_rx->data_ptr = rt_malloc(size)) == RT_NULL)
  755. {
  756. usart_debug("USART%d err: no mem for RX BUF\n", usart->unit);
  757. err_code = -RT_ENOMEM;
  758. break;
  759. }
  760. }
  761. int_rx->data_size = size;
  762. int_rx->read_index = 0;
  763. int_rx->save_index = 0;
  764. }
  765. break;
  766. }
  767. /* Unlock device */
  768. rt_sem_release(usart->lock);
  769. return err_code;
  770. }
  771. /***************************************************************************//**
  772. * @brief
  773. * USART RX data valid interrupt handler
  774. *
  775. * @details
  776. *
  777. * @note
  778. * 9-bit SPI mode has not implemented yet and SPI slave mode is untested
  779. *
  780. * @param[in] dev
  781. * Pointer to device descriptor
  782. ******************************************************************************/
  783. void rt_hw_usart_rx_isr(rt_device_t dev)
  784. {
  785. struct efm32_usart_device_t *usart;
  786. struct efm32_usart_int_mode_t *int_rx;
  787. rt_uint32_t flag;
  788. /* interrupt mode receive */
  789. RT_ASSERT(dev->flag & RT_DEVICE_FLAG_INT_RX);
  790. usart = (struct efm32_usart_device_t *)(dev->user_data);
  791. int_rx = (struct efm32_usart_int_mode_t *)(usart->rx_mode);
  792. RT_ASSERT(int_rx->data_ptr != RT_NULL);
  793. #if defined(UART_PRESENT)
  794. if (usart->state & USART_STATE_ASYNC_ONLY)
  795. {
  796. flag = UART_STATUS_RXDATAV;
  797. }
  798. else
  799. #endif
  800. {
  801. flag = USART_STATUS_RXDATAV;
  802. }
  803. /* Set status */
  804. usart->state |= USART_STATE_RX_BUSY;
  805. /* save into rx buffer */
  806. while (usart->usart_device->STATUS & flag)
  807. {
  808. rt_base_t level;
  809. /* disable interrupt */
  810. level = rt_hw_interrupt_disable();
  811. /* save character */
  812. int_rx->data_ptr[int_rx->save_index] = \
  813. (rt_uint8_t)(usart->usart_device->RXDATA & 0xFFUL);
  814. int_rx->save_index ++;
  815. if (int_rx->save_index >= USART_RX_BUFFER_SIZE)
  816. int_rx->save_index = 0;
  817. /* if the next position is read index, discard this 'read char' */
  818. if (int_rx->save_index == int_rx->read_index)
  819. {
  820. int_rx->read_index ++;
  821. if (int_rx->read_index >= USART_RX_BUFFER_SIZE)
  822. {
  823. int_rx->read_index = 0;
  824. }
  825. }
  826. /* enable interrupt */
  827. rt_hw_interrupt_enable(level);
  828. }
  829. /* invoke callback */
  830. if (dev->rx_indicate != RT_NULL)
  831. {
  832. rt_size_t rx_length;
  833. /* get rx length */
  834. rx_length = int_rx->read_index > int_rx->save_index ?
  835. USART_RX_BUFFER_SIZE - int_rx->read_index + int_rx->save_index : \
  836. int_rx->save_index - int_rx->read_index;
  837. dev->rx_indicate(dev, rx_length);
  838. }
  839. }
  840. /***************************************************************************//**
  841. * @brief
  842. * DMA for USART TX interrupt handler
  843. *
  844. * @details
  845. *
  846. * @note
  847. *
  848. * @param[in] dev
  849. * Pointer to device descriptor
  850. ******************************************************************************/
  851. void rt_hw_usart_dma_tx_isr(rt_device_t dev)
  852. {
  853. /* DMA mode receive */
  854. struct efm32_usart_device_t *usart;
  855. struct efm32_usart_dma_mode_t *dma_tx;
  856. RT_ASSERT(dev->flag & RT_DEVICE_FLAG_DMA_TX);
  857. usart = (struct efm32_usart_device_t *)(dev->user_data);
  858. dma_tx = (struct efm32_usart_dma_mode_t *)(usart->tx_mode);
  859. /* invoke call to notify tx complete */
  860. if (dev->tx_complete != RT_NULL)
  861. {
  862. dev->tx_complete(dev, dma_tx->data_ptr);
  863. }
  864. /* Set status */
  865. usart->state &= ~(rt_uint32_t)USART_STATE_TX_BUSY;
  866. }
  867. /***************************************************************************//**
  868. * @brief
  869. * Register USART device
  870. *
  871. * @details
  872. *
  873. * @note
  874. *
  875. * @param[in] device
  876. * Pointer to device descriptor
  877. *
  878. * @param[in] name
  879. * Device name
  880. *
  881. * @param[in] flag
  882. * Configuration flags
  883. *
  884. * @param[in] usart
  885. * Pointer to USART device descriptor
  886. *
  887. * @return
  888. * Error code
  889. ******************************************************************************/
  890. rt_err_t rt_hw_usart_register(
  891. rt_device_t device,
  892. const char *name,
  893. rt_uint32_t flag,
  894. struct efm32_usart_device_t *usart)
  895. {
  896. RT_ASSERT(device != RT_NULL);
  897. if ((flag & RT_DEVICE_FLAG_DMA_RX) ||
  898. (flag & RT_DEVICE_FLAG_INT_TX))
  899. {
  900. RT_ASSERT(0);
  901. }
  902. if (usart->state & USART_STATE_SYNC)
  903. {
  904. device->type = RT_Device_Class_SPIBUS;
  905. }
  906. else
  907. {
  908. device->type = RT_Device_Class_Char;
  909. }
  910. device->rx_indicate = RT_NULL;
  911. device->tx_complete = RT_NULL;
  912. device->init = rt_usart_init;
  913. device->open = rt_usart_open;
  914. device->close = rt_usart_close;
  915. device->read = rt_usart_read;
  916. device->write = rt_usart_write;
  917. device->control = rt_usart_control;
  918. device->user_data = usart;
  919. /* register a character device */
  920. return rt_device_register(device, name, RT_DEVICE_FLAG_RDWR | flag);
  921. }
  922. /***************************************************************************//**
  923. * @brief
  924. * Initialize the specified USART unit
  925. *
  926. * @details
  927. *
  928. * @note
  929. *
  930. * @param[in] device
  931. * Pointer to device descriptor
  932. *
  933. * @param[in] unitNumber
  934. * Unit number
  935. *
  936. * @param[in] location
  937. * Pin location number
  938. *
  939. * @param[in] flag
  940. * Configuration flag
  941. *
  942. * @param[in] dmaChannel
  943. * DMA channel number for TX
  944. *
  945. * @param[in] console
  946. * Indicate if using as console
  947. *
  948. * @return
  949. * Pointer to USART device
  950. ******************************************************************************/
  951. static struct efm32_usart_device_t *rt_hw_usart_unit_init(
  952. rt_device_t device,
  953. rt_uint8_t unitNumber,
  954. rt_uint8_t location,
  955. rt_uint32_t flag,
  956. rt_uint32_t dmaChannel,
  957. rt_uint8_t config)
  958. {
  959. struct efm32_usart_device_t *usart;
  960. struct efm32_usart_dma_mode_t *dma_mode;
  961. DMA_CB_TypeDef *callback;
  962. CMU_Clock_TypeDef usartClock;
  963. rt_uint32_t txDmaSelect;
  964. GPIO_Port_TypeDef port_tx, port_rx, port_clk, port_cs;
  965. rt_uint32_t pin_tx, pin_rx, pin_clk, pin_cs;
  966. efm32_irq_hook_init_t hook;
  967. do
  968. {
  969. /* Allocate device */
  970. usart = rt_malloc(sizeof(struct efm32_usart_device_t));
  971. if (usart == RT_NULL)
  972. {
  973. usart_debug("USART%d err: no mem\n", usart->unit);
  974. break;
  975. }
  976. usart->counter = 0;
  977. usart->unit = unitNumber;
  978. usart->state = config;
  979. usart->tx_mode = RT_NULL;
  980. usart->rx_mode = RT_NULL;
  981. /* Allocate TX */
  982. dma_mode = RT_NULL;
  983. if (flag & RT_DEVICE_FLAG_DMA_TX)
  984. {
  985. usart->tx_mode = dma_mode = rt_malloc(sizeof(struct efm32_usart_dma_mode_t));
  986. if (dma_mode == RT_NULL)
  987. {
  988. usart_debug("USART%d err: no mem for DMA TX\n", usart->unit);
  989. break;
  990. }
  991. dma_mode->dma_channel = dmaChannel;
  992. }
  993. /* Allocate RX */
  994. if (flag & RT_DEVICE_FLAG_INT_RX)
  995. {
  996. usart->rx_mode = rt_malloc(sizeof(struct efm32_usart_int_mode_t));
  997. if (usart->rx_mode == RT_NULL)
  998. {
  999. usart_debug("USART%d err: no mem for INT RX\n", usart->unit);
  1000. break;
  1001. }
  1002. }
  1003. /* Initialization */
  1004. #if defined(UART_PRESENT)
  1005. if ((!(config & USART_STATE_ASYNC_ONLY) && (unitNumber >= USART_COUNT)) || \
  1006. ((config & USART_STATE_ASYNC_ONLY) && (unitNumber >= UART_COUNT)))
  1007. #else
  1008. if (unitNumber >= USART_COUNT)
  1009. #endif
  1010. {
  1011. break;
  1012. }
  1013. switch (unitNumber)
  1014. {
  1015. case 0:
  1016. #if defined(UART_PRESENT)
  1017. if (config & USART_STATE_ASYNC_ONLY)
  1018. {
  1019. usart->usart_device = UART0;
  1020. usartClock = (CMU_Clock_TypeDef)cmuClock_UART0;
  1021. txDmaSelect = DMAREQ_UART0_TXBL;
  1022. port_tx = AF_UART0_TX_PORT(location);
  1023. pin_tx = AF_UART0_TX_PIN(location);
  1024. port_rx = AF_UART0_RX_PORT(location);
  1025. pin_rx = AF_UART0_RX_PIN(location);
  1026. }
  1027. else
  1028. #endif
  1029. {
  1030. usart->usart_device = USART0;
  1031. usartClock = (CMU_Clock_TypeDef)cmuClock_USART0;
  1032. txDmaSelect = DMAREQ_USART0_TXBL;
  1033. port_tx = AF_USART0_TX_PORT(location);
  1034. pin_tx = AF_USART0_TX_PIN(location);
  1035. port_rx = AF_USART0_RX_PORT(location);
  1036. pin_rx = AF_USART0_RX_PIN(location);
  1037. port_clk = AF_USART0_CLK_PORT(location);
  1038. pin_clk = AF_USART0_CLK_PIN(location);
  1039. port_cs = AF_USART0_CS_PORT(location);
  1040. pin_cs = AF_USART0_CS_PIN(location);
  1041. }
  1042. break;
  1043. #if ((defined(USART_PRESENT) && (USART_COUNT > 1)) || \
  1044. (defined(UART_PRESENT) && (UART_COUNT > 1)))
  1045. case 1:
  1046. #if (defined(UART_PRESENT) && (UART_COUNT > 1))
  1047. if (config & USART_STATE_ASYNC_ONLY)
  1048. {
  1049. usart->usart_device = UART1;
  1050. usartClock = (CMU_Clock_TypeDef)cmuClock_UART1;
  1051. txDmaSelect = DMAREQ_UART1_TXBL;
  1052. port_tx = AF_UART1_TX_PORT(location);
  1053. pin_tx = AF_UART1_TX_PIN(location);
  1054. port_rx = AF_UART1_RX_PORT(location);
  1055. pin_rx = AF_UART1_RX_PIN(location);
  1056. }
  1057. else
  1058. #endif
  1059. {
  1060. usart->usart_device = USART1;
  1061. usartClock = (CMU_Clock_TypeDef)cmuClock_USART1;
  1062. txDmaSelect = DMAREQ_USART1_TXBL;
  1063. port_tx = AF_USART1_TX_PORT(location);
  1064. pin_tx = AF_USART1_TX_PIN(location);
  1065. port_rx = AF_USART1_RX_PORT(location);
  1066. pin_rx = AF_USART1_RX_PIN(location);
  1067. port_clk = AF_USART1_CLK_PORT(location);
  1068. pin_clk = AF_USART1_CLK_PIN(location);
  1069. port_cs = AF_USART1_CS_PORT(location);
  1070. pin_cs = AF_USART1_CS_PIN(location);
  1071. }
  1072. break;
  1073. #endif
  1074. #if ((defined(USART_PRESENT) && (USART_COUNT > 2)) || \
  1075. (defined(UART_PRESENT) && (UART_COUNT > 2)))
  1076. case 2:
  1077. #if (defined(UART_PRESENT) && (UART_COUNT > 2))
  1078. if (config & USART_STATE_ASYNC_ONLY)
  1079. {
  1080. usart->usart_device = UART2;
  1081. usartClock = (CMU_Clock_TypeDef)cmuClock_UART2;
  1082. txDmaSelect = DMAREQ_UART2_TXBL;
  1083. port_tx = AF_UART2_TX_PORT(location);
  1084. pin_tx = AF_UART2_TX_PIN(location);
  1085. port_rx = AF_UART2_RX_PORT(location);
  1086. pin_rx = AF_UART2_RX_PIN(location);
  1087. }
  1088. else
  1089. #endif
  1090. {
  1091. usart->usart_device = USART2;
  1092. usartClock = (CMU_Clock_TypeDef)cmuClock_USART2;
  1093. txDmaSelect = DMAREQ_USART2_TXBL;
  1094. port_tx = AF_USART2_TX_PORT(location);
  1095. pin_tx = AF_USART2_TX_PIN(location);
  1096. port_rx = AF_USART2_RX_PORT(location);
  1097. pin_rx = AF_USART2_RX_PIN(location);
  1098. port_clk = AF_USART2_CLK_PORT(location);
  1099. pin_clk = AF_USART2_CLK_PIN(location);
  1100. port_cs = AF_USART2_CS_PORT(location);
  1101. pin_cs = AF_USART2_CS_PIN(location);
  1102. }
  1103. break;
  1104. #endif
  1105. default:
  1106. break;
  1107. }
  1108. /* Enable USART clock */
  1109. CMU_ClockEnable(usartClock, true);
  1110. /* Config GPIO */
  1111. GPIO_PinModeSet(
  1112. port_tx,
  1113. pin_tx,
  1114. gpioModePushPull,
  1115. 0);
  1116. GPIO_PinModeSet(
  1117. port_rx,
  1118. pin_rx,
  1119. gpioModeInputPull,
  1120. 1);
  1121. if (config & USART_STATE_SYNC)
  1122. {
  1123. GPIO_PinModeSet(
  1124. port_clk,
  1125. pin_clk,
  1126. gpioModePushPull,
  1127. 0);
  1128. }
  1129. if (config & USART_STATE_AUTOCS)
  1130. {
  1131. GPIO_PinModeSet(
  1132. port_cs,
  1133. pin_cs,
  1134. gpioModePushPull,
  1135. 1);
  1136. }
  1137. /* Config interrupt and NVIC */
  1138. if (flag & RT_DEVICE_FLAG_INT_RX)
  1139. {
  1140. hook.type = efm32_irq_type_usart;
  1141. hook.unit = unitNumber * 2 + 1;
  1142. #if defined(UART_PRESENT)
  1143. if (config & USART_STATE_ASYNC_ONLY)
  1144. {
  1145. hook.unit += USART_COUNT * 2;
  1146. }
  1147. #endif
  1148. hook.cbFunc = rt_hw_usart_rx_isr;
  1149. hook.userPtr = device;
  1150. efm32_irq_hook_register(&hook);
  1151. }
  1152. /* Config DMA */
  1153. if (flag & RT_DEVICE_FLAG_DMA_TX)
  1154. {
  1155. DMA_CfgChannel_TypeDef chnlCfg;
  1156. DMA_CfgDescr_TypeDef descrCfg;
  1157. hook.type = efm32_irq_type_dma;
  1158. hook.unit = dmaChannel;
  1159. hook.cbFunc = rt_hw_usart_dma_tx_isr;
  1160. hook.userPtr = device;
  1161. efm32_irq_hook_register(&hook);
  1162. callback = (DMA_CB_TypeDef *)rt_malloc(sizeof(DMA_CB_TypeDef));
  1163. if (callback == RT_NULL)
  1164. {
  1165. usart_debug("USART%d err: no mem for callback\n", usart->unit);
  1166. break;
  1167. }
  1168. callback->cbFunc = DMA_IRQHandler_All;
  1169. callback->userPtr = RT_NULL;
  1170. callback->primary = 0;
  1171. /* Setting up DMA channel */
  1172. chnlCfg.highPri = false; /* Can't use with peripherals */
  1173. chnlCfg.enableInt = true; /* Interrupt for callback function */
  1174. chnlCfg.select = txDmaSelect;
  1175. chnlCfg.cb = callback;
  1176. DMA_CfgChannel(dmaChannel, &chnlCfg);
  1177. /* Setting up DMA channel descriptor */
  1178. descrCfg.dstInc = dmaDataIncNone;
  1179. descrCfg.srcInc = dmaDataInc1;
  1180. descrCfg.size = dmaDataSize1;
  1181. descrCfg.arbRate = dmaArbitrate1;
  1182. descrCfg.hprot = 0;
  1183. DMA_CfgDescr(dmaChannel, true, &descrCfg);
  1184. }
  1185. /* Init specified USART unit */
  1186. if (config & USART_STATE_SYNC)
  1187. {
  1188. USART_InitSync_TypeDef init_sync = USART_INITSYNC_DEFAULT;
  1189. init_sync.enable = usartEnable;
  1190. init_sync.refFreq = 0;
  1191. init_sync.baudrate = SPI_BAUDRATE;
  1192. if (config & USART_STATE_9BIT)
  1193. {
  1194. init_sync.databits = usartDatabits9;
  1195. }
  1196. else
  1197. {
  1198. init_sync.databits = usartDatabits8;
  1199. }
  1200. if (config & USART_STATE_MASTER)
  1201. {
  1202. init_sync.master = true;
  1203. }
  1204. else
  1205. {
  1206. init_sync.master = false;
  1207. }
  1208. init_sync.msbf = true;
  1209. switch (USART_CLK_MODE_GET(config))
  1210. {
  1211. case 0:
  1212. init_sync.clockMode = usartClockMode0;
  1213. break;
  1214. case 1:
  1215. init_sync.clockMode = usartClockMode1;
  1216. break;
  1217. case 2:
  1218. init_sync.clockMode = usartClockMode2;
  1219. break;
  1220. case 3:
  1221. init_sync.clockMode = usartClockMode3;
  1222. break;
  1223. }
  1224. USART_InitSync(usart->usart_device, &init_sync);
  1225. }
  1226. else
  1227. {
  1228. USART_InitAsync_TypeDef init_async = USART_INITASYNC_DEFAULT;
  1229. init_async.enable = usartEnable;
  1230. init_async.refFreq = 0;
  1231. init_async.baudrate = UART_BAUDRATE;
  1232. init_async.oversampling = USART_CTRL_OVS_X4;
  1233. init_async.databits = USART_FRAME_DATABITS_EIGHT;
  1234. init_async.parity = USART_FRAME_PARITY_NONE;
  1235. init_async.stopbits = USART_FRAME_STOPBITS_ONE;
  1236. USART_InitAsync(usart->usart_device, &init_async);
  1237. }
  1238. /* Enable RX and TX pins and set location */
  1239. usart->usart_device->ROUTE = USART_ROUTE_RXPEN | USART_ROUTE_TXPEN | \
  1240. (location << _USART_ROUTE_LOCATION_SHIFT);
  1241. if (config & USART_STATE_SYNC)
  1242. {
  1243. usart->usart_device->ROUTE |= USART_ROUTE_CLKPEN;
  1244. }
  1245. if (config & USART_STATE_AUTOCS)
  1246. {
  1247. usart->usart_device->ROUTE |= USART_ROUTE_CSPEN;
  1248. if (config & USART_STATE_MASTER)
  1249. {
  1250. usart->usart_device->CTRL |= USART_CTRL_AUTOCS;
  1251. }
  1252. }
  1253. /* Clear RX/TX buffers */
  1254. usart->usart_device->CMD = USART_CMD_CLEARRX | USART_CMD_CLEARTX;
  1255. return usart;
  1256. } while(0);
  1257. if (usart->rx_mode)
  1258. {
  1259. rt_free(usart->rx_mode);
  1260. }
  1261. if (usart->tx_mode)
  1262. {
  1263. rt_free(usart->tx_mode);
  1264. }
  1265. if (usart)
  1266. {
  1267. rt_free(usart);
  1268. }
  1269. if (callback)
  1270. {
  1271. rt_free(callback);
  1272. }
  1273. #if defined(UART_PRESENT)
  1274. if (config & USART_STATE_ASYNC_ONLY)
  1275. {
  1276. usart_debug("UART%d err: init failed!\n", unitNumber);
  1277. }
  1278. else
  1279. #endif
  1280. {
  1281. usart_debug("USART%d err: init failed!\n", unitNumber);
  1282. }
  1283. return RT_NULL;
  1284. }
  1285. /***************************************************************************//**
  1286. * @brief
  1287. * Initialize all USART module related hardware and register USART device to
  1288. * kernel
  1289. *
  1290. * @details
  1291. *
  1292. * @note
  1293. ******************************************************************************/
  1294. void rt_hw_usart_init(void)
  1295. {
  1296. struct efm32_usart_device_t *usart;
  1297. rt_uint32_t flag;
  1298. rt_uint8_t config;
  1299. do
  1300. {
  1301. #if (defined(USART_PRESENT) && defined(RT_USING_USART0))
  1302. config = 0x00;
  1303. flag = RT_DEVICE_FLAG_RDWR;
  1304. #ifdef RT_USART0_SYNC_MODE
  1305. config |= USART_STATE_SYNC;
  1306. config |= (RT_USART0_SYNC_MODE & SYNC_SETTING_MASK) << SYNC_SETTING_SHIFT;
  1307. #if (!((RT_USART0_SYNC_MODE << SYNC_SETTING_SHIFT) & USART_STATE_MASTER))
  1308. flag |= RT_DEVICE_FLAG_INT_RX;
  1309. #endif
  1310. #else
  1311. flag |= RT_DEVICE_FLAG_INT_RX;
  1312. #endif
  1313. #if (RT_CONSOLE_DEVICE == EFM_USART0)
  1314. config |= USART_STATE_CONSOLE;
  1315. flag |= RT_DEVICE_FLAG_STREAM;
  1316. #endif
  1317. #ifdef RT_USART0_USING_DMA
  1318. RT_ASSERT(RT_USART0_USING_DMA < DMA_CHAN_COUNT);
  1319. flag |= RT_DEVICE_FLAG_DMA_TX;
  1320. #else
  1321. #define RT_USART0_USING_DMA EFM32_NO_DMA
  1322. #endif
  1323. /* Initialize and Register usart0 */
  1324. if ((usart = rt_hw_usart_unit_init(
  1325. &usart0_device,
  1326. 0,
  1327. RT_USING_USART0,
  1328. flag,
  1329. RT_USART0_USING_DMA,
  1330. config)) != RT_NULL)
  1331. {
  1332. rt_hw_usart_register(&usart0_device, RT_USART0_NAME, flag, usart);
  1333. }
  1334. else
  1335. {
  1336. break;
  1337. }
  1338. /* Initialize lock for usart0 */
  1339. usart->lock = &usart0_lock;
  1340. if (rt_sem_init(usart->lock, RT_USART0_NAME, 1, RT_IPC_FLAG_FIFO) != RT_EOK)
  1341. {
  1342. break;
  1343. }
  1344. #endif
  1345. #if (defined(USART_PRESENT) && (USART_COUNT > 1) && defined(RT_USING_USART1))
  1346. config = 0x00;
  1347. flag = RT_DEVICE_FLAG_RDWR;
  1348. #ifdef RT_USART1_SYNC_MODE
  1349. config |= USART_STATE_SYNC;
  1350. config |= (RT_USART1_SYNC_MODE & SYNC_SETTING_MASK) << SYNC_SETTING_SHIFT;
  1351. #if (!((RT_USART1_SYNC_MODE << SYNC_SETTING_SHIFT) & USART_STATE_MASTER))
  1352. flag |= RT_DEVICE_FLAG_INT_RX;
  1353. #endif
  1354. #else
  1355. flag |= RT_DEVICE_FLAG_INT_RX;
  1356. #endif
  1357. #if (RT_CONSOLE_DEVICE == EFM_USART1)
  1358. config |= USART_STATE_CONSOLE;
  1359. flag |= RT_DEVICE_FLAG_STREAM;
  1360. #endif
  1361. #ifdef RT_USART1_USING_DMA
  1362. RT_ASSERT(RT_USART1_USING_DMA < DMA_CHAN_COUNT);
  1363. flag |= RT_DEVICE_FLAG_DMA_TX;
  1364. #else
  1365. #define RT_USART1_USING_DMA EFM32_NO_DMA
  1366. #endif
  1367. /* Initialize and Register usart1 */
  1368. if ((usart = rt_hw_usart_unit_init(
  1369. &usart1_device,
  1370. 1,
  1371. RT_USING_USART1,
  1372. flag,
  1373. RT_USART1_USING_DMA,
  1374. config)) != RT_NULL)
  1375. {
  1376. rt_hw_usart_register(&usart1_device, RT_USART1_NAME, flag, usart);
  1377. }
  1378. else
  1379. {
  1380. break;
  1381. }
  1382. /* Initialize lock for usart1 */
  1383. usart->lock = &usart1_lock;
  1384. if (rt_sem_init(usart->lock, RT_USART1_NAME, 1, RT_IPC_FLAG_FIFO) != RT_EOK)
  1385. {
  1386. break;
  1387. }
  1388. #endif
  1389. #if (defined(USART_PRESENT) && (USART_COUNT > 2) && defined(RT_USING_USART2))
  1390. config = 0x00;
  1391. flag = RT_DEVICE_FLAG_RDWR;
  1392. #ifdef RT_USART2_SYNC_MODE
  1393. config |= USART_STATE_SYNC;
  1394. config |= (RT_USART1_SYNC_MODE & SYNC_SETTING_MASK) << SYNC_SETTING_SHIFT;
  1395. #if (!((RT_USART2_SYNC_MODE << SYNC_SETTING_SHIFT) & USART_STATE_MASTER))
  1396. flag |= RT_DEVICE_FLAG_INT_RX;
  1397. #endif
  1398. #else
  1399. flag |= RT_DEVICE_FLAG_INT_RX;
  1400. #endif
  1401. #if (RT_CONSOLE_DEVICE == EFM_USART2)
  1402. config |= USART_STATE_CONSOLE;
  1403. flag |= RT_DEVICE_FLAG_STREAM;
  1404. #endif
  1405. #ifdef RT_USART2_USING_DMA
  1406. RT_ASSERT(RT_USART2_USING_DMA < DMA_CHAN_COUNT);
  1407. flag |= RT_DEVICE_FLAG_DMA_TX;
  1408. #else
  1409. #define RT_USART2_USING_DMA EFM32_NO_DMA
  1410. #endif
  1411. /* Initialize and Register usart2 */
  1412. if ((usart = rt_hw_usart_unit_init(
  1413. &usart2_device,
  1414. 2,
  1415. RT_USING_USART2,
  1416. flag,
  1417. RT_USART2_USING_DMA,
  1418. config)) != RT_NULL)
  1419. {
  1420. rt_hw_usart_register(&usart2_device, RT_USART2_NAME, flag, usart);
  1421. }
  1422. else
  1423. {
  1424. break;
  1425. }
  1426. /* Initialize lock for usart2 */
  1427. usart->lock = &usart2_lock;
  1428. if (rt_sem_init(usart->lock, RT_USART2_NAME, 1, RT_IPC_FLAG_FIFO) != RT_EOK)
  1429. {
  1430. break;
  1431. }
  1432. #endif
  1433. #if (defined(UART_PRESENT) && defined(RT_USING_UART0))
  1434. config = USART_STATE_ASYNC_ONLY;
  1435. flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX;
  1436. #if (RT_CONSOLE_DEVICE == EFM_UART0)
  1437. config |= USART_STATE_CONSOLE;
  1438. flag |= RT_DEVICE_FLAG_STREAM;
  1439. #endif
  1440. #ifdef RT_UART0_USING_DMA
  1441. RT_ASSERT(RT_UART0_USING_DMA < DMA_CHAN_COUNT);
  1442. flag |= RT_DEVICE_FLAG_DMA_TX;
  1443. #else
  1444. #define RT_UART0_USING_DMA EFM32_NO_DMA
  1445. #endif
  1446. /* Initialize and Register uart0 */
  1447. if ((usart = rt_hw_usart_unit_init(
  1448. &uart0_device,
  1449. 0,
  1450. RT_USING_UART0,
  1451. flag,
  1452. RT_UART0_USING_DMA,
  1453. config)) != RT_NULL)
  1454. {
  1455. rt_hw_usart_register(&uart0_device, RT_UART0_NAME, flag, usart);
  1456. }
  1457. else
  1458. {
  1459. break;
  1460. }
  1461. /* Initialize lock for uart0 */
  1462. usart->lock = &uart0_lock;
  1463. if (rt_sem_init(usart->lock, RT_UART0_NAME, 1, RT_IPC_FLAG_FIFO) != RT_EOK)
  1464. {
  1465. break;
  1466. }
  1467. #endif
  1468. #if (defined(UART_PRESENT) && (UART_COUNT > 1) && defined(RT_USING_UART1))
  1469. config = USART_STATE_ASYNC_ONLY;
  1470. flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX;
  1471. #if (RT_CONSOLE_DEVICE == EFM_UART1)
  1472. config |= USART_STATE_CONSOLE;
  1473. flag |= RT_DEVICE_FLAG_STREAM;
  1474. #endif
  1475. #ifdef RT_UART1_USING_DMA
  1476. RT_ASSERT(RT_UART1_USING_DMA < DMA_CHAN_COUNT);
  1477. flag |= RT_DEVICE_FLAG_DMA_TX;
  1478. #else
  1479. #define RT_UART1_USING_DMA EFM32_NO_DMA
  1480. #endif
  1481. /* Initialize and Register uart1 */
  1482. if ((usart = rt_hw_usart_unit_init(
  1483. &uart1_device,
  1484. 1,
  1485. RT_USING_UART1,
  1486. flag,
  1487. RT_UART1_USING_DMA,
  1488. config)) != RT_NULL)
  1489. {
  1490. rt_hw_usart_register(&uart1_device, RT_UART1_NAME, flag, usart);
  1491. }
  1492. else
  1493. {
  1494. break;
  1495. }
  1496. /* Initialize lock for uart1 */
  1497. usart->lock = &uart1_lock;
  1498. if (rt_sem_init(usart->lock, RT_UART1_NAME, 1, RT_IPC_FLAG_FIFO) != RT_EOK)
  1499. {
  1500. break;
  1501. }
  1502. #endif
  1503. usart_debug("USART: H/W init OK!\n");
  1504. return;
  1505. } while (0);
  1506. rt_kprintf("USART: H/W init failed!\n");
  1507. }
  1508. #endif /* (defined(RT_USING_USART0) || defined(RT_USING_USART1) || \
  1509. defined(RT_USING_USART2) || defined(RT_USING_UART0) || \
  1510. defined(RT_USING_UART1)) */
  1511. /***************************************************************************//**
  1512. * @}
  1513. ******************************************************************************/