efm32_ebi.h 31 KB

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  1. /***************************************************************************//**
  2. * @file
  3. * @brief External Bus Iterface (EBI) peripheral API for EFM32
  4. * @author Energy Micro AS
  5. * @version 2.3.2
  6. *******************************************************************************
  7. * @section License
  8. * <b>(C) Copyright 2010 Energy Micro AS, http://www.energymicro.com</b>
  9. *******************************************************************************
  10. *
  11. * This source code is the property of Energy Micro AS. The source and compiled
  12. * code may only be used on Energy Micro "EFM32" microcontrollers.
  13. *
  14. * This copyright notice may not be removed from the source code nor changed.
  15. *
  16. * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Energy Micro AS has no
  17. * obligation to support this Software. Energy Micro AS is providing the
  18. * Software "AS IS", with no express or implied warranties of any kind,
  19. * including, but not limited to, any implied warranties of merchantability
  20. * or fitness for any particular purpose or warranties against infringement
  21. * of any proprietary rights of a third party.
  22. *
  23. * Energy Micro AS will not be liable for any consequential, incidental, or
  24. * special damages, or any other relief, or for any claim by any third party,
  25. * arising from your use of this Software.
  26. *
  27. ******************************************************************************/
  28. #ifndef __EFM32_EBI_H
  29. #define __EFM32_EBI_H
  30. #include "efm32.h"
  31. #if defined(EBI_COUNT) && (EBI_COUNT > 0)
  32. #include "efm32_assert.h"
  33. #include <stdint.h>
  34. #include <stdbool.h>
  35. #ifdef __cplusplus
  36. extern "C" {
  37. #endif
  38. /***************************************************************************//**
  39. * @addtogroup EFM32_Library
  40. * @{
  41. ******************************************************************************/
  42. /***************************************************************************//**
  43. * @addtogroup EBI
  44. * @{
  45. ******************************************************************************/
  46. /***************************************************************************//**
  47. * @verbatim
  48. *
  49. * --------- ---------
  50. * | EBI | /| |\ | Ext. |
  51. * | | / --------- \ | Async |
  52. * |(EFM32)| \ --------- / | Device|
  53. * | | \| |/ | |
  54. * --------- ---------
  55. * Parallel interface
  56. *
  57. * @endverbatim
  58. ******************************************************************************/
  59. /*******************************************************************************
  60. ******************************* DEFINES ***********************************
  61. ******************************************************************************/
  62. #define EBI_BANK0 (uint32_t)(1 << 1) /**< EBI address bank 0 */
  63. #define EBI_BANK1 (uint32_t)(1 << 2) /**< EBI address bank 1 */
  64. #define EBI_BANK2 (uint32_t)(1 << 3) /**< EBI address bank 2 */
  65. #define EBI_BANK3 (uint32_t)(1 << 4) /**< EBI address bank 3 */
  66. #define EBI_CS0 (uint32_t)(1 << 1) /**< EBI chip select line 0 */
  67. #define EBI_CS1 (uint32_t)(1 << 2) /**< EBI chip select line 1 */
  68. #define EBI_CS2 (uint32_t)(1 << 3) /**< EBI chip select line 2 */
  69. #define EBI_CS3 (uint32_t)(1 << 4) /**< EBI chip select line 3 */
  70. /*******************************************************************************
  71. ******************************** ENUMS ************************************
  72. ******************************************************************************/
  73. /** EBI Mode of operation */
  74. typedef enum
  75. {
  76. /** 8 data bits, 8 address bits */
  77. ebiModeD8A8 = EBI_CTRL_MODE_D8A8,
  78. /** 16 data bits, 16 address bits, using address latch enable */
  79. ebiModeD16A16ALE = EBI_CTRL_MODE_D16A16ALE,
  80. /** 8 data bits, 24 address bits, using address latch enable */
  81. ebiModeD8A24ALE = EBI_CTRL_MODE_D8A24ALE,
  82. /** Mode D16 */
  83. #if defined(_EFM32_GIANT_FAMILY)
  84. ebiModeD16 = EBI_CTRL_MODE_D16,
  85. #endif
  86. } EBI_Mode_TypeDef;
  87. /** EBI Polarity configuration */
  88. typedef enum
  89. {
  90. /** Active Low */
  91. ebiActiveLow = 0,
  92. /** Active High */
  93. ebiActiveHigh = 1
  94. } EBI_Polarity_TypeDef;
  95. /** EBI Pin Line types */
  96. typedef enum
  97. {
  98. /** Address Ready line */
  99. ebiLineARDY,
  100. /** Address Latch Enable line */
  101. ebiLineALE,
  102. /** Write Enable line */
  103. ebiLineWE,
  104. /** Read Enable line */
  105. ebiLineRE,
  106. /** Chip Select line */
  107. ebiLineCS,
  108. #if defined(_EFM32_GIANT_FAMILY)
  109. /** BL line */
  110. ebiLineBL,
  111. #endif
  112. #if defined(_EFM32_GIANT_FAMILY)
  113. /** TFT VSYNC line */
  114. ebiLineTFTVSync,
  115. /** TFT HSYNC line */
  116. ebiLineTFTHSync,
  117. /** TFT Data enable line */
  118. ebiLineTFTDataEn,
  119. /** TFT DCLK line */
  120. ebiLineTFTDClk,
  121. /** TFT Chip select line */
  122. ebiLineTFTCS,
  123. #endif
  124. } EBI_Line_TypeDef;
  125. #if defined(_EFM32_GIANT_FAMILY)
  126. /** Address Pin Enable, lower limit - lower range of pins to enable */
  127. typedef enum
  128. {
  129. /** Adress lines EBI_A[0] and upwards are enabled by APEN */
  130. ebiALowA0 = EBI_ROUTE_ALB_A0,
  131. /** Adress lines EBI_A[8] and upwards are enabled by APEN */
  132. ebiALowA8 = EBI_ROUTE_ALB_A8,
  133. /** Adress lines EBI_A[16] and upwards are enabled by APEN */
  134. ebiALowA16 = EBI_ROUTE_ALB_A16,
  135. /** Adress lines EBI_A[24] and upwards are enabled by APEN */
  136. ebiALowA24 = EBI_ROUTE_ALB_A24,
  137. } EBI_ALow_TypeDef;
  138. /** Adress Pin Enable, high limit - higher limit of pins to enable */
  139. typedef enum
  140. {
  141. /** All EBI_A pins are disabled */
  142. ebiAHighA0 = EBI_ROUTE_APEN_A0,
  143. /** All EBI_A[4:ALow] are enabled */
  144. ebiAHighA5 = EBI_ROUTE_APEN_A5,
  145. /** All EBI_A[5:ALow] are enabled */
  146. ebiAHighA6 = EBI_ROUTE_APEN_A6,
  147. /** All EBI_A[6:ALow] are enabled */
  148. ebiAHighA7 = EBI_ROUTE_APEN_A7,
  149. /** All EBI_A[7:ALow] are enabled */
  150. ebiAHighA8 = EBI_ROUTE_APEN_A8,
  151. /** All EBI_A[8:ALow] are enabled */
  152. ebiAHighA9 = EBI_ROUTE_APEN_A9,
  153. /** All EBI_A[9:ALow] are enabled */
  154. ebiAHighA10 = EBI_ROUTE_APEN_A10,
  155. /** All EBI_A[10:ALow] are enabled */
  156. ebiAHighA11 = EBI_ROUTE_APEN_A11,
  157. /** All EBI_A[11:ALow] are enabled */
  158. ebiAHighA12 = EBI_ROUTE_APEN_A12,
  159. /** All EBI_A[12:ALow] are enabled */
  160. ebiAHighA13 = EBI_ROUTE_APEN_A13,
  161. /** All EBI_A[13:ALow] are enabled */
  162. ebiAHighA14 = EBI_ROUTE_APEN_A14,
  163. /** All EBI_A[14:ALow] are enabled */
  164. ebiAHighA15 = EBI_ROUTE_APEN_A15,
  165. /** All EBI_A[15:ALow] are enabled */
  166. ebiAHighA16 = EBI_ROUTE_APEN_A16,
  167. /** All EBI_A[16:ALow] are enabled */
  168. ebiAHighA17 = EBI_ROUTE_APEN_A17,
  169. /** All EBI_A[17:ALow] are enabled */
  170. ebiAHighA18 = EBI_ROUTE_APEN_A18,
  171. /** All EBI_A[18:ALow] are enabled */
  172. ebiAHighA19 = EBI_ROUTE_APEN_A19,
  173. /** All EBI_A[19:ALow] are enabled */
  174. ebiAHighA20 = EBI_ROUTE_APEN_A20,
  175. /** All EBI_A[20:ALow] are enabled */
  176. ebiAHighA21 = EBI_ROUTE_APEN_A21,
  177. /** All EBI_A[21:ALow] are enabled */
  178. ebiAHighA22 = EBI_ROUTE_APEN_A22,
  179. /** All EBI_A[22:ALow] are enabled */
  180. ebiAHighA23 = EBI_ROUTE_APEN_A23,
  181. /** All EBI_A[23:ALow] are enabled */
  182. ebiAHighA24 = EBI_ROUTE_APEN_A24,
  183. /** All EBI_A[24:ALow] are enabled */
  184. ebiAHighA25 = EBI_ROUTE_APEN_A25,
  185. /** All EBI_A[25:ALow] are enabled */
  186. ebiAHighA26 = EBI_ROUTE_APEN_A26,
  187. /** All EBI_A[26:ALow] are enabled */
  188. ebiAHighA27 = EBI_ROUTE_APEN_A27,
  189. /** All EBI_A[27:ALow] are enabled */
  190. ebiAHighA28 = EBI_ROUTE_APEN_A28,
  191. } EBI_AHigh_TypeDef;
  192. /** EBI I/O Alternate Pin Location */
  193. typedef enum {
  194. /** EBI PIN I/O Location 0 */
  195. ebiLocation0 = EBI_ROUTE_LOCATION_LOC0,
  196. /** EBI PIN I/O Location 1 */
  197. ebiLocation1 = EBI_ROUTE_LOCATION_LOC1,
  198. /** EBI PIN I/O Location 2 */
  199. ebiLocation2 = EBI_ROUTE_LOCATION_LOC2,
  200. /** EBI PIN I/O Location 3 */
  201. // ebiLocation3 = EBI_ROUTE_LOCATION_LOC3,
  202. } EBI_Location_TypeDef;
  203. #endif
  204. /* TFT support */
  205. #if defined(_EFM32_GIANT_FAMILY)
  206. /** EBI TFT Graphics Bank Select */
  207. typedef enum
  208. {
  209. /** Memory BANK0 contains frame buffer */
  210. ebiTFTBank0 = EBI_TFTCTRL_BANKSEL_BANK0,
  211. /** Memory BANK1 contains frame buffer */
  212. ebiTFTBank1 = EBI_TFTCTRL_BANKSEL_BANK1,
  213. /** Memory BANK2 contains frame buffer */
  214. ebiTFTBank2 = EBI_TFTCTRL_BANKSEL_BANK2,
  215. /** Memory BANK3 contains frame buffer */
  216. ebiTFTBank3 = EBI_TFTCTRL_BANKSEL_BANK3
  217. } EBI_TFTBank_TypeDef;
  218. /** Masking and Alpha blending source color*/
  219. typedef enum
  220. {
  221. /** Use memory as source color for masking/alpha blending */
  222. ebiTFTColorSrcMem = EBI_TFTCTRL_COLOR1SRC_MEM,
  223. /** Use PIXEL1 register as source color for masking/alpha blending */
  224. ebiTFTColorSrcPixel1 = EBI_TFTCTRL_COLOR1SRC_PIXEL1,
  225. } EBI_TFTColorSrc_TypeDef;
  226. /** Bus Data Interleave Mode */
  227. typedef enum
  228. {
  229. /** Unlimited interleaved accesses per EBI_DCLK period. Can cause jitter */
  230. ebiTFTInterleaveUnlimited = EBI_TFTCTRL_INTERLEAVE_UNLIMITED,
  231. /** Allow 1 interleaved access per EBI_DCLK period */
  232. ebiTFTInterleaveOnePerDClk = EBI_TFTCTRL_INTERLEAVE_ONEPERDCLK,
  233. /** Only allow accesses during porch periods */
  234. ebiTFTInterleavePorch = EBI_TFTCTRL_INTERLEAVE_PORCH,
  235. } EBI_TFTInterleave_TypeDef;
  236. /** Control frame base pointer copy */
  237. typedef enum
  238. {
  239. /** Trigger update of frame buffer pointer on vertical sync */
  240. ebiTFTFrameBufTriggerVSync = EBI_TFTCTRL_FBCTRIG_VSYNC,
  241. /** Trigger update of frame buffer pointer on horizontal sync */
  242. ebiTFTFrameBufTriggerHSync = EBI_TFTCTRL_FBCTRIG_HSYNC,
  243. } EBI_TFTFrameBufTrigger_TypeDef;
  244. /** Control of mask and alpha blending mode */
  245. typedef enum
  246. {
  247. /** Masking and blending are disabled */
  248. ebiTFTMBDisabled = EBI_TFTCTRL_MASKBLEND_DISABLED,
  249. /** Internal masking */
  250. ebiTFTMBIMask = EBI_TFTCTRL_MASKBLEND_IMASK,
  251. /** Internal alpha blending */
  252. ebiTFTMBIAlpha = EBI_TFTCTRL_MASKBLEND_IALPHA,
  253. /** Internal masking and alpha blending are enabled */
  254. ebiTFTMBIMaskAlpha = EBI_TFTCTRL_MASKBLEND_IMASKIALPHA,
  255. /** External masking */
  256. ebiTFTMBEMask = EBI_TFTCTRL_MASKBLEND_EMASK,
  257. /** External alpha blending */
  258. ebiTFTMBEAlpha = EBI_TFTCTRL_MASKBLEND_EALPHA,
  259. /** External masking and alpha blending */
  260. ebiTFTMBEMaskAlpha = EBI_TFTCTRL_MASKBLEND_EMASKEALPHA,
  261. } EBI_TFTMaskBlend_TypeDef;
  262. /** TFT Direct Drive mode */
  263. typedef enum
  264. {
  265. /** Disabled */
  266. ebiTFTDDModeDisabled = EBI_TFTCTRL_DD_DISABLED,
  267. /** Direct Drive from internal memory */
  268. ebiTFTDDModeInternal = EBI_TFTCTRL_DD_INTERNAL,
  269. /** Direct Drive from external memory */
  270. ebiTFTDDModeExternal = EBI_TFTCTRL_DD_EXTERNAL,
  271. } EBI_TFTDDMode_TypeDef;
  272. /** TFT Data Increment Width */
  273. typedef enum
  274. {
  275. /** Pixel increments are 1 byte at a time */
  276. ebiTFTWidthByte = EBI_TFTCTRL_WIDTH_BYTE,
  277. /** Pixel increments are 2 bytes (half word) */
  278. ebiTFTWidthHalfWord = EBI_TFTCTRL_WIDTH_HALFWORD,
  279. } EBI_TFTWidth_TypeDef;
  280. #endif
  281. /*******************************************************************************
  282. ******************************* STRUCTS ***********************************
  283. ******************************************************************************/
  284. /** EBI Initialization structure */
  285. typedef struct
  286. {
  287. /** EBI operation mode, data and address limits */
  288. EBI_Mode_TypeDef mode;
  289. /** Address Ready pin polarity, active high or low */
  290. EBI_Polarity_TypeDef ardyPolarity;
  291. /** Address Latch Enable pin polarity, active high or low */
  292. EBI_Polarity_TypeDef alePolarity;
  293. /** Write Enable pin polarity, active high or low */
  294. EBI_Polarity_TypeDef wePolarity;
  295. /** Read Enable pin polarity, active high or low */
  296. EBI_Polarity_TypeDef rePolarity;
  297. /** Chip Select pin polarity, active high or low */
  298. EBI_Polarity_TypeDef csPolarity;
  299. #if defined(_EFM32_GIANT_FAMILY)
  300. /** Byte Lane pin polaritym, active high or low */
  301. EBI_Polarity_TypeDef blPolarity;
  302. /** Flag to enable or disable Byte Lane support */
  303. bool blEnable;
  304. /** Flag to enable or disable idle state insertion between transfers */
  305. bool noIdle;
  306. #endif
  307. /** Flag to enable or disable Address Ready support */
  308. bool ardyEnable;
  309. /** Set to turn off 32 cycle timeout ability */
  310. bool ardyDisableTimeout;
  311. /** Mask of flags which selects address banks to configure EBI_BANK<0-3> */
  312. uint32_t banks;
  313. /** Mask of flags which selects chip select lines to configure EBI_CS<0-3> */
  314. uint32_t csLines;
  315. /** Number of cycles address is held after Adress Latch Enable is asserted */
  316. int addrSetupCycles;
  317. /** Number of cycles address is driven onto the ADDRDAT bus before ALE is asserted */
  318. int addrHoldCycles;
  319. #if defined(_EFM32_GIANT_FAMILY)
  320. /** Enable or disables half cycle duration of the ALE strobe in the last address setup cycle */
  321. bool addrHalfALE;
  322. #endif
  323. /** Number of cycles for address setup before REn is asserted */
  324. int readSetupCycles;
  325. /** Number of cycles REn is held active */
  326. int readStrobeCycles;
  327. /** Number of cycles CSn is held active after REn is deasserted */
  328. int readHoldCycles;
  329. #if defined(_EFM32_GIANT_FAMILY)
  330. /** Enable or disable page mode reads */
  331. bool readPageMode;
  332. /** Enables or disable prefetching from sequential addresses */
  333. bool readPrefetch;
  334. /** Enabled or disables half cycle duration of the REn signal in the last strobe cycle */
  335. bool readHalfRE;
  336. #endif
  337. /** Number of cycles for address setup before WEn is asserted */
  338. int writeSetupCycles;
  339. /** Number of cycles WEn is held active */
  340. int writeStrobeCycles;
  341. /** Number of cycles CSn is held active after WEn is deasserted */
  342. int writeHoldCycles;
  343. #if defined(_EFM32_GIANT_FAMILY)
  344. /** Enable or disable the write buffer */
  345. bool writeBufferDisable;
  346. /** Enables or disables half cycle duration of the WEn signal in the last strobe cycle */
  347. bool writeHalfWE;
  348. /** Lower address pin limit to enable */
  349. EBI_ALow_TypeDef aLow;
  350. /** High address pin limit to enable */
  351. EBI_AHigh_TypeDef aHigh;
  352. /** Pin Location */
  353. EBI_Location_TypeDef location;
  354. #endif
  355. /** Flag, if EBI should be enabled after configuration */
  356. bool enable;
  357. } EBI_Init_TypeDef;
  358. /** Default config for EBI init structures */
  359. #if defined(_EFM32_GIANT_FAMILY)
  360. #define EBI_INIT_DEFAULT \
  361. { ebiModeD8A8, /* 8 bit address, 8 bit data */ \
  362. ebiActiveLow, /* ARDY polarity */ \
  363. ebiActiveLow, /* ALE polarity */ \
  364. ebiActiveLow, /* WE polarity */ \
  365. ebiActiveLow, /* RE polarity */ \
  366. ebiActiveLow, /* CS polarity */ \
  367. ebiActiveLow, /* BL polarity */ \
  368. false, /* enable BL */ \
  369. false, /* enable NOIDLE */ \
  370. false, /* enable ARDY */ \
  371. false, /* don't disable ARDY timeout */ \
  372. EBI_BANK0, /* enable bank 0 */ \
  373. EBI_CS0, /* enable chip select 0 */ \
  374. 0, /* addr setup cycles */ \
  375. 1, /* addr hold cycles */ \
  376. false, /* do not enable half cycle ALE strobe */ \
  377. 0, /* read setup cycles */ \
  378. 0, /* read strobe cycles */ \
  379. 0, /* read hold cycles */ \
  380. false, /* disable page mode */ \
  381. false, /* disable prefetch */ \
  382. false, /* do not enable half cycle REn strobe */ \
  383. 0, /* write setup cycles */ \
  384. 0, /* write strobe cycles */ \
  385. 1, /* write hold cycles */ \
  386. false, /* do not disable the write buffer */ \
  387. false, /* do not enable halc cycle WEn strobe */ \
  388. ebiALowA0, /* ALB - Low bound, address lines */ \
  389. ebiAHighA0, /* APEN - High bound, address lines */ \
  390. ebiLocation0, /* Use Location 0 */ \
  391. true, /* enable EBI */ \
  392. }
  393. #else
  394. #define EBI_INIT_DEFAULT \
  395. { ebiModeD8A8, /* 8 bit address, 8 bit data */ \
  396. ebiActiveLow, /* ARDY polarity */ \
  397. ebiActiveLow, /* ALE polarity */ \
  398. ebiActiveLow, /* WE polarity */ \
  399. ebiActiveLow, /* RE polarity */ \
  400. ebiActiveLow, /* CS polarity */ \
  401. false, /* enable ARDY */ \
  402. false, /* don't disable ARDY timeout */ \
  403. EBI_BANK0, /* enable bank 0 */ \
  404. EBI_CS0, /* enable chip select 0 */ \
  405. 0, /* addr setup cycles */ \
  406. 1, /* addr hold cycles */ \
  407. 0, /* read setup cycles */ \
  408. 0, /* read strobe cycles */ \
  409. 0, /* read hold cycles */ \
  410. 0, /* write setup cycles */ \
  411. 0, /* write strobe cycles */ \
  412. 1, /* write hold cycles */ \
  413. true, /* enable EBI */ \
  414. }
  415. #endif
  416. #if defined(_EFM32_GIANT_FAMILY)
  417. /** TFT Initialization structure */
  418. typedef struct
  419. {
  420. /** External memory bank for driving display */
  421. EBI_TFTBank_TypeDef bank;
  422. /** Width */
  423. EBI_TFTWidth_TypeDef width;
  424. /** Color source for masking and alpha blending */
  425. EBI_TFTColorSrc_TypeDef colSrc;
  426. /** Bus Interleave mode */
  427. EBI_TFTInterleave_TypeDef interleave;
  428. /** Trigger for updating frame buffer pointer */
  429. EBI_TFTFrameBufTrigger_TypeDef fbTrigger;
  430. /** Drive DCLK from negative clock edge of internal clock */
  431. bool shiftDClk;
  432. /** Masking and alpha blending mode */
  433. EBI_TFTMaskBlend_TypeDef maskBlend;
  434. /** TFT Direct Drive mode */
  435. EBI_TFTDDMode_TypeDef driveMode;
  436. /** TFT Polarity for Chip Select (CS) Line */
  437. EBI_Polarity_TypeDef csPolarity;
  438. /** TFT Polarity for Data Clock (DCLK) Line */
  439. EBI_Polarity_TypeDef dclkPolarity;
  440. /** TFT Polarity for Data Enable (DATAEN) Line */
  441. EBI_Polarity_TypeDef dataenPolarity;
  442. /** TFT Polarity for Horizontal Sync (HSYNC) Line */
  443. EBI_Polarity_TypeDef hsyncPolarity;
  444. /** TFT Polarity for Vertical Sync (VSYNC) Line */
  445. EBI_Polarity_TypeDef vsyncPolarity;
  446. /** Horizontal size in pixels */
  447. int hsize;
  448. /** Horizontal Front Porch Size */
  449. int hPorchFront;
  450. /** Horizontal Back Porch Size */
  451. int hPorchBack;
  452. /** Horizontal Synchronization Pulse Width */
  453. int hPulseWidth;
  454. /** Vertical size in pixels */
  455. int vsize;
  456. /** Vertical Front Porch Size */
  457. int vPorchFront;
  458. /** Vertical Back Porch Size */
  459. int vPorchBack;
  460. /** Vertical Synchronization Pulse Width */
  461. int vPulseWidth;
  462. /** TFT Frame Buffer address, offset to EBI bank base address */
  463. uint32_t addressOffset;
  464. /** TFT DCLK period in internal cycles */
  465. int dclkPeriod;
  466. /** Starting position of External Direct Drive relative to DCLK inactive edge */
  467. int startPosition;
  468. /** Number of cycles RGB data is driven before active edge of DCLK */
  469. int setupCycles;
  470. /** Number of cycles RGB data is held after active edge of DCLK */
  471. int holdCycles;
  472. } EBI_TFTInit_TypeDef;
  473. #define EBI_TFTINIT_DEFAULT \
  474. { ebiTFTBank0, /* Select EBI Bank 0 */ \
  475. ebiTFTWidthHalfWord, /* Select 2-byte increments */ \
  476. ebiTFTColorSrcMem, /* Use memory as source for mask/blending */ \
  477. ebiTFTInterleaveUnlimited, /* Unlimited interleaved accesses */ \
  478. ebiTFTFrameBufTriggerVSync, /* VSYNC as frame buffer update trigger */ \
  479. false, /* Drive DCLK from negative edge of internal clock */ \
  480. ebiTFTMBDisabled, /* No masking and alpha blending enabled */ \
  481. ebiTFTDDModeExternal, /* Drive from external memory */ \
  482. ebiActiveLow, /* CS Active Low polarity */ \
  483. ebiActiveLow, /* DCLK Active Low polarity */ \
  484. ebiActiveLow, /* DATAEN Active Low polarity */ \
  485. ebiActiveLow, /* HSYNC Active Low polarity */ \
  486. ebiActiveLow, /* VSYNC Active Low polarity */ \
  487. 320, /* Horizontal size in pixels */ \
  488. 1, /* Horizontal Front Porch */ \
  489. 29, /* Horizontal Back Porch */ \
  490. 2, /* Horizontal Synchronization Pulse Width */ \
  491. 240, /* Vertical size in pixels */ \
  492. 1, /* Vertical Front Porch */ \
  493. 4, /* Vertical Back Porch */ \
  494. 2, /* Vertical Synchronization Pulse Width */ \
  495. 0x0000, /* Address offset to EBI memory base */ \
  496. 5, /* DCLK Period */ \
  497. 2, /* DCLK Start */ \
  498. 1, /* DCLK Setup cycles */ \
  499. 1, /* DCLK Hold cycles */ \
  500. }
  501. #endif
  502. /*******************************************************************************
  503. ***************************** PROTOTYPES **********************************
  504. ******************************************************************************/
  505. void EBI_Init(const EBI_Init_TypeDef *ebiInit);
  506. void EBI_Disable(void);
  507. uint32_t EBI_BankAddress(uint32_t bank);
  508. void EBI_BankEnable(uint32_t banks, bool enable);
  509. #if defined(_EFM32_GIANT_FAMILY)
  510. void EBI_TFTInit(const EBI_TFTInit_TypeDef *ebiTFTInit);
  511. void EBI_TFTSizeSet(uint32_t horizontal, uint32_t vertical);
  512. void EBI_TFTHPorchSet(int front, int back, int pulseWidth);
  513. void EBI_TFTVPorchSet(int front, int back, int pulseWidth);
  514. void EBI_TFTTimingSet(int dclkPeriod, int start, int setup, int hold);
  515. #endif
  516. #if defined(_EFM32_GIANT_FAMILY)
  517. /* This functionality is only available on devices with independent timing support */
  518. void EBI_BankReadTimingSet(uint32_t bank, int setupCycles, int strobeCycles, int holdCycles);
  519. void EBI_BankReadTimingConfig(uint32_t bank, bool pageMode, bool prefetch, bool halfRE);
  520. void EBI_BankWriteTimingSet(uint32_t bank, int setupCycles, int strobeCycles, int holdCycles);
  521. void EBI_BankWriteTimingConfig(uint32_t bank, bool writeBufDisable, bool halfWE);
  522. void EBI_BankAddressTimingSet(uint32_t bank, int setupCycles, int holdCycles);
  523. void EBI_BankAddressTimingConfig(uint32_t bank, bool halfALE);
  524. void EBI_BankPolaritySet(uint32_t bank, EBI_Line_TypeDef line, EBI_Polarity_TypeDef polarity);
  525. void EBI_BankByteLaneEnable(uint32_t bank, bool enable);
  526. void EBI_BankPage(uint32_t bank, bool enable);
  527. void EBI_AltMapEnable(bool enable);
  528. /* TBD: NAND support */
  529. /* TBD: ECC support */
  530. /***************************************************************************//**
  531. * @brief
  532. * Enable or disable TFT Direct Drive
  533. *
  534. * @param[in] mode
  535. * Drive from Internal or External memory, or Disable Direct Drive
  536. ******************************************************************************/
  537. static __INLINE void EBI_TFTEnable(EBI_TFTDDMode_TypeDef mode)
  538. {
  539. EBI->TFTCTRL = (EBI->TFTCTRL & ~(_EBI_TFTCTRL_DD_MASK)) | (uint32_t) mode;
  540. }
  541. /***************************************************************************//**
  542. * @brief
  543. * Configure frame buffer pointer
  544. *
  545. * @param[in] address
  546. * Frame pointer address, as offset by EBI base address
  547. ******************************************************************************/
  548. static __INLINE void EBI_TFTFrameBaseSet(uint32_t address)
  549. {
  550. EBI->TFTFRAMEBASE = (uint32_t) address;
  551. }
  552. /***************************************************************************//**
  553. * @brief Set TFT Pixel Color 0 or 1
  554. *
  555. * @param[in] pixel
  556. * Which pixel instance to set
  557. * @param[in] color
  558. * Color of pixel, 16-bit value
  559. ******************************************************************************/
  560. static __INLINE void EBI_TFTPixelSet(int pixel, uint32_t color)
  561. {
  562. EFM_ASSERT(pixel == 0 || pixel == 1);
  563. if (pixel == 0)
  564. {
  565. EBI->TFTPIXEL0 = color;
  566. }
  567. if (pixel == 1)
  568. {
  569. EBI->TFTPIXEL1 = color;
  570. }
  571. }
  572. /***************************************************************************//**
  573. * @brief Masking and Blending Mode Set
  574. *
  575. * @param[in] alpha
  576. * 8-bit value indicating blending factor
  577. ******************************************************************************/
  578. static __INLINE void EBI_TFTMaskBlendMode(EBI_TFTMaskBlend_TypeDef maskBlend)
  579. {
  580. EBI->TFTCTRL = (EBI->TFTCTRL & (~_EBI_TFTCTRL_MASKBLEND_MASK))|maskBlend;
  581. }
  582. /***************************************************************************//**
  583. * @brief Set TFT Alpha Blending Factor
  584. *
  585. * @param[in] alpha
  586. * 8-bit value indicating blending factor
  587. ******************************************************************************/
  588. static __INLINE void EBI_TFTAlphaBlendSet(uint8_t alpha)
  589. {
  590. EBI->TFTALPHA = alpha;
  591. }
  592. /***************************************************************************//**
  593. * @brief Set TFT mask value
  594. * Data accesses that matches this value are suppressed
  595. * @param[in] mask
  596. ******************************************************************************/
  597. static __INLINE void EBI_TFTMaskSet(uint32_t mask)
  598. {
  599. EBI->TFTMASK = mask;
  600. }
  601. /***************************************************************************//**
  602. * @brief Get current vertical position counter
  603. * @return
  604. * Returns the current line position for the visible part of a frame
  605. ******************************************************************************/
  606. static __INLINE uint32_t EBI_TFTVCount(void)
  607. {
  608. return((EBI->TFTSTATUS & _EBI_TFTSTATUS_VCNT_MASK) >> _EBI_TFTSTATUS_VCNT_SHIFT);
  609. }
  610. /***************************************************************************//**
  611. * @brief Get current horizontal position counter
  612. * @return
  613. * Returns the current horizontal pixel position within a visible line
  614. ******************************************************************************/
  615. static __INLINE uint32_t EBI_TFTHCount(void)
  616. {
  617. return((EBI->TFTSTATUS & _EBI_TFTSTATUS_HCNT_MASK) >> _EBI_TFTSTATUS_HCNT_SHIFT);
  618. }
  619. /***************************************************************************//**
  620. * @brief Set Frame Buffer Trigger
  621. * Frame buffer pointer will be updated either on each horizontal line (hsync)
  622. * or vertical update (vsync)(
  623. ******************************************************************************/
  624. static __INLINE void EBI_TFTFBTriggerSet(EBI_TFTFrameBufTrigger_TypeDef sync)
  625. {
  626. EBI->TFTCTRL = ((EBI->TFTCTRL & ~_EBI_TFTCTRL_FBCTRIG_MASK)|sync);
  627. }
  628. /***************************************************************************//**
  629. * @brief Set horizontal TFT stride value in number of bytes
  630. *
  631. * @param[in] nbytes
  632. * Number of bytes to add to frame buffer pointer after each horizontal line
  633. * update
  634. ******************************************************************************/
  635. static __INLINE void EBI_TFTHStrideSet(uint32_t nbytes)
  636. {
  637. EFM_ASSERT(nbytes < 0x1000);
  638. EBI->TFTSTRIDE = (EBI->TFTSTRIDE & ~(_EBI_TFTSTRIDE_HSTRIDE_MASK))|
  639. (nbytes<<_EBI_TFTSTRIDE_HSTRIDE_SHIFT);
  640. }
  641. /***************************************************************************//**
  642. * @brief
  643. * Clear one or more pending EBI interrupts.
  644. * @param[in] flags
  645. * Pending EBI interrupt source to clear. Use a logical OR combination
  646. * of valid interrupt flags for the EBI module (EBI_IF_nnn).
  647. ******************************************************************************/
  648. static __INLINE void EBI_IntClear(uint32_t flags)
  649. {
  650. EBI->IFC = flags;
  651. }
  652. /***************************************************************************//**
  653. * @brief
  654. * Set one or more pending EBI interrupts from SW.
  655. *
  656. * @param[in] flags
  657. * EBI interrupt sources to set to pending. Use a logical OR combination of
  658. * valid interrupt flags for the EBI module (EBI_IF_nnn).
  659. ******************************************************************************/
  660. static __INLINE void EBI_IntSet(uint32_t flags)
  661. {
  662. EBI->IFS = flags;
  663. }
  664. /***************************************************************************//**
  665. * @brief
  666. * Disable one or more EBI interrupts
  667. *
  668. * @param[in] flags
  669. * EBI interrupt sources to disable. Use logical OR combination of valid
  670. * interrupt flags for the EBI module (EBI_IF_nnn)
  671. ******************************************************************************/
  672. static __INLINE void EBI_IntDisable(uint32_t flags)
  673. {
  674. EBI->IEN &= ~(flags);
  675. }
  676. /***************************************************************************//**
  677. * @brief
  678. * Enable one or more EBI interrupts
  679. *
  680. * @param[in] flags
  681. * EBI interrupt sources to enable. Use logical OR combination of valid
  682. * interrupt flags for the EBI module (EBI_IF_nnn)
  683. ******************************************************************************/
  684. static __INLINE void EBI_IntEnable(uint32_t flags)
  685. {
  686. EBI->IEN |= flags;
  687. }
  688. /***************************************************************************//**
  689. * @brief
  690. * Get pending EBI interrupt flags
  691. *
  692. * @note
  693. * The event bits are not cleared by the use of this function
  694. *
  695. * @return
  696. * EBI interrupt sources pending, a logical combination of valid EBI
  697. * interrupt flags, EBI_IF_nnn
  698. ******************************************************************************/
  699. static __INLINE uint32_t EBI_IntGet(void)
  700. {
  701. return(EBI->IF);
  702. }
  703. #endif
  704. void EBI_ChipSelectEnable(uint32_t banks, bool enable);
  705. void EBI_ReadTimingSet(int setupCycles, int strobeCycles, int holdCycles);
  706. void EBI_WriteTimingSet(int setupCycles, int strobeCycles, int holdCycles);
  707. void EBI_AddressTimingSet(int setupCycles, int holdCycles);
  708. void EBI_PolaritySet(EBI_Line_TypeDef line, EBI_Polarity_TypeDef polarity);
  709. /** @} (end addtogroup EBI) */
  710. /** @} (end addtogroup EFM32_Library) */
  711. #ifdef __cplusplus
  712. }
  713. #endif
  714. #endif /* defined(EBI_COUNT) && (EBI_COUNT > 0) */
  715. #endif /* __EFM32_EBI_H */