drv_rtc.c 3.2 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2021-02-20 iysheng first version
  9. */
  10. #include <board.h>
  11. #include <sys/time.h>
  12. #include <drivers/drv_comm.h>
  13. #define DBG_TAG "drv.rtc"
  14. #define DBG_LVL DBG_INFO
  15. #include <rtdbg.h>
  16. #ifdef RT_USING_RTC
  17. typedef struct {
  18. struct rt_device rtc_dev;
  19. } gd32_rtc_device;
  20. static gd32_rtc_device g_gd32_rtc_dev;
  21. static time_t get_rtc_timestamp(void)
  22. {
  23. time_t rtc_counter;
  24. rtc_counter = (time_t)RTC_GetCounter();
  25. return rtc_counter;
  26. }
  27. static rt_err_t set_rtc_timestamp(time_t time_stamp)
  28. {
  29. uint32_t rtc_counter;
  30. rtc_counter = (uint32_t)time_stamp;
  31. /* wait until LWOFF bit in RTC_CTL to 1 */
  32. RTC_WaitLWOFF();
  33. /* enter configure mode */
  34. RTC_EnterConfigMode();
  35. /* write data to rtc register */
  36. RTC_SetCounter(rtc_counter);
  37. /* exit configure mode */
  38. RTC_ExitConfigMode();
  39. /* wait until LWOFF bit in RTC_CTL to 1 */
  40. RTC_WaitLWOFF();
  41. return RT_EOK;
  42. }
  43. static rt_err_t rt_gd32_rtc_control(rt_device_t dev, int cmd, void *args)
  44. {
  45. rt_err_t result = RT_EOK;
  46. RT_ASSERT(dev != RT_NULL);
  47. switch (cmd)
  48. {
  49. case RT_DEVICE_CTRL_RTC_GET_TIME:
  50. *(rt_uint32_t *)args = get_rtc_timestamp();
  51. break;
  52. case RT_DEVICE_CTRL_RTC_SET_TIME:
  53. if (set_rtc_timestamp(*(rt_uint32_t *)args))
  54. {
  55. result = -RT_ERROR;
  56. }
  57. break;
  58. }
  59. return result;
  60. }
  61. #ifdef RT_USING_DEVICE_OPS
  62. const static struct rt_device_ops g_gd32_rtc_ops =
  63. {
  64. RT_NULL,
  65. RT_NULL,
  66. RT_NULL,
  67. RT_NULL,
  68. RT_NULL,
  69. rt_gd32_rtc_control
  70. };
  71. #endif
  72. static int rt_hw_rtc_init(void)
  73. {
  74. rt_err_t ret;
  75. time_t rtc_counter;
  76. rcu_periph_clock_enable(RCU_PMU);
  77. PWR_BackupAccess_Enable(ENABLE);
  78. rcu_periph_clock_enable(RCU_BKPI);
  79. rtc_counter = get_rtc_timestamp();
  80. /* once the rtc clock source has been selected, if can't be changed
  81. * anymore unless the Backup domain is reset */
  82. rcu_bkp_reset_enable();
  83. rcu_bkp_reset_disable();
  84. rcu_periph_clock_enable(RCU_RTC);
  85. rcu_osci_on(RCU_LXTAL);
  86. if (SUCCESS == rcu_osci_stab_wait(RCU_LXTAL))
  87. {
  88. /* set lxtal as rtc clock source */
  89. rcu_rtc_clock_config(RCU_RTCSRC_LXTAL);
  90. }
  91. set_rtc_timestamp(rtc_counter);
  92. #ifdef RT_USING_DEVICE_OPS
  93. g_gd32_rtc_dev.rtc_dev.ops = &g_gd32_rtc_ops;
  94. #else
  95. g_gd32_rtc_dev.rtc_dev.init = RT_NULL;
  96. g_gd32_rtc_dev.rtc_dev.open = RT_NULL;
  97. g_gd32_rtc_dev.rtc_dev.close = RT_NULL;
  98. g_gd32_rtc_dev.rtc_dev.read = RT_NULL;
  99. g_gd32_rtc_dev.rtc_dev.write = RT_NULL;
  100. g_gd32_rtc_dev.rtc_dev.control = rt_gd32_rtc_control;
  101. #endif
  102. g_gd32_rtc_dev.rtc_dev.type = RT_Device_Class_RTC;
  103. g_gd32_rtc_dev.rtc_dev.rx_indicate = RT_NULL;
  104. g_gd32_rtc_dev.rtc_dev.tx_complete = RT_NULL;
  105. g_gd32_rtc_dev.rtc_dev.user_data = RT_NULL;
  106. ret = rt_device_register(&g_gd32_rtc_dev.rtc_dev, "rtc", \
  107. RT_DEVICE_FLAG_RDWR);
  108. if (ret != RT_EOK)
  109. {
  110. LOG_E("failed register internal rtc device, err=%d", ret);
  111. }
  112. return ret;
  113. }
  114. INIT_DEVICE_EXPORT(rt_hw_rtc_init);
  115. #endif