project.uvprojx 37 KB

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  1. <?xml version="1.0" encoding="UTF-8" standalone="no" ?>
  2. <Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
  3. <SchemaVersion>2.1</SchemaVersion>
  4. <Header>### uVision Project, (C) Keil Software</Header>
  5. <Targets>
  6. <Target>
  7. <TargetName>rt-thread</TargetName>
  8. <ToolsetNumber>0x4</ToolsetNumber>
  9. <ToolsetName>ARM-ADS</ToolsetName>
  10. <pCCUsed>5060750::V5.06 update 6 (build 750)::.\ARMCC</pCCUsed>
  11. <uAC6>0</uAC6>
  12. <TargetOption>
  13. <TargetCommonOption>
  14. <Device>STM32F746ZGTx</Device>
  15. <Vendor>STMicroelectronics</Vendor>
  16. <PackID>Keil.STM32F7xx_DFP.2.14.0</PackID>
  17. <PackURL>http://www.keil.com/pack/</PackURL>
  18. <Cpu>IRAM(0x20010000,0x40000) IRAM2(0x20000000,0x10000) IROM(0x08000000,0x100000) IROM2(0x00200000,0x100000) CPUTYPE("Cortex-M7") FPU3(SFPU) CLOCK(12000000) ELITTLE</Cpu>
  19. <FlashUtilSpec></FlashUtilSpec>
  20. <StartupFile></StartupFile>
  21. <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20010000 -FC1000 -FN2 -FF0STM32F7x_1024 -FS08000000 -FL0100000 -FF1STM32F7xTCM_1024 -FS1200000 -FL1100000 -FP0($$Device:STM32F746ZGTx$CMSIS\Flash\STM32F7x_1024.FLM) -FP1($$Device:STM32F746ZGTx$CMSIS\Flash\STM32F7xTCM_1024.FLM))</FlashDriverDll>
  22. <DeviceId>0</DeviceId>
  23. <RegisterFile>$$Device:STM32F746ZGTx$Drivers\CMSIS\Device\ST\STM32F7xx\Include\stm32f7xx.h</RegisterFile>
  24. <MemoryEnv></MemoryEnv>
  25. <Cmp></Cmp>
  26. <Asm></Asm>
  27. <Linker></Linker>
  28. <OHString></OHString>
  29. <InfinionOptionDll></InfinionOptionDll>
  30. <SLE66CMisc></SLE66CMisc>
  31. <SLE66AMisc></SLE66AMisc>
  32. <SLE66LinkerMisc></SLE66LinkerMisc>
  33. <SFDFile>$$Device:STM32F746ZGTx$CMSIS\SVD\STM32F746.svd</SFDFile>
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  37. <IncludePath></IncludePath>
  38. <LibPath></LibPath>
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  40. <DBRegisterFilePath></DBRegisterFilePath>
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  47. </TargetStatus>
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  49. <OutputName>rt-thread</OutputName>
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  59. <BeforeCompile>
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  63. <UserProg2Name></UserProg2Name>
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  68. </BeforeCompile>
  69. <BeforeMake>
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  72. <UserProg1Name></UserProg1Name>
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  77. <nStopB2X>0</nStopB2X>
  78. </BeforeMake>
  79. <AfterMake>
  80. <RunUserProg1>1</RunUserProg1>
  81. <RunUserProg2>0</RunUserProg2>
  82. <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
  83. <UserProg2Name></UserProg2Name>
  84. <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
  85. <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
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  87. <nStopA2X>0</nStopA2X>
  88. </AfterMake>
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  90. <SVCSIdString></SVCSIdString>
  91. </TargetCommonOption>
  92. <CommonProperty>
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  103. <StopOnExitCode>3</StopOnExitCode>
  104. <CustomArgument></CustomArgument>
  105. <IncludeLibraryModules></IncludeLibraryModules>
  106. <ComprImg>1</ComprImg>
  107. </CommonProperty>
  108. <DllOption>
  109. <SimDllName>SARMCM3.DLL</SimDllName>
  110. <SimDllArguments> -REMAP -MPU</SimDllArguments>
  111. <SimDlgDll>DCM.DLL</SimDlgDll>
  112. <SimDlgDllArguments>-pCM7</SimDlgDllArguments>
  113. <TargetDllName>SARMCM3.DLL</TargetDllName>
  114. <TargetDllArguments> -MPU</TargetDllArguments>
  115. <TargetDlgDll>TCM.DLL</TargetDlgDll>
  116. <TargetDlgDllArguments>-pCM7</TargetDlgDllArguments>
  117. </DllOption>
  118. <DebugOption>
  119. <OPTHX>
  120. <HexSelection>1</HexSelection>
  121. <HexRangeLowAddress>0</HexRangeLowAddress>
  122. <HexRangeHighAddress>0</HexRangeHighAddress>
  123. <HexOffset>0</HexOffset>
  124. <Oh166RecLen>16</Oh166RecLen>
  125. </OPTHX>
  126. </DebugOption>
  127. <Utilities>
  128. <Flash1>
  129. <UseTargetDll>1</UseTargetDll>
  130. <UseExternalTool>0</UseExternalTool>
  131. <RunIndependent>0</RunIndependent>
  132. <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
  133. <Capability>1</Capability>
  134. <DriverSelection>4096</DriverSelection>
  135. </Flash1>
  136. <bUseTDR>1</bUseTDR>
  137. <Flash2>BIN\UL2CM3.DLL</Flash2>
  138. <Flash3></Flash3>
  139. <Flash4></Flash4>
  140. <pFcarmOut></pFcarmOut>
  141. <pFcarmGrp></pFcarmGrp>
  142. <pFcArmRoot></pFcArmRoot>
  143. <FcArmLst>0</FcArmLst>
  144. </Utilities>
  145. <TargetArmAds>
  146. <ArmAdsMisc>
  147. <GenerateListings>0</GenerateListings>
  148. <asHll>1</asHll>
  149. <asAsm>1</asAsm>
  150. <asMacX>1</asMacX>
  151. <asSyms>1</asSyms>
  152. <asFals>1</asFals>
  153. <asDbgD>1</asDbgD>
  154. <asForm>1</asForm>
  155. <ldLst>0</ldLst>
  156. <ldmm>1</ldmm>
  157. <ldXref>1</ldXref>
  158. <BigEnd>0</BigEnd>
  159. <AdsALst>1</AdsALst>
  160. <AdsACrf>1</AdsACrf>
  161. <AdsANop>0</AdsANop>
  162. <AdsANot>0</AdsANot>
  163. <AdsLLst>1</AdsLLst>
  164. <AdsLmap>1</AdsLmap>
  165. <AdsLcgr>1</AdsLcgr>
  166. <AdsLsym>1</AdsLsym>
  167. <AdsLszi>1</AdsLszi>
  168. <AdsLtoi>1</AdsLtoi>
  169. <AdsLsun>1</AdsLsun>
  170. <AdsLven>1</AdsLven>
  171. <AdsLsxf>1</AdsLsxf>
  172. <RvctClst>0</RvctClst>
  173. <GenPPlst>0</GenPPlst>
  174. <AdsCpuType>"Cortex-M7"</AdsCpuType>
  175. <RvctDeviceName></RvctDeviceName>
  176. <mOS>0</mOS>
  177. <uocRom>0</uocRom>
  178. <uocRam>0</uocRam>
  179. <hadIROM>1</hadIROM>
  180. <hadIRAM>1</hadIRAM>
  181. <hadXRAM>0</hadXRAM>
  182. <uocXRam>0</uocXRam>
  183. <RvdsVP>2</RvdsVP>
  184. <RvdsMve>0</RvdsMve>
  185. <RvdsCdeCp>0</RvdsCdeCp>
  186. <hadIRAM2>1</hadIRAM2>
  187. <hadIROM2>1</hadIROM2>
  188. <StupSel>8</StupSel>
  189. <useUlib>0</useUlib>
  190. <EndSel>0</EndSel>
  191. <uLtcg>0</uLtcg>
  192. <nSecure>0</nSecure>
  193. <RoSelD>4</RoSelD>
  194. <RwSelD>4</RwSelD>
  195. <CodeSel>0</CodeSel>
  196. <OptFeed>0</OptFeed>
  197. <NoZi1>0</NoZi1>
  198. <NoZi2>0</NoZi2>
  199. <NoZi3>0</NoZi3>
  200. <NoZi4>0</NoZi4>
  201. <NoZi5>0</NoZi5>
  202. <Ro1Chk>0</Ro1Chk>
  203. <Ro2Chk>0</Ro2Chk>
  204. <Ro3Chk>0</Ro3Chk>
  205. <Ir1Chk>1</Ir1Chk>
  206. <Ir2Chk>0</Ir2Chk>
  207. <Ra1Chk>0</Ra1Chk>
  208. <Ra2Chk>0</Ra2Chk>
  209. <Ra3Chk>0</Ra3Chk>
  210. <Im1Chk>1</Im1Chk>
  211. <Im2Chk>1</Im2Chk>
  212. <OnChipMemories>
  213. <Ocm1>
  214. <Type>0</Type>
  215. <StartAddress>0x0</StartAddress>
  216. <Size>0x0</Size>
  217. </Ocm1>
  218. <Ocm2>
  219. <Type>0</Type>
  220. <StartAddress>0x0</StartAddress>
  221. <Size>0x0</Size>
  222. </Ocm2>
  223. <Ocm3>
  224. <Type>0</Type>
  225. <StartAddress>0x0</StartAddress>
  226. <Size>0x0</Size>
  227. </Ocm3>
  228. <Ocm4>
  229. <Type>0</Type>
  230. <StartAddress>0x0</StartAddress>
  231. <Size>0x0</Size>
  232. </Ocm4>
  233. <Ocm5>
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  235. <StartAddress>0x0</StartAddress>
  236. <Size>0x0</Size>
  237. </Ocm5>
  238. <Ocm6>
  239. <Type>0</Type>
  240. <StartAddress>0x0</StartAddress>
  241. <Size>0x0</Size>
  242. </Ocm6>
  243. <IRAM>
  244. <Type>0</Type>
  245. <StartAddress>0x20010000</StartAddress>
  246. <Size>0x40000</Size>
  247. </IRAM>
  248. <IROM>
  249. <Type>1</Type>
  250. <StartAddress>0x8000000</StartAddress>
  251. <Size>0x100000</Size>
  252. </IROM>
  253. <XRAM>
  254. <Type>0</Type>
  255. <StartAddress>0x0</StartAddress>
  256. <Size>0x0</Size>
  257. </XRAM>
  258. <OCR_RVCT1>
  259. <Type>1</Type>
  260. <StartAddress>0x0</StartAddress>
  261. <Size>0x0</Size>
  262. </OCR_RVCT1>
  263. <OCR_RVCT2>
  264. <Type>1</Type>
  265. <StartAddress>0x0</StartAddress>
  266. <Size>0x0</Size>
  267. </OCR_RVCT2>
  268. <OCR_RVCT3>
  269. <Type>1</Type>
  270. <StartAddress>0x0</StartAddress>
  271. <Size>0x0</Size>
  272. </OCR_RVCT3>
  273. <OCR_RVCT4>
  274. <Type>1</Type>
  275. <StartAddress>0x8000000</StartAddress>
  276. <Size>0x100000</Size>
  277. </OCR_RVCT4>
  278. <OCR_RVCT5>
  279. <Type>1</Type>
  280. <StartAddress>0x200000</StartAddress>
  281. <Size>0x100000</Size>
  282. </OCR_RVCT5>
  283. <OCR_RVCT6>
  284. <Type>0</Type>
  285. <StartAddress>0x0</StartAddress>
  286. <Size>0x0</Size>
  287. </OCR_RVCT6>
  288. <OCR_RVCT7>
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  291. <Size>0x0</Size>
  292. </OCR_RVCT7>
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  296. <Size>0x0</Size>
  297. </OCR_RVCT8>
  298. <OCR_RVCT9>
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  300. <StartAddress>0x20010000</StartAddress>
  301. <Size>0x40000</Size>
  302. </OCR_RVCT9>
  303. <OCR_RVCT10>
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  305. <StartAddress>0x20000000</StartAddress>
  306. <Size>0x10000</Size>
  307. </OCR_RVCT10>
  308. </OnChipMemories>
  309. <RvctStartVector></RvctStartVector>
  310. </ArmAdsMisc>
  311. <Cads>
  312. <interw>1</interw>
  313. <Optim>1</Optim>
  314. <oTime>0</oTime>
  315. <SplitLS>0</SplitLS>
  316. <OneElfS>1</OneElfS>
  317. <Strict>0</Strict>
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  320. <Ropi>0</Ropi>
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  325. <uC99>1</uC99>
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  335. <VariousControls>
  336. <MiscControls></MiscControls>
  337. <Define>RT_USING_ARM_LIBC, USE_HAL_DRIVER, STM32F746xx, __RTTHREAD__, __CLK_TCK=RT_TICK_PER_SECOND</Define>
  338. <Undefine></Undefine>
  339. <IncludePath>applications;.;rt-thread\libcpu\arm\common;rt-thread\libcpu\arm\cortex-m7;rt-thread\components\drivers\include;rt-thread\components\drivers\include;rt-thread\components\drivers\spi;rt-thread\components\drivers\include;rt-thread\components\drivers\include;board;board\CubeMX_Config\Inc;board\ports;libraries\HAL_Drivers;libraries\HAL_Drivers\config;rt-thread\components\dfs\include;rt-thread\components\dfs\filesystems\devfs;rt-thread\components\finsh;.;rt-thread\include;rt-thread\components\libc\compilers\armlibc;rt-thread\components\libc\compilers\common;libraries\STM32F7xx_HAL\STM32F7xx_HAL_Driver\Inc;libraries\STM32F7xx_HAL\CMSIS\Device\ST\STM32F7xx\Include;libraries\STM32F7xx_HAL\CMSIS\Include</IncludePath>
  340. </VariousControls>
  341. </Cads>
  342. <Aads>
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  345. <Rwpi>0</Rwpi>
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  355. <Define></Define>
  356. <Undefine></Undefine>
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  370. <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
  371. <IncludeLibs></IncludeLibs>
  372. <IncludeLibsPath></IncludeLibsPath>
  373. <Misc></Misc>
  374. <LinkerInputFile></LinkerInputFile>
  375. <DisabledWarnings></DisabledWarnings>
  376. </LDads>
  377. </TargetArmAds>
  378. </TargetOption>
  379. <Groups>
  380. <Group>
  381. <GroupName>Applications</GroupName>
  382. <Files>
  383. <File>
  384. <FileName>main.c</FileName>
  385. <FileType>1</FileType>
  386. <FilePath>applications\main.c</FilePath>
  387. </File>
  388. </Files>
  389. </Group>
  390. <Group>
  391. <GroupName>CPU</GroupName>
  392. <Files>
  393. <File>
  394. <FileName>backtrace.c</FileName>
  395. <FileType>1</FileType>
  396. <FilePath>rt-thread\libcpu\arm\common\backtrace.c</FilePath>
  397. </File>
  398. <File>
  399. <FileName>showmem.c</FileName>
  400. <FileType>1</FileType>
  401. <FilePath>rt-thread\libcpu\arm\common\showmem.c</FilePath>
  402. </File>
  403. <File>
  404. <FileName>div0.c</FileName>
  405. <FileType>1</FileType>
  406. <FilePath>rt-thread\libcpu\arm\common\div0.c</FilePath>
  407. </File>
  408. <File>
  409. <FileName>context_rvds.S</FileName>
  410. <FileType>2</FileType>
  411. <FilePath>rt-thread\libcpu\arm\cortex-m7\context_rvds.S</FilePath>
  412. </File>
  413. <File>
  414. <FileName>cpuport.c</FileName>
  415. <FileType>1</FileType>
  416. <FilePath>rt-thread\libcpu\arm\cortex-m7\cpuport.c</FilePath>
  417. </File>
  418. <File>
  419. <FileName>cpu_cache.c</FileName>
  420. <FileType>1</FileType>
  421. <FilePath>rt-thread\libcpu\arm\cortex-m7\cpu_cache.c</FilePath>
  422. </File>
  423. </Files>
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  426. <GroupName>DeviceDrivers</GroupName>
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