epi.h 27 KB

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  1. //*****************************************************************************
  2. //
  3. // epi.h - Prototypes and macros for the EPI module.
  4. //
  5. // Copyright (c) 2008-2017 Texas Instruments Incorporated. All rights reserved.
  6. // Software License Agreement
  7. //
  8. // Redistribution and use in source and binary forms, with or without
  9. // modification, are permitted provided that the following conditions
  10. // are met:
  11. //
  12. // Redistributions of source code must retain the above copyright
  13. // notice, this list of conditions and the following disclaimer.
  14. //
  15. // Redistributions in binary form must reproduce the above copyright
  16. // notice, this list of conditions and the following disclaimer in the
  17. // documentation and/or other materials provided with the
  18. // distribution.
  19. //
  20. // Neither the name of Texas Instruments Incorporated nor the names of
  21. // its contributors may be used to endorse or promote products derived
  22. // from this software without specific prior written permission.
  23. //
  24. // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  25. // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  26. // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  27. // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  28. // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  29. // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  30. // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  31. // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  32. // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  33. // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  34. // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35. //
  36. // This is part of revision 2.1.4.178 of the Tiva Peripheral Driver Library.
  37. //
  38. //*****************************************************************************
  39. #ifndef __DRIVERLIB_EPI_H__
  40. #define __DRIVERLIB_EPI_H__
  41. //*****************************************************************************
  42. //
  43. // If building with a C++ compiler, make all of the definitions in this header
  44. // have a C binding.
  45. //
  46. //*****************************************************************************
  47. #ifdef __cplusplus
  48. extern "C"
  49. {
  50. #endif
  51. //*****************************************************************************
  52. //
  53. // Values that can be passed to EPIModeSet()
  54. //
  55. //*****************************************************************************
  56. #define EPI_MODE_GENERAL 0x00000010
  57. #define EPI_MODE_SDRAM 0x00000011
  58. #define EPI_MODE_HB8 0x00000012
  59. #define EPI_MODE_HB16 0x00000013
  60. #define EPI_MODE_DISABLE 0x00000000
  61. //*****************************************************************************
  62. //
  63. // Values that can be passed to EPIConfigSDRAMSet()
  64. //
  65. //*****************************************************************************
  66. #define EPI_SDRAM_CORE_FREQ_0_15 \
  67. 0x00000000
  68. #define EPI_SDRAM_CORE_FREQ_15_30 \
  69. 0x40000000
  70. #define EPI_SDRAM_CORE_FREQ_30_50 \
  71. 0x80000000
  72. #define EPI_SDRAM_CORE_FREQ_50_100 \
  73. 0xC0000000
  74. #define EPI_SDRAM_LOW_POWER 0x00000200
  75. #define EPI_SDRAM_FULL_POWER 0x00000000
  76. #define EPI_SDRAM_SIZE_64MBIT 0x00000000
  77. #define EPI_SDRAM_SIZE_128MBIT 0x00000001
  78. #define EPI_SDRAM_SIZE_256MBIT 0x00000002
  79. #define EPI_SDRAM_SIZE_512MBIT 0x00000003
  80. //*****************************************************************************
  81. //
  82. // Values that can be passed to EPIConfigGPModeSet()
  83. //
  84. //*****************************************************************************
  85. #define EPI_GPMODE_CLKPIN 0x80000000
  86. #define EPI_GPMODE_CLKGATE 0x40000000
  87. #define EPI_GPMODE_FRAME50 0x04000000
  88. #define EPI_GPMODE_WRITE2CYCLE 0x00080000
  89. #define EPI_GPMODE_ASIZE_NONE 0x00000000
  90. #define EPI_GPMODE_ASIZE_4 0x00000010
  91. #define EPI_GPMODE_ASIZE_12 0x00000020
  92. #define EPI_GPMODE_ASIZE_20 0x00000030
  93. #define EPI_GPMODE_DSIZE_8 0x00000000
  94. #define EPI_GPMODE_DSIZE_16 0x00000001
  95. #define EPI_GPMODE_DSIZE_24 0x00000002
  96. #define EPI_GPMODE_DSIZE_32 0x00000003
  97. //*****************************************************************************
  98. //
  99. // Values that can be passed to EPIConfigHB8ModeSet()
  100. //
  101. //*****************************************************************************
  102. #define EPI_HB8_USE_TXEMPTY 0x00800000
  103. #define EPI_HB8_USE_RXFULL 0x00400000
  104. #define EPI_HB8_WRHIGH 0x00200000
  105. #define EPI_HB8_RDHIGH 0x00100000
  106. #define EPI_HB8_ALE_HIGH 0x00080000
  107. #define EPI_HB8_ALE_LOW 0x00000000
  108. #define EPI_HB8_WRWAIT_0 0x00000000
  109. #define EPI_HB8_WRWAIT_1 0x00000040
  110. #define EPI_HB8_WRWAIT_2 0x00000080
  111. #define EPI_HB8_WRWAIT_3 0x000000C0
  112. #define EPI_HB8_RDWAIT_0 0x00000000
  113. #define EPI_HB8_RDWAIT_1 0x00000010
  114. #define EPI_HB8_RDWAIT_2 0x00000020
  115. #define EPI_HB8_RDWAIT_3 0x00000030
  116. #define EPI_HB8_MODE_ADMUX 0x00000000
  117. #define EPI_HB8_MODE_ADDEMUX 0x00000001
  118. #define EPI_HB8_MODE_SRAM 0x00000002
  119. #define EPI_HB8_MODE_FIFO 0x00000003
  120. #define EPI_HB8_WORD_ACCESS 0x00000100
  121. #define EPI_HB8_CSCFG_ALE 0x00000000
  122. #define EPI_HB8_CSCFG_CS 0x00000200
  123. #define EPI_HB8_CSCFG_DUAL_CS 0x00000400
  124. #define EPI_HB8_CSCFG_ALE_DUAL_CS \
  125. 0x00000600
  126. #define EPI_HB8_CSCFG_ALE_SINGLE_CS \
  127. 0x00001000
  128. #define EPI_HB8_CSCFG_QUAD_CS 0x00001200
  129. #define EPI_HB8_CSCFG_ALE_QUAD_CS \
  130. 0x00001400
  131. #define EPI_HB8_CSBAUD 0x00000800
  132. #define EPI_HB8_CLOCK_GATE 0x80000000
  133. #define EPI_HB8_CLOCK_GATE_IDLE \
  134. 0x40000000
  135. #define EPI_HB8_CLOCK_INVERT 0x20000000
  136. #define EPI_HB8_IN_READY_EN 0x10000000
  137. #define EPI_HB8_IN_READY_EN_INVERT \
  138. 0x18000000
  139. #define EPI_HB8_CSCFG_MASK 0x00001600
  140. //*****************************************************************************
  141. //
  142. // Values that can be passed to EPIConfigHB16ModeSet()
  143. //
  144. //*****************************************************************************
  145. #define EPI_HB16_USE_TXEMPTY 0x00800000
  146. #define EPI_HB16_USE_RXFULL 0x00400000
  147. #define EPI_HB16_WRHIGH 0x00200000
  148. #define EPI_HB16_RDHIGH 0x00100000
  149. #define EPI_HB16_WRWAIT_0 0x00000000
  150. #define EPI_HB16_WRWAIT_1 0x00000040
  151. #define EPI_HB16_WRWAIT_2 0x00000080
  152. #define EPI_HB16_WRWAIT_3 0x000000C0
  153. #define EPI_HB16_RDWAIT_0 0x00000000
  154. #define EPI_HB16_RDWAIT_1 0x00000010
  155. #define EPI_HB16_RDWAIT_2 0x00000020
  156. #define EPI_HB16_RDWAIT_3 0x00000030
  157. #define EPI_HB16_MODE_ADMUX 0x00000000
  158. #define EPI_HB16_MODE_ADDEMUX 0x00000001
  159. #define EPI_HB16_MODE_SRAM 0x00000002
  160. #define EPI_HB16_MODE_FIFO 0x00000003
  161. #define EPI_HB16_BSEL 0x00000004
  162. #define EPI_HB16_WORD_ACCESS 0x00000100
  163. #define EPI_HB16_CSCFG_ALE 0x00000000
  164. #define EPI_HB16_CSCFG_CS 0x00000200
  165. #define EPI_HB16_CSCFG_DUAL_CS 0x00000400
  166. #define EPI_HB16_CSCFG_ALE_DUAL_CS \
  167. 0x00000600
  168. #define EPI_HB16_CSCFG_ALE_SINGLE_CS \
  169. 0x00001000
  170. #define EPI_HB16_CSCFG_QUAD_CS 0x00001200
  171. #define EPI_HB16_CSCFG_ALE_QUAD_CS \
  172. 0x00001400
  173. #define EPI_HB16_CLOCK_GATE 0x80000000
  174. #define EPI_HB16_CLOCK_GATE_IDLE \
  175. 0x40000000
  176. #define EPI_HB16_CLOCK_INVERT 0x20000000
  177. #define EPI_HB16_IN_READY_EN 0x10000000
  178. #define EPI_HB16_IN_READY_EN_INVERTED \
  179. 0x18000000
  180. #define EPI_HB16_ALE_HIGH 0x00080000
  181. #define EPI_HB16_ALE_LOW 0x00000000
  182. #define EPI_HB16_BURST_TRAFFIC 0x00010000
  183. #define EPI_HB16_CSBAUD 0x00000800
  184. #define EPI_HB16_CSCFG_MASK 0x00001600
  185. //*****************************************************************************
  186. //
  187. // Values that can be passed to EPIConfigHB8TimingSet().
  188. //
  189. //*****************************************************************************
  190. #define EPI_HB8_IN_READY_DELAY_1 \
  191. 0x01000000
  192. #define EPI_HB8_IN_READY_DELAY_2 \
  193. 0x02000000
  194. #define EPI_HB8_IN_READY_DELAY_3 \
  195. 0x03000000
  196. #define EPI_HB8_CAP_WIDTH_1 0x00001000
  197. #define EPI_HB8_CAP_WIDTH_2 0x00002000
  198. #define EPI_HB8_WRWAIT_MINUS_DISABLE \
  199. 0x00000000
  200. #define EPI_HB8_WRWAIT_MINUS_ENABLE \
  201. 0x00000010
  202. #define EPI_HB8_RDWAIT_MINUS_DISABLE \
  203. 0x00000000
  204. #define EPI_HB8_RDWAIT_MINUS_ENABLE \
  205. 0x00000001
  206. //*****************************************************************************
  207. //
  208. // Values that can be passed to EPIConfigHB16TimingSet().
  209. //
  210. //*****************************************************************************
  211. #define EPI_HB16_IN_READY_DELAY_1 \
  212. 0x01000000
  213. #define EPI_HB16_IN_READY_DELAY_2 \
  214. 0x02000000
  215. #define EPI_HB16_IN_READY_DELAY_3 \
  216. 0x03000000
  217. #define EPI_HB16_PSRAM_NO_LIMIT 0x00000000
  218. #define EPI_HB16_PSRAM_128 0x00010000
  219. #define EPI_HB16_PSRAM_256 0x00020000
  220. #define EPI_HB16_PSRAM_512 0x00030000
  221. #define EPI_HB16_PSRAM_1024 0x00040000
  222. #define EPI_HB16_PSRAM_2048 0x00050000
  223. #define EPI_HB16_PSRAM_4096 0x00060000
  224. #define EPI_HB16_PSRAM_8192 0x00070000
  225. #define EPI_HB16_CAP_WIDTH_1 0x00001000
  226. #define EPI_HB16_CAP_WIDTH_2 0x00002000
  227. #define EPI_HB16_WRWAIT_MINUS_DISABLE \
  228. 0x00000000
  229. #define EPI_HB16_WRWAIT_MINUS_ENABLE \
  230. 0x00000008
  231. #define EPI_HB16_RDWAIT_MINUS_DISABLE \
  232. 0x00000000
  233. #define EPI_HB16_RDWAIT_MINUS_ENABLE \
  234. 0x00000001
  235. //*****************************************************************************
  236. //
  237. // Values that can be passed to EPIAddressMapSet().
  238. //
  239. //*****************************************************************************
  240. #define EPI_ADDR_PER_SIZE_256B 0x00000000
  241. #define EPI_ADDR_PER_SIZE_64KB 0x00000040
  242. #define EPI_ADDR_PER_SIZE_16MB 0x00000080
  243. #define EPI_ADDR_PER_SIZE_256MB 0x000000C0
  244. #define EPI_ADDR_PER_BASE_NONE 0x00000000
  245. #define EPI_ADDR_PER_BASE_A 0x00000010
  246. #define EPI_ADDR_PER_BASE_C 0x00000020
  247. #define EPI_ADDR_RAM_SIZE_256B 0x00000000
  248. #define EPI_ADDR_RAM_SIZE_64KB 0x00000004
  249. #define EPI_ADDR_RAM_SIZE_16MB 0x00000008
  250. #define EPI_ADDR_RAM_SIZE_256MB 0x0000000C
  251. #define EPI_ADDR_RAM_BASE_NONE 0x00000000
  252. #define EPI_ADDR_RAM_BASE_6 0x00000001
  253. #define EPI_ADDR_RAM_BASE_8 0x00000002
  254. #define EPI_ADDR_QUAD_MODE 0x00000033
  255. #define EPI_ADDR_CODE_SIZE_256B 0x00000000
  256. #define EPI_ADDR_CODE_SIZE_64KB 0x00000400
  257. #define EPI_ADDR_CODE_SIZE_16MB 0x00000800
  258. #define EPI_ADDR_CODE_SIZE_256MB \
  259. 0x00000C00
  260. #define EPI_ADDR_CODE_BASE_NONE 0x00000000
  261. #define EPI_ADDR_CODE_BASE_1 0x00000100
  262. //*****************************************************************************
  263. //
  264. // Values that can be passed to EPINonBlockingReadConfigure()
  265. //
  266. //*****************************************************************************
  267. #define EPI_NBCONFIG_SIZE_8 1
  268. #define EPI_NBCONFIG_SIZE_16 2
  269. #define EPI_NBCONFIG_SIZE_32 3
  270. //*****************************************************************************
  271. //
  272. // Values that can be passed to EPIFIFOConfig()
  273. //
  274. //*****************************************************************************
  275. #define EPI_FIFO_CONFIG_WTFULLERR \
  276. 0x00020000
  277. #define EPI_FIFO_CONFIG_RSTALLERR \
  278. 0x00010000
  279. #define EPI_FIFO_CONFIG_TX_EMPTY \
  280. 0x00000000
  281. #define EPI_FIFO_CONFIG_TX_1_4 0x00000020
  282. #define EPI_FIFO_CONFIG_TX_1_2 0x00000030
  283. #define EPI_FIFO_CONFIG_TX_3_4 0x00000040
  284. #define EPI_FIFO_CONFIG_RX_1_8 0x00000001
  285. #define EPI_FIFO_CONFIG_RX_1_4 0x00000002
  286. #define EPI_FIFO_CONFIG_RX_1_2 0x00000003
  287. #define EPI_FIFO_CONFIG_RX_3_4 0x00000004
  288. #define EPI_FIFO_CONFIG_RX_7_8 0x00000005
  289. #define EPI_FIFO_CONFIG_RX_FULL 0x00000006
  290. //*****************************************************************************
  291. //
  292. // Values that can be passed to EPIIntEnable(), EPIIntDisable(), or returned
  293. // as flags from EPIIntStatus()
  294. //
  295. //*****************************************************************************
  296. #define EPI_INT_DMA_TX_DONE 0x00000010
  297. #define EPI_INT_DMA_RX_DONE 0x00000008
  298. #define EPI_INT_TXREQ 0x00000004
  299. #define EPI_INT_RXREQ 0x00000002
  300. #define EPI_INT_ERR 0x00000001
  301. //*****************************************************************************
  302. //
  303. // Values that can be passed to EPIIntErrorClear(), or returned as flags from
  304. // EPIIntErrorStatus()
  305. //
  306. //*****************************************************************************
  307. #define EPI_INT_ERR_DMAWRIC 0x00000010
  308. #define EPI_INT_ERR_DMARDIC 0x00000008
  309. #define EPI_INT_ERR_WTFULL 0x00000004
  310. #define EPI_INT_ERR_RSTALL 0x00000002
  311. #define EPI_INT_ERR_TIMEOUT 0x00000001
  312. #ifdef rvmdk
  313. //*****************************************************************************
  314. //
  315. // Keil case.
  316. //
  317. //*****************************************************************************
  318. inline void
  319. EPIWorkaroundWordWrite(uint32_t *pui32Addr, uint32_t ui32Value)
  320. {
  321. uint32_t ui32Scratch;
  322. __asm
  323. {
  324. //
  325. // Add a NOP to ensure we don’t have a flash read immediately before
  326. // the EPI read.
  327. //
  328. NOP
  329. //
  330. // Perform the write we're actually interested in.
  331. //
  332. STR ui32Value, [pui32Addr]
  333. //
  334. // Read from SRAM to ensure that we don't have an EPI write followed by
  335. // a flash read.
  336. //
  337. LDR ui32Scratch, [__current_sp()]
  338. }
  339. }
  340. inline uint32_t
  341. EPIWorkaroundWordRead(uint32_t *pui32Addr)
  342. {
  343. uint32_t ui32Value, ui32Scratch;
  344. __asm
  345. {
  346. //
  347. // Add a NOP to ensure we don’t have a flash read immediately before
  348. // the EPI read.
  349. //
  350. NOP
  351. //
  352. // Perform the read we're actually interested in.
  353. //
  354. LDR ui32Value, [pui32Addr]
  355. //
  356. // Read from SRAM to ensure that we don't have an EPI read followed by
  357. // a flash read.
  358. //
  359. LDR ui32Scratch, [__current_sp()]
  360. }
  361. return(ui32Value);
  362. }
  363. inline void
  364. EPIWorkaroundHWordWrite(uint16_t *pui16Addr, uint16_t ui16Value)
  365. {
  366. uint32_t ui32Scratch;
  367. __asm
  368. {
  369. //
  370. // Add a NOP to ensure we don’t have a flash read immediately before
  371. // the EPI read.
  372. //
  373. NOP
  374. //
  375. // Perform the write we're actually interested in.
  376. //
  377. STRH ui16Value, [pui16Addr]
  378. //
  379. // Read from SRAM to ensure that we don't have an EPI write followed by
  380. // a flash read.
  381. //
  382. LDR ui32Scratch, [__current_sp()]
  383. }
  384. }
  385. inline uint16_t
  386. EPIWorkaroundHWordRead(uint16_t *pui16Addr)
  387. {
  388. uint32_t ui32Scratch;
  389. uint16_t ui16Value;
  390. __asm
  391. {
  392. //
  393. // Add a NOP to ensure we don’t have a flash read immediately before
  394. // the EPI read.
  395. //
  396. NOP
  397. //
  398. // Perform the read we're actually interested in.
  399. //
  400. LDRH ui16Value, [pui16Addr]
  401. //
  402. // Read from SRAM to ensure that we don't have an EPI read followed by
  403. // a flash read.
  404. //
  405. LDR ui32Scratch, [__current_sp()]
  406. }
  407. return(ui16Value);
  408. }
  409. inline void
  410. EPIWorkaroundByteWrite(uint8_t *pui8Addr, uint8_t ui8Value)
  411. {
  412. uint32_t ui32Scratch;
  413. __asm
  414. {
  415. //
  416. // Add a NOP to ensure we don’t have a flash read immediately before
  417. // the EPI read.
  418. //
  419. NOP
  420. //
  421. // Perform the write we're actually interested in.
  422. //
  423. STRB ui8Value, [pui8Addr]
  424. //
  425. // Read from SRAM to ensure that we don't have an EPI write followed by
  426. // a flash read.
  427. //
  428. LDR ui32Scratch, [__current_sp()]
  429. }
  430. }
  431. inline uint8_t
  432. EPIWorkaroundByteRead(uint8_t *pui8Addr)
  433. {
  434. uint32_t ui32Scratch;
  435. uint8_t ui8Value;
  436. __asm
  437. {
  438. //
  439. // Add a NOP to ensure we don’t have a flash read immediately before
  440. // the EPI read.
  441. //
  442. NOP
  443. //
  444. // Perform the read we're actually interested in.
  445. //
  446. LDRB ui8Value, [pui8Addr]
  447. //
  448. // Read from SRAM to ensure that we don't have an EPI read followed by
  449. // a flash read.
  450. //
  451. LDR ui32Scratch, [__current_sp()]
  452. }
  453. return(ui8Value);
  454. }
  455. #endif
  456. #ifdef ccs
  457. //*****************************************************************************
  458. //
  459. // Code Composer Studio versions of these functions can be found in separate
  460. // source file epi_workaround_ccs.s.
  461. //
  462. //*****************************************************************************
  463. extern void EPIWorkaroundWordWrite(uint32_t *pui32Addr, uint32_t ui32Value);
  464. extern uint32_t EPIWorkaroundWordRead(uint32_t *pui32Addr);
  465. extern void EPIWorkaroundHWordWrite(uint16_t *pui16Addr, uint16_t ui16Value);
  466. extern uint16_t EPIWorkaroundHWordRead(uint16_t *pui16Addr);
  467. extern void EPIWorkaroundByteWrite(uint8_t *pui8Addr, uint8_t ui8Value);
  468. extern uint8_t EPIWorkaroundByteRead(uint8_t *pui8Addr);
  469. #endif
  470. #if (defined gcc) || (defined ewarm) || (defined sourcerygxx) || \
  471. (defined codered)
  472. //*****************************************************************************
  473. //
  474. // GCC-based toolchain and IAR case.
  475. //
  476. //*****************************************************************************
  477. inline void
  478. EPIWorkaroundWordWrite(uint32_t *pui32Addr, uint32_t ui32Value)
  479. {
  480. volatile register uint32_t ui32Scratch;
  481. __asm volatile (
  482. //
  483. // Add a NOP to ensure we don’t have a flash read immediately before
  484. // the EPI read.
  485. //
  486. " NOP\n"
  487. " STR %[value],[%[addr]]\n"
  488. " LDR %[scratch],[sp]\n"
  489. : [scratch] "=r" (ui32Scratch)
  490. : [addr] "r" (pui32Addr), [value] "r" (ui32Value)
  491. );
  492. //
  493. // Keep the compiler from generating a warning.
  494. //
  495. ui32Scratch = ui32Scratch;
  496. }
  497. inline uint32_t
  498. EPIWorkaroundWordRead(uint32_t *pui32Addr)
  499. {
  500. volatile register uint32_t ui32Data, ui32Scratch;
  501. //
  502. // ui32Scratch is not used other than to add a padding read following the
  503. // "real" read.
  504. //
  505. __asm volatile(
  506. //
  507. // Add a NOP to ensure we don’t have a flash read immediately before
  508. // the EPI read.
  509. //
  510. " NOP\n"
  511. " LDR %[ret],[%[addr]]\n"
  512. " LDR %[scratch],[sp]\n"
  513. : [ret] "=r" (ui32Data),
  514. [scratch] "=r" (ui32Scratch)
  515. : [addr] "r" (pui32Addr)
  516. );
  517. //
  518. // Keep the compiler from generating a warning.
  519. //
  520. ui32Scratch = ui32Scratch;
  521. return(ui32Data);
  522. }
  523. inline void
  524. EPIWorkaroundHWordWrite(uint16_t *pui16Addr, uint16_t ui16Value)
  525. {
  526. volatile register uint32_t ui32Scratch;
  527. __asm volatile (
  528. //
  529. // Add a NOP to ensure we don’t have a flash read immediately before
  530. // the EPI read.
  531. //
  532. " NOP\n"
  533. " STRH %[value],[%[addr]]\n"
  534. " LDR %[scratch],[sp]\n"
  535. : [scratch] "=r" (ui32Scratch)
  536. : [addr] "r" (pui16Addr), [value] "r" (ui16Value)
  537. );
  538. //
  539. // Keep the compiler from generating a warning.
  540. //
  541. ui32Scratch = ui32Scratch;
  542. }
  543. inline uint16_t
  544. EPIWorkaroundHWordRead(uint16_t *pui16Addr)
  545. {
  546. register uint16_t ui16Data;
  547. register uint32_t ui32Scratch;
  548. //
  549. // ui32Scratch is not used other than to add a padding read following the
  550. // "real" read.
  551. //
  552. __asm volatile(
  553. //
  554. // Add a NOP to ensure we don’t have a flash read immediately before
  555. // the EPI read.
  556. //
  557. " NOP\n"
  558. " LDRH %[ret],[%[addr]]\n"
  559. " LDR %[scratch],[sp]\n"
  560. : [ret] "=r" (ui16Data),
  561. [scratch] "=r" (ui32Scratch)
  562. : [addr] "r" (pui16Addr)
  563. );
  564. //
  565. // Keep the compiler from generating a warning.
  566. //
  567. ui32Scratch = ui32Scratch;
  568. return(ui16Data);
  569. }
  570. inline void
  571. EPIWorkaroundByteWrite(uint8_t *pui8Addr, uint8_t ui8Value)
  572. {
  573. volatile register uint32_t ui32Scratch;
  574. __asm volatile (
  575. //
  576. // Add a NOP to ensure we don’t have a flash read immediately before
  577. // the EPI read.
  578. //
  579. " NOP\n"
  580. " STRB %[value],[%[addr]]\n"
  581. " LDR %[scratch],[sp]\n"
  582. : [scratch] "=r" (ui32Scratch)
  583. : [addr] "r" (pui8Addr), [value] "r" (ui8Value)
  584. );
  585. //
  586. // Keep the compiler from generating a warning.
  587. //
  588. ui32Scratch = ui32Scratch;
  589. }
  590. inline uint8_t
  591. EPIWorkaroundByteRead(uint8_t *pui8Addr)
  592. {
  593. register uint8_t ui8Data;
  594. register uint32_t ui32Scratch;
  595. //
  596. // ui32Scratch is not used other than to add a padding read following the
  597. // "real" read.
  598. //
  599. __asm volatile(
  600. //
  601. // Add a NOP to ensure we don’t have a flash read immediately before
  602. // the EPI read.
  603. //
  604. " NOP\n"
  605. " LDRB %[ret],[%[addr]]\n"
  606. " LDR %[scratch],[sp]\n"
  607. : [ret] "=r" (ui8Data),
  608. [scratch] "=r" (ui32Scratch)
  609. : [addr] "r" (pui8Addr)
  610. );
  611. //
  612. // Keep the compiler from generating a warning.
  613. //
  614. ui32Scratch = ui32Scratch;
  615. return(ui8Data);
  616. }
  617. #endif
  618. //*****************************************************************************
  619. //
  620. // API Function prototypes
  621. //
  622. //*****************************************************************************
  623. extern void EPIModeSet(uint32_t ui32Base, uint32_t ui32Mode);
  624. extern void EPIDividerSet(uint32_t ui32Base, uint32_t ui32Divider);
  625. extern void EPIDividerCSSet(uint32_t ui32Base, uint32_t ui32CS,
  626. uint32_t ui32Divider);
  627. extern void EPIDMATxCount(uint32_t ui32Base, uint32_t ui32Count);
  628. extern void EPIConfigGPModeSet(uint32_t ui32Base, uint32_t ui32Config,
  629. uint32_t ui32FrameCount, uint32_t ui32MaxWait);
  630. extern void EPIConfigHB8Set(uint32_t ui32Base, uint32_t ui32Config,
  631. uint32_t ui32MaxWait);
  632. extern void EPIConfigHB16Set(uint32_t ui32Base, uint32_t ui32Config,
  633. uint32_t ui32MaxWait);
  634. extern void EPIConfigHB8CSSet(uint32_t ui32Base, uint32_t ui32CS,
  635. uint32_t ui32Config);
  636. extern void EPIConfigHB16CSSet(uint32_t ui32Base, uint32_t ui32CS,
  637. uint32_t ui32Config);
  638. extern void EPIConfigHB8TimingSet(uint32_t ui32Base, uint32_t ui32CS,
  639. uint32_t ui32Config);
  640. extern void EPIConfigHB16TimingSet(uint32_t ui32Base, uint32_t ui32CS,
  641. uint32_t ui32Config);
  642. extern void EPIPSRAMConfigRegSet(uint32_t ui32Base, uint32_t ui32CS,
  643. uint32_t ui32CR);
  644. extern void EPIPSRAMConfigRegRead(uint32_t ui32Base, uint32_t ui32CS);
  645. extern bool EPIPSRAMConfigRegGetNonBlocking(uint32_t ui32Base,
  646. uint32_t ui32CS,
  647. uint32_t *pui32CR);
  648. extern uint32_t EPIPSRAMConfigRegGet(uint32_t ui32Base, uint32_t ui32CS);
  649. extern void EPIConfigSDRAMSet(uint32_t ui32Base, uint32_t ui32Config,
  650. uint32_t ui32Refresh);
  651. extern void EPIAddressMapSet(uint32_t ui32Base, uint32_t ui32Map);
  652. extern void EPINonBlockingReadConfigure(uint32_t ui32Base,
  653. uint32_t ui32Channel,
  654. uint32_t ui32DataSize,
  655. uint32_t ui32Address);
  656. extern void EPINonBlockingReadStart(uint32_t ui32Base,
  657. uint32_t ui32Channel,
  658. uint32_t ui32Count);
  659. extern void EPINonBlockingReadStop(uint32_t ui32Base,
  660. uint32_t ui32Channel);
  661. extern uint32_t EPINonBlockingReadCount(uint32_t ui32Base,
  662. uint32_t ui32Channel);
  663. extern uint32_t EPINonBlockingReadAvail(uint32_t ui32Base);
  664. extern uint32_t EPINonBlockingReadGet32(uint32_t ui32Base,
  665. uint32_t ui32Count,
  666. uint32_t *pui32Buf);
  667. extern uint32_t EPINonBlockingReadGet16(uint32_t ui32Base,
  668. uint32_t ui32Count,
  669. uint16_t *pui16Buf);
  670. extern uint32_t EPINonBlockingReadGet8(uint32_t ui32Base,
  671. uint32_t ui32Count,
  672. uint8_t *pui8Buf);
  673. extern void EPIFIFOConfig(uint32_t ui32Base, uint32_t ui32Config);
  674. extern uint32_t EPIWriteFIFOCountGet(uint32_t ui32Base);
  675. extern void EPIIntEnable(uint32_t ui32Base, uint32_t ui32IntFlags);
  676. extern void EPIIntDisable(uint32_t ui32Base, uint32_t ui32IntFlags);
  677. extern uint32_t EPIIntStatus(uint32_t ui32Base, bool bMasked);
  678. extern uint32_t EPIIntErrorStatus(uint32_t ui32Base);
  679. extern void EPIIntErrorClear(uint32_t ui32Base, uint32_t ui32ErrFlags);
  680. extern void EPIIntRegister(uint32_t ui32Base, void (*pfnHandler)(void));
  681. extern void EPIIntUnregister(uint32_t ui32Base);
  682. //*****************************************************************************
  683. //
  684. // Mark the end of the C bindings section for C++ compilers.
  685. //
  686. //*****************************************************************************
  687. #ifdef __cplusplus
  688. }
  689. #endif
  690. #endif // __DRIVERLIB_EPI_H__