drv_usart.c 19 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-10-30 SummerGift first version
  9. */
  10. #include "board.h"
  11. #include "drv_usart.h"
  12. #include "drv_config.h"
  13. #ifdef RT_USING_SERIAL
  14. //#define DRV_DEBUG
  15. #define LOG_TAG "drv.usart"
  16. #include <drv_log.h>
  17. #if !defined(BSP_USING_UART1) && !defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) \
  18. && !defined(BSP_USING_UART4) && !defined(BSP_USING_UART5) && !defined(BSP_USING_LPUART1)
  19. #error "Please define at least one BSP_USING_UARTx"
  20. /* this driver can be disabled at menuconfig → RT-Thread Components → Device Drivers */
  21. #endif
  22. #ifdef RT_SERIAL_USING_DMA
  23. static void stm32_dma_config(struct rt_serial_device *serial);
  24. #endif
  25. enum
  26. {
  27. #ifdef BSP_USING_UART1
  28. UART1_INDEX,
  29. #endif
  30. #ifdef BSP_USING_UART2
  31. UART2_INDEX,
  32. #endif
  33. #ifdef BSP_USING_UART3
  34. UART3_INDEX,
  35. #endif
  36. #ifdef BSP_USING_UART4
  37. UART4_INDEX,
  38. #endif
  39. #ifdef BSP_USING_UART5
  40. UART5_INDEX,
  41. #endif
  42. #ifdef BSP_USING_LPUART1
  43. LPUART1_INDEX,
  44. #endif
  45. };
  46. static struct stm32_uart_config uart_config[] =
  47. {
  48. #ifdef BSP_USING_UART1
  49. UART1_CONFIG,
  50. #endif
  51. #ifdef BSP_USING_UART2
  52. UART2_CONFIG,
  53. #endif
  54. #ifdef BSP_USING_UART3
  55. UART3_CONFIG,
  56. #endif
  57. #ifdef BSP_USING_UART4
  58. UART4_CONFIG,
  59. #endif
  60. #ifdef BSP_USING_UART5
  61. UART5_CONFIG,
  62. #endif
  63. #ifdef BSP_USING_LPUART1
  64. LPUART1_CONFIG,
  65. #endif
  66. };
  67. static struct stm32_uart uart_obj[sizeof(uart_config) / sizeof(uart_config[0])] = {0};
  68. static rt_err_t stm32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  69. {
  70. struct stm32_uart *uart;
  71. RT_ASSERT(serial != RT_NULL);
  72. RT_ASSERT(cfg != RT_NULL);
  73. uart = (struct stm32_uart *)serial->parent.user_data;
  74. RT_ASSERT(uart != RT_NULL);
  75. uart->handle.Instance = uart->config->Instance;
  76. uart->handle.Init.BaudRate = cfg->baud_rate;
  77. uart->handle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
  78. uart->handle.Init.Mode = UART_MODE_TX_RX;
  79. uart->handle.Init.OverSampling = UART_OVERSAMPLING_16;
  80. switch (cfg->data_bits)
  81. {
  82. case DATA_BITS_8:
  83. uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
  84. break;
  85. case DATA_BITS_9:
  86. uart->handle.Init.WordLength = UART_WORDLENGTH_9B;
  87. break;
  88. default:
  89. uart->handle.Init.WordLength = UART_WORDLENGTH_8B;
  90. break;
  91. }
  92. switch (cfg->stop_bits)
  93. {
  94. case STOP_BITS_1:
  95. uart->handle.Init.StopBits = UART_STOPBITS_1;
  96. break;
  97. case STOP_BITS_2:
  98. uart->handle.Init.StopBits = UART_STOPBITS_2;
  99. break;
  100. default:
  101. uart->handle.Init.StopBits = UART_STOPBITS_1;
  102. break;
  103. }
  104. switch (cfg->parity)
  105. {
  106. case PARITY_NONE:
  107. uart->handle.Init.Parity = UART_PARITY_NONE;
  108. break;
  109. case PARITY_ODD:
  110. uart->handle.Init.Parity = UART_PARITY_ODD;
  111. break;
  112. case PARITY_EVEN:
  113. uart->handle.Init.Parity = UART_PARITY_EVEN;
  114. break;
  115. default:
  116. uart->handle.Init.Parity = UART_PARITY_NONE;
  117. break;
  118. }
  119. if (HAL_UART_Init(&uart->handle) != HAL_OK)
  120. {
  121. return -RT_ERROR;
  122. }
  123. return RT_EOK;
  124. }
  125. static rt_err_t stm32_control(struct rt_serial_device *serial, int cmd, void *arg)
  126. {
  127. struct stm32_uart *uart;
  128. #ifdef RT_SERIAL_USING_DMA
  129. rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
  130. #endif
  131. RT_ASSERT(serial != RT_NULL);
  132. uart = (struct stm32_uart *)serial->parent.user_data;
  133. RT_ASSERT(uart != RT_NULL);
  134. switch (cmd)
  135. {
  136. /* disable interrupt */
  137. case RT_DEVICE_CTRL_CLR_INT:
  138. /* disable rx irq */
  139. NVIC_DisableIRQ(uart->config->irq_type);
  140. /* disable interrupt */
  141. __HAL_UART_DISABLE_IT(&(uart->handle), UART_IT_RXNE);
  142. break;
  143. /* enable interrupt */
  144. case RT_DEVICE_CTRL_SET_INT:
  145. /* enable rx irq */
  146. NVIC_EnableIRQ(uart->config->irq_type);
  147. /* enable interrupt */
  148. __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_RXNE);
  149. break;
  150. #ifdef RT_SERIAL_USING_DMA
  151. case RT_DEVICE_CTRL_CONFIG:
  152. if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX)
  153. {
  154. stm32_dma_config(serial);
  155. }
  156. break;
  157. #endif
  158. }
  159. return RT_EOK;
  160. }
  161. static int stm32_putc(struct rt_serial_device *serial, char c)
  162. {
  163. struct stm32_uart *uart;
  164. RT_ASSERT(serial != RT_NULL);
  165. uart = (struct stm32_uart *)serial->parent.user_data;
  166. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  167. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
  168. || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0)
  169. uart->handle.Instance->TDR = c;
  170. #else
  171. uart->handle.Instance->DR = c;
  172. #endif
  173. while (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) == RESET);
  174. return 1;
  175. }
  176. static int stm32_getc(struct rt_serial_device *serial)
  177. {
  178. int ch;
  179. struct stm32_uart *uart;
  180. RT_ASSERT(serial != RT_NULL);
  181. uart = (struct stm32_uart *)serial->parent.user_data;
  182. RT_ASSERT(uart != RT_NULL);
  183. ch = -1;
  184. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
  185. {
  186. #if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32F0) \
  187. || defined(SOC_SERIES_STM32L0) || defined(SOC_SERIES_STM32G0)
  188. ch = uart->handle.Instance->RDR & 0xff;
  189. #else
  190. ch = uart->handle.Instance->DR & 0xff;
  191. #endif
  192. }
  193. return ch;
  194. }
  195. static const struct rt_uart_ops stm32_uart_ops =
  196. {
  197. .configure = stm32_configure,
  198. .control = stm32_control,
  199. .putc = stm32_putc,
  200. .getc = stm32_getc,
  201. };
  202. /**
  203. * Uart common interrupt process. This need add to uart ISR.
  204. *
  205. * @param serial serial device
  206. */
  207. static void uart_isr(struct rt_serial_device *serial)
  208. {
  209. struct stm32_uart *uart;
  210. #ifdef RT_SERIAL_USING_DMA
  211. rt_size_t recv_total_index, recv_len;
  212. rt_base_t level;
  213. #endif
  214. RT_ASSERT(serial != RT_NULL);
  215. uart = (struct stm32_uart *) serial->parent.user_data;
  216. RT_ASSERT(uart != RT_NULL);
  217. /* UART in mode Receiver -------------------------------------------------*/
  218. if ((__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET) &&
  219. (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_RXNE) != RESET))
  220. {
  221. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  222. }
  223. #ifdef RT_SERIAL_USING_DMA
  224. else if ((uart->uart_dma_flag) && (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_IDLE) != RESET) &&
  225. (__HAL_UART_GET_IT_SOURCE(&(uart->handle), UART_IT_IDLE) != RESET))
  226. {
  227. level = rt_hw_interrupt_disable();
  228. recv_total_index = serial->config.bufsz - __HAL_DMA_GET_COUNTER(&(uart->dma.handle));
  229. recv_len = recv_total_index - uart->dma.last_index;
  230. uart->dma.last_index = recv_total_index;
  231. rt_hw_interrupt_enable(level);
  232. if (recv_len)
  233. {
  234. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  235. }
  236. __HAL_UART_CLEAR_IDLEFLAG(&uart->handle);
  237. }
  238. #endif
  239. else
  240. {
  241. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_ORE) != RESET)
  242. {
  243. __HAL_UART_CLEAR_OREFLAG(&uart->handle);
  244. }
  245. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_NE) != RESET)
  246. {
  247. __HAL_UART_CLEAR_NEFLAG(&uart->handle);
  248. }
  249. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_FE) != RESET)
  250. {
  251. __HAL_UART_CLEAR_FEFLAG(&uart->handle);
  252. }
  253. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_PE) != RESET)
  254. {
  255. __HAL_UART_CLEAR_PEFLAG(&uart->handle);
  256. }
  257. #if !defined(SOC_SERIES_STM32L4) && !defined(SOC_SERIES_STM32F7) && !defined(SOC_SERIES_STM32F0) \
  258. && !defined(SOC_SERIES_STM32L0) && !defined(SOC_SERIES_STM32G0)
  259. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_LBD) != RESET)
  260. {
  261. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_LBD);
  262. }
  263. #endif
  264. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_CTS) != RESET)
  265. {
  266. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_CTS);
  267. }
  268. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TXE) != RESET)
  269. {
  270. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TXE);
  271. }
  272. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_TC) != RESET)
  273. {
  274. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_TC);
  275. }
  276. if (__HAL_UART_GET_FLAG(&(uart->handle), UART_FLAG_RXNE) != RESET)
  277. {
  278. UART_INSTANCE_CLEAR_FUNCTION(&(uart->handle), UART_FLAG_RXNE);
  279. }
  280. }
  281. }
  282. #if defined(BSP_USING_UART1)
  283. void USART1_IRQHandler(void)
  284. {
  285. /* enter interrupt */
  286. rt_interrupt_enter();
  287. uart_isr(&(uart_obj[UART1_INDEX].serial));
  288. /* leave interrupt */
  289. rt_interrupt_leave();
  290. }
  291. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA)
  292. void UART1_DMA_RX_IRQHandler(void)
  293. {
  294. /* enter interrupt */
  295. rt_interrupt_enter();
  296. HAL_DMA_IRQHandler(&uart_obj[UART1_INDEX].dma.handle);
  297. /* leave interrupt */
  298. rt_interrupt_leave();
  299. }
  300. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART1_RX_USING_DMA) */
  301. #endif /* BSP_USING_UART1 */
  302. #if defined(BSP_USING_UART2)
  303. void USART2_IRQHandler(void)
  304. {
  305. /* enter interrupt */
  306. rt_interrupt_enter();
  307. uart_isr(&(uart_obj[UART2_INDEX].serial));
  308. /* leave interrupt */
  309. rt_interrupt_leave();
  310. }
  311. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA)
  312. void UART2_DMA_RX_IRQHandler(void)
  313. {
  314. /* enter interrupt */
  315. rt_interrupt_enter();
  316. HAL_DMA_IRQHandler(&uart_obj[UART2_INDEX].dma.handle);
  317. /* leave interrupt */
  318. rt_interrupt_leave();
  319. }
  320. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART2_RX_USING_DMA) */
  321. #endif /* BSP_USING_UART2 */
  322. #if defined(BSP_USING_UART3)
  323. void USART3_IRQHandler(void)
  324. {
  325. /* enter interrupt */
  326. rt_interrupt_enter();
  327. uart_isr(&(uart_obj[UART3_INDEX].serial));
  328. /* leave interrupt */
  329. rt_interrupt_leave();
  330. }
  331. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART3_RX_USING_DMA)
  332. void UART3_DMA_RX_IRQHandler(void)
  333. {
  334. /* enter interrupt */
  335. rt_interrupt_enter();
  336. HAL_DMA_IRQHandler(&uart_obj[UART3_INDEX].dma.handle);
  337. /* leave interrupt */
  338. rt_interrupt_leave();
  339. }
  340. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART3_RX_USING_DMA) */
  341. #endif /* BSP_USING_UART3*/
  342. #if defined(BSP_USING_UART4)
  343. void UART4_IRQHandler(void)
  344. {
  345. /* enter interrupt */
  346. rt_interrupt_enter();
  347. uart_isr(&(uart_obj[UART4_INDEX].serial));
  348. /* leave interrupt */
  349. rt_interrupt_leave();
  350. }
  351. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART4_RX_USING_DMA)
  352. void UART4_DMA_RX_IRQHandler(void)
  353. {
  354. /* enter interrupt */
  355. rt_interrupt_enter();
  356. HAL_DMA_IRQHandler(&uart_obj[UART4_INDEX].dma.handle);
  357. /* leave interrupt */
  358. rt_interrupt_leave();
  359. }
  360. #endif /* defined(BSP_UART_USING_DMA_RX) && defined(BSP_UART4_RX_USING_DMA) */
  361. #endif /* BSP_USING_UART4*/
  362. #if defined(BSP_USING_UART5)
  363. void UART5_IRQHandler(void)
  364. {
  365. /* enter interrupt */
  366. rt_interrupt_enter();
  367. uart_isr(&(uart_obj[UART5_INDEX].serial));
  368. /* leave interrupt */
  369. rt_interrupt_leave();
  370. }
  371. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA)
  372. void UART5_DMA_RX_IRQHandler(void)
  373. {
  374. /* enter interrupt */
  375. rt_interrupt_enter();
  376. HAL_DMA_IRQHandler(&uart_obj[UART5_INDEX].dma.handle);
  377. /* leave interrupt */
  378. rt_interrupt_leave();
  379. }
  380. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_UART5_RX_USING_DMA) */
  381. #endif /* BSP_USING_UART5*/
  382. #if defined(BSP_USING_LPUART1)
  383. void LPUART1_IRQHandler(void)
  384. {
  385. /* enter interrupt */
  386. rt_interrupt_enter();
  387. uart_isr(&(uart_obj[LPUART1_INDEX].serial));
  388. /* leave interrupt */
  389. rt_interrupt_leave();
  390. }
  391. #if defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA)
  392. void LPUART1_DMA_RX_IRQHandler(void)
  393. {
  394. /* enter interrupt */
  395. rt_interrupt_enter();
  396. HAL_DMA_IRQHandler(&uart_obj[LPUART1_INDEX].dma.handle);
  397. /* leave interrupt */
  398. rt_interrupt_leave();
  399. }
  400. #endif /* defined(RT_SERIAL_USING_DMA) && defined(BSP_LPUART1_RX_USING_DMA) */
  401. #endif /* BSP_USING_LPUART1*/
  402. #ifdef RT_SERIAL_USING_DMA
  403. static void stm32_dma_config(struct rt_serial_device *serial)
  404. {
  405. RT_ASSERT(serial != RT_NULL);
  406. struct stm32_uart *uart = (struct stm32_uart *)serial->parent.user_data;
  407. RT_ASSERT(uart != RT_NULL);
  408. struct rt_serial_rx_fifo *rx_fifo;
  409. LOG_D("%s dma config start", uart->config->name);
  410. {
  411. rt_uint32_t tmpreg= 0x00U;
  412. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) \
  413. || defined(SOC_SERIES_STM32L0)
  414. /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
  415. SET_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc);
  416. tmpreg = READ_BIT(RCC->AHBENR, uart->config->dma_rx->dma_rcc);
  417. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
  418. /* enable DMA clock && Delay after an RCC peripheral clock enabling*/
  419. SET_BIT(RCC->AHB1ENR, uart->config->dma_rx->dma_rcc);
  420. tmpreg = READ_BIT(RCC->AHB1ENR, uart->config->dma_rx->dma_rcc);
  421. #endif
  422. UNUSED(tmpreg); /* To avoid compiler warnings */
  423. }
  424. __HAL_LINKDMA(&(uart->handle), hdmarx, uart->dma.handle);
  425. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32L0)
  426. uart->dma.handle.Instance = uart->config->dma_rx->Instance;
  427. #elif defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  428. uart->dma.handle.Instance = uart->config->dma_rx->Instance;
  429. uart->dma.handle.Init.Channel = uart->config->dma_rx->channel;
  430. #elif defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
  431. uart->dma.handle.Instance = uart->config->dma_rx->Instance;
  432. uart->dma.handle.Init.Request = uart->config->dma_rx->request;
  433. #endif
  434. uart->dma.handle.Init.Direction = DMA_PERIPH_TO_MEMORY;
  435. uart->dma.handle.Init.PeriphInc = DMA_PINC_DISABLE;
  436. uart->dma.handle.Init.MemInc = DMA_MINC_ENABLE;
  437. uart->dma.handle.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE;
  438. uart->dma.handle.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE;
  439. uart->dma.handle.Init.Mode = DMA_CIRCULAR;
  440. uart->dma.handle.Init.Priority = DMA_PRIORITY_MEDIUM;
  441. #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  442. uart->dma.handle.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
  443. #endif
  444. if (HAL_DMA_DeInit(&(uart->dma.handle)) != HAL_OK)
  445. {
  446. RT_ASSERT(0);
  447. }
  448. if (HAL_DMA_Init(&(uart->dma.handle)) != HAL_OK)
  449. {
  450. RT_ASSERT(0);
  451. }
  452. rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
  453. /* Start DMA transfer */
  454. if (HAL_UART_Receive_DMA(&(uart->handle), rx_fifo->buffer, serial->config.bufsz) != HAL_OK)
  455. {
  456. /* Transfer error in reception process */
  457. RT_ASSERT(0);
  458. }
  459. /* enable interrupt */
  460. __HAL_UART_ENABLE_IT(&(uart->handle), UART_IT_IDLE);
  461. /* enable rx irq */
  462. HAL_NVIC_SetPriority(uart->config->dma_rx->dma_irq, 0, 0);
  463. HAL_NVIC_EnableIRQ(uart->config->dma_rx->dma_irq);
  464. HAL_NVIC_SetPriority(uart->config->irq_type, 1, 0);
  465. HAL_NVIC_EnableIRQ(uart->config->irq_type);
  466. LOG_D("%s dma RX instance: %x", uart->config->name, uart->dma.handle.Instance);
  467. LOG_D("%s dma config done", uart->config->name);
  468. }
  469. /**
  470. * @brief UART error callbacks
  471. * @param huart: UART handle
  472. * @note This example shows a simple way to report transfer error, and you can
  473. * add your own implementation.
  474. * @retval None
  475. */
  476. void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
  477. {
  478. RT_ASSERT(huart != NULL);
  479. struct stm32_uart *uart = (struct stm32_uart *)huart;
  480. LOG_D("%s: %s %d\n", __FUNCTION__, uart->config->name, huart->ErrorCode);
  481. UNUSED(uart);
  482. }
  483. /**
  484. * @brief Rx Transfer completed callback
  485. * @param huart: UART handle
  486. * @note This example shows a simple way to report end of DMA Rx transfer, and
  487. * you can add your own implementation.
  488. * @retval None
  489. */
  490. void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
  491. {
  492. struct rt_serial_device *serial;
  493. struct stm32_uart *uart;
  494. rt_size_t recv_len;
  495. rt_base_t level;
  496. RT_ASSERT(huart != NULL);
  497. uart = (struct stm32_uart *)huart;
  498. serial = &uart->serial;
  499. level = rt_hw_interrupt_disable();
  500. recv_len = serial->config.bufsz - uart->dma.last_index;
  501. uart->dma.last_index = 0;
  502. rt_hw_interrupt_enable(level);
  503. if (recv_len)
  504. {
  505. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (recv_len << 8));
  506. }
  507. }
  508. #endif /* RT_SERIAL_USING_DMA */
  509. static void stm32_uart_get_dma_config(void)
  510. {
  511. #ifdef BSP_UART1_RX_USING_DMA
  512. uart_obj[UART1_INDEX].uart_dma_flag = 1;
  513. static struct dma_config uart1_dma_rx = UART1_DMA_CONFIG;
  514. uart_config[UART1_INDEX].dma_rx = &uart1_dma_rx;
  515. #endif
  516. #ifdef BSP_UART2_RX_USING_DMA
  517. uart_obj[UART2_INDEX].uart_dma_flag = 1;
  518. static struct dma_config uart2_dma_rx = UART2_DMA_CONFIG;
  519. uart_config[UART2_INDEX].dma_rx = &uart2_dma_rx;
  520. #endif
  521. #ifdef BSP_UART3_RX_USING_DMA
  522. uart_obj[UART3_INDEX].uart_dma_flag = 1;
  523. static struct dma_config uart3_dma_rx = UART3_DMA_CONFIG;
  524. uart_config[UART3_INDEX].dma_rx = &uart3_dma_rx;
  525. #endif
  526. #ifdef BSP_UART4_RX_USING_DMA
  527. uart_obj[UART4_INDEX].uart_dma_flag = 1;
  528. static struct dma_config uart4_dma_rx = UART4_DMA_CONFIG;
  529. uart_config[UART4_INDEX].dma_rx = &uart4_dma_rx;
  530. #endif
  531. #ifdef BSP_UART5_RX_USING_DMA
  532. uart_obj[UART5_INDEX].uart_dma_flag = 1;
  533. static struct dma_config uart5_dma_rx = UART5_DMA_CONFIG;
  534. uart_config[UART5_INDEX].dma_rx = &uart5_dma_rx;
  535. #endif
  536. #ifdef BSP_LPUART1_RX_USING_DMA
  537. uart_obj[LPUART1_INDEX].uart_dma_flag = 1;
  538. static struct dma_config lpuart1_dma_rx = LPUART1_DMA_CONFIG;
  539. uart_config[LPUART1_INDEX].dma_rx = &lpuart1_dma_rx;
  540. #endif
  541. }
  542. int rt_hw_usart_init(void)
  543. {
  544. rt_size_t obj_num = sizeof(uart_obj) / sizeof(struct stm32_uart);
  545. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  546. rt_err_t result = 0;
  547. stm32_uart_get_dma_config();
  548. for (int i = 0; i < obj_num; i++)
  549. {
  550. uart_obj[i].config = &uart_config[i];
  551. uart_obj[i].serial.ops = &stm32_uart_ops;
  552. uart_obj[i].serial.config = config;
  553. #if defined(RT_SERIAL_USING_DMA)
  554. if(uart_obj[i].uart_dma_flag)
  555. {
  556. /* register UART device */
  557. result = rt_hw_serial_register(&uart_obj[i].serial,uart_obj[i].config->name,
  558. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX| RT_DEVICE_FLAG_DMA_RX
  559. ,&uart_obj[i]);
  560. }
  561. else
  562. #endif
  563. {
  564. /* register UART device */
  565. result = rt_hw_serial_register(&uart_obj[i].serial,uart_obj[i].config->name,
  566. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX
  567. ,&uart_obj[i]);
  568. }
  569. RT_ASSERT(result == RT_EOK);
  570. }
  571. return result;
  572. }
  573. #endif /* RT_USING_SERIAL */