board.c 3.2 KB

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  1. /*
  2. * File : board.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2009 RT-Thread Develop Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2009-01-05 Bernard first implementation
  13. */
  14. #include <board.h>
  15. void SystemClock_Config(void)
  16. {
  17. RCC_OscInitTypeDef RCC_OscInitStruct = {0};
  18. RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
  19. RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
  20. /**Configure LSE Drive Capability
  21. */
  22. HAL_PWR_EnableBkUpAccess();
  23. __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
  24. /**Initializes the CPU, AHB and APB busses clocks
  25. */
  26. RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI|RCC_OSCILLATORTYPE_LSE
  27. |RCC_OSCILLATORTYPE_MSI;
  28. RCC_OscInitStruct.LSEState = RCC_LSE_ON;
  29. RCC_OscInitStruct.LSIState = RCC_LSI_ON;
  30. RCC_OscInitStruct.MSIState = RCC_MSI_ON;
  31. RCC_OscInitStruct.MSICalibrationValue = 0;
  32. RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
  33. RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
  34. RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
  35. RCC_OscInitStruct.PLL.PLLM = 1;
  36. RCC_OscInitStruct.PLL.PLLN = 40;
  37. RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
  38. RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
  39. RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
  40. if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
  41. {
  42. Error_Handler();
  43. }
  44. /**Initializes the CPU, AHB and APB busses clocks
  45. */
  46. RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
  47. |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
  48. RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
  49. RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
  50. RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
  51. RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
  52. if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
  53. {
  54. Error_Handler();
  55. }
  56. PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART2
  57. |RCC_PERIPHCLK_USART3|RCC_PERIPHCLK_LPUART1
  58. |RCC_PERIPHCLK_SDMMC1|RCC_PERIPHCLK_ADC;
  59. PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
  60. PeriphClkInit.Usart3ClockSelection = RCC_USART3CLKSOURCE_PCLK1;
  61. PeriphClkInit.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
  62. PeriphClkInit.AdcClockSelection = RCC_ADCCLKSOURCE_PLLSAI1;
  63. PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
  64. PeriphClkInit.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_PLLSAI1;
  65. PeriphClkInit.PLLSAI1.PLLSAI1Source = RCC_PLLSOURCE_MSI;
  66. PeriphClkInit.PLLSAI1.PLLSAI1M = 1;
  67. PeriphClkInit.PLLSAI1.PLLSAI1N = 16;
  68. PeriphClkInit.PLLSAI1.PLLSAI1P = RCC_PLLP_DIV2;
  69. PeriphClkInit.PLLSAI1.PLLSAI1Q = RCC_PLLQ_DIV2;
  70. PeriphClkInit.PLLSAI1.PLLSAI1R = RCC_PLLR_DIV2;
  71. PeriphClkInit.PLLSAI1.PLLSAI1ClockOut = RCC_PLLSAI1_48M2CLK|RCC_PLLSAI1_ADC1CLK;
  72. if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
  73. {
  74. Error_Handler();
  75. }
  76. /**Configure the main internal regulator output voltage
  77. */
  78. if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
  79. {
  80. Error_Handler();
  81. }
  82. }