drv_uart.c 6.9 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2023/06/25 flyingcys first version
  9. * 2023/10/25 flyingcys update uart configure
  10. */
  11. #include <rthw.h>
  12. #include <rtthread.h>
  13. #include <rtdevice.h>
  14. #include "board.h"
  15. #include "drv_uart.h"
  16. #define DBG_TAG "DRV.UART"
  17. #define DBG_LVL DBG_WARNING
  18. #include <rtdbg.h>
  19. /*
  20. * Divide positive or negative dividend by positive divisor and round
  21. * to closest integer. Result is undefined for negative divisors and
  22. * for negative dividends if the divisor variable type is unsigned.
  23. */
  24. #define DIV_ROUND_CLOSEST(x, divisor)( \
  25. { \
  26. typeof(x) __x = x; \
  27. typeof(divisor) __d = divisor; \
  28. (((typeof(x))-1) > 0 || \
  29. ((typeof(divisor))-1) > 0 || (__x) > 0) ? \
  30. (((__x) + ((__d) / 2)) / (__d)) : \
  31. (((__x) - ((__d) / 2)) / (__d)); \
  32. } \
  33. )
  34. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  35. struct hw_uart_device
  36. {
  37. rt_ubase_t hw_base;
  38. rt_uint32_t irqno;
  39. };
  40. #define BSP_DEFINE_UART_DEVICE(no) \
  41. static struct hw_uart_device _uart##no##_device = \
  42. { \
  43. UART##no##_BASE, \
  44. UART##no##_IRQ \
  45. }; \
  46. static struct rt_serial_device _serial##no;
  47. #ifdef RT_USING_UART0
  48. BSP_DEFINE_UART_DEVICE(0);
  49. #endif
  50. #ifdef RT_USING_UART1
  51. BSP_DEFINE_UART_DEVICE(1);
  52. #endif
  53. #ifdef RT_USING_UART2
  54. BSP_DEFINE_UART_DEVICE(2);
  55. #endif
  56. #ifdef RT_USING_UART3
  57. BSP_DEFINE_UART_DEVICE(3);
  58. #endif
  59. rt_inline rt_uint32_t dw8250_read32(rt_ubase_t addr, rt_ubase_t offset)
  60. {
  61. return *((volatile rt_uint32_t *)(addr + (offset << UART_REG_SHIFT)));
  62. }
  63. rt_inline void dw8250_write32(rt_ubase_t addr, rt_ubase_t offset, rt_uint32_t value)
  64. {
  65. *((volatile rt_uint32_t *)(addr + (offset << UART_REG_SHIFT))) = value;
  66. if (offset == UART_LCR)
  67. {
  68. int tries = 1000;
  69. /* Make sure LCR write wasn't ignored */
  70. while (tries--)
  71. {
  72. unsigned int lcr = dw8250_read32(addr, UART_LCR);
  73. if ((value & ~UART_LCR_STKP) == (lcr & ~UART_LCR_STKP))
  74. {
  75. return;
  76. }
  77. dw8250_write32(addr, UART_FCR, UART_FCR_DEFVAL);
  78. dw8250_read32(addr, UART_RX);
  79. *((volatile rt_uint32_t *)(addr + (offset << UART_REG_SHIFT))) = value;
  80. }
  81. }
  82. }
  83. static void dw8250_uart_setbrg(rt_ubase_t addr, int baud_divisor)
  84. {
  85. /* to keep serial format, read lcr before writing BKSE */
  86. int lcr_val = dw8250_read32(addr, UART_LCR) & ~UART_LCR_BKSE;
  87. dw8250_write32(addr, UART_LCR, UART_LCR_BKSE | lcr_val);
  88. dw8250_write32(addr, UART_DLL, baud_divisor & 0xff);
  89. dw8250_write32(addr, UART_DLM, (baud_divisor >> 8) & 0xff);
  90. dw8250_write32(addr, UART_LCR, lcr_val);
  91. }
  92. static rt_err_t dw8250_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  93. {
  94. rt_base_t base;
  95. struct hw_uart_device *uart;
  96. int clock_divisor;
  97. RT_ASSERT(serial != RT_NULL);
  98. uart = (struct hw_uart_device *)serial->parent.user_data;
  99. base = uart->hw_base;
  100. while (!(dw8250_read32(base, UART_LSR) & UART_LSR_TEMT));
  101. dw8250_write32(base, UART_IER, 0);
  102. dw8250_write32(base, UART_MCR, UART_MCRVAL);
  103. dw8250_write32(base, UART_FCR, UART_FCR_DEFVAL);
  104. /* initialize serial config to 8N1 before writing baudrate */
  105. dw8250_write32(base, UART_LCR, UART_LCR_8N1);
  106. clock_divisor = DIV_ROUND_CLOSEST(UART_INPUT_CLK, 16 * serial->config.baud_rate);
  107. dw8250_uart_setbrg(base, clock_divisor);
  108. return RT_EOK;
  109. }
  110. static rt_err_t dw8250_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
  111. {
  112. struct hw_uart_device *uart;
  113. RT_ASSERT(serial != RT_NULL);
  114. uart = (struct hw_uart_device *)serial->parent.user_data;
  115. switch (cmd)
  116. {
  117. case RT_DEVICE_CTRL_CLR_INT:
  118. /* Disable rx irq */
  119. dw8250_write32(uart->hw_base, UART_IER, !UART_IER_RDI);
  120. rt_hw_interrupt_mask(uart->irqno);
  121. break;
  122. case RT_DEVICE_CTRL_SET_INT:
  123. /* Enable rx irq */
  124. dw8250_write32(uart->hw_base, UART_IER, UART_IER_RDI);
  125. rt_hw_interrupt_umask(uart->irqno);
  126. break;
  127. }
  128. return RT_EOK;
  129. }
  130. static int dw8250_uart_putc(struct rt_serial_device *serial, char c)
  131. {
  132. rt_base_t base;
  133. struct hw_uart_device *uart;
  134. RT_ASSERT(serial != RT_NULL);
  135. uart = (struct hw_uart_device *)serial->parent.user_data;
  136. base = uart->hw_base;
  137. while ((dw8250_read32(base, UART_LSR) & BOTH_EMPTY) != BOTH_EMPTY);
  138. dw8250_write32(base, UART_TX, c);
  139. return 1;
  140. }
  141. static int dw8250_uart_getc(struct rt_serial_device *serial)
  142. {
  143. int ch = -1;
  144. rt_base_t base;
  145. struct hw_uart_device *uart;
  146. RT_ASSERT(serial != RT_NULL);
  147. uart = (struct hw_uart_device *)serial->parent.user_data;
  148. base = uart->hw_base;
  149. if (dw8250_read32(base, UART_LSR) & UART_LSR_DR)
  150. {
  151. ch = dw8250_read32(base, UART_RX) & 0xff;
  152. }
  153. return ch;
  154. }
  155. static const struct rt_uart_ops _uart_ops =
  156. {
  157. dw8250_uart_configure,
  158. dw8250_uart_control,
  159. dw8250_uart_putc,
  160. dw8250_uart_getc,
  161. };
  162. static void rt_hw_uart_isr(int irqno, void *param)
  163. {
  164. unsigned int iir, status;
  165. struct rt_serial_device *serial = (struct rt_serial_device *)param;
  166. struct hw_uart_device *uart = (struct hw_uart_device *)serial->parent.user_data;
  167. iir = dw8250_read32(uart->hw_base, UART_IIR);
  168. /* If don't do this in non-DMA mode then the "RX TIMEOUT" interrupt will fire forever. */
  169. if ((iir & 0x3f) == UART_IIR_RX_TIMEOUT)
  170. {
  171. status = dw8250_read32(uart->hw_base, UART_LSR);
  172. if (!(status & (UART_LSR_DR | UART_LSR_BI)))
  173. {
  174. dw8250_read32(uart->hw_base, UART_RX);
  175. }
  176. }
  177. if (!(iir & UART_IIR_NO_INT))
  178. {
  179. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  180. }
  181. if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY)
  182. {
  183. /* Clear the USR */
  184. dw8250_read32(uart->hw_base, UART_USR);
  185. return;
  186. }
  187. }
  188. int rt_hw_uart_init(void)
  189. {
  190. struct hw_uart_device* uart;
  191. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  192. config.baud_rate = 115200;
  193. #define BSP_INSTALL_UART_DEVICE(no) \
  194. uart = &_uart##no##_device; \
  195. _serial##no.ops = &_uart_ops; \
  196. _serial##no.config = config; \
  197. rt_hw_serial_register(&_serial##no, "uart" #no, RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX, uart); \
  198. rt_hw_interrupt_install(uart->irqno, rt_hw_uart_isr, &_serial##no, "uart" #no);
  199. #ifdef RT_USING_UART0
  200. BSP_INSTALL_UART_DEVICE(0);
  201. #endif
  202. #ifdef RT_USING_UART1
  203. BSP_INSTALL_UART_DEVICE(1);
  204. #endif
  205. #ifdef RT_USING_UART2
  206. BSP_INSTALL_UART_DEVICE(2);
  207. #endif
  208. #ifdef RT_USING_UART3
  209. BSP_INSTALL_UART_DEVICE(3);
  210. #endif
  211. return 0;
  212. }