drv_gpio.c 15 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2021-08-15 Jonas first version
  9. */
  10. #include <board.h>
  11. #include "drv_gpio.h"
  12. #ifdef RT_USING_PIN
  13. #define PIN_NUM(port, no) (((((port) & 0xFu) << 4) | ((no) & 0xFu)))
  14. #define PIN_PORT(pin) ((uint8_t)(((pin) >> 4) & 0xFu))
  15. #define PIN_NO(pin) ((uint8_t)((pin) & 0xFu))
  16. #define PIN_HKPORTSOURCE(pin) ((uint8_t)(((pin) & 0xF0u) >> 4))
  17. #define PIN_HKPINSOURCE(pin) ((uint8_t)((pin) & 0xFu))
  18. #define PIN_HKPORT(pin) ((GPIO_TypeDef *)(GPIOA_BASE + (0x400u * PIN_PORT(pin))))
  19. #define PIN_HKPIN(pin) ((uint16_t)(1u << PIN_NO(pin)))
  20. #if defined(GPIOZ)
  21. #define __HK32_PORT_MAX 12u
  22. #elif defined(GPIOK)
  23. #define __HK32_PORT_MAX 11u
  24. #elif defined(GPIOJ)
  25. #define __HK32_PORT_MAX 10u
  26. #elif defined(GPIOI)
  27. #define __HK32_PORT_MAX 9u
  28. #elif defined(GPIOH)
  29. #define __HK32_PORT_MAX 8u
  30. #elif defined(GPIOG)
  31. #define __HK32_PORT_MAX 7u
  32. #elif defined(GPIOF)
  33. #define __HK32_PORT_MAX 6u
  34. #elif defined(GPIOE)
  35. #define __HK32_PORT_MAX 5u
  36. #elif defined(GPIOD)
  37. #define __HK32_PORT_MAX 4u
  38. #elif defined(GPIOC)
  39. #define __HK32_PORT_MAX 3u
  40. #elif defined(GPIOB)
  41. #define __HK32_PORT_MAX 2u
  42. #elif defined(GPIOA)
  43. #define __HK32_PORT_MAX 1u
  44. #else
  45. #define __HK32_PORT_MAX 0u
  46. #error Unsupported HK32 GPIO peripheral.
  47. #endif
  48. #define PIN_HKPORT_MAX __HK32_PORT_MAX
  49. static const struct pin_irq_map pin_irq_map[] =
  50. {
  51. {GPIO_Pin_0, EXTI_Line0, EXTI0_1_IRQn},
  52. {GPIO_Pin_1, EXTI_Line1, EXTI0_1_IRQn},
  53. {GPIO_Pin_2, EXTI_Line2, EXTI2_3_IRQn},
  54. {GPIO_Pin_3, EXTI_Line3, EXTI2_3_IRQn},
  55. {GPIO_Pin_4, EXTI_Line4, EXTI4_15_IRQn},
  56. {GPIO_Pin_5, EXTI_Line5, EXTI4_15_IRQn},
  57. {GPIO_Pin_6, EXTI_Line6, EXTI4_15_IRQn},
  58. {GPIO_Pin_7, EXTI_Line7, EXTI4_15_IRQn},
  59. {GPIO_Pin_8, EXTI_Line8, EXTI4_15_IRQn},
  60. {GPIO_Pin_9, EXTI_Line9, EXTI4_15_IRQn},
  61. {GPIO_Pin_10, EXTI_Line10, EXTI4_15_IRQn},
  62. {GPIO_Pin_11, EXTI_Line11, EXTI4_15_IRQn},
  63. {GPIO_Pin_12, EXTI_Line12, EXTI4_15_IRQn},
  64. {GPIO_Pin_13, EXTI_Line13, EXTI4_15_IRQn},
  65. {GPIO_Pin_14, EXTI_Line14, EXTI4_15_IRQn},
  66. {GPIO_Pin_15, EXTI_Line15, EXTI4_15_IRQn},
  67. };
  68. static struct rt_pin_irq_hdr pin_irq_hdr_tab[] =
  69. {
  70. {-1, 0, RT_NULL, RT_NULL},
  71. {-1, 0, RT_NULL, RT_NULL},
  72. {-1, 0, RT_NULL, RT_NULL},
  73. {-1, 0, RT_NULL, RT_NULL},
  74. {-1, 0, RT_NULL, RT_NULL},
  75. {-1, 0, RT_NULL, RT_NULL},
  76. {-1, 0, RT_NULL, RT_NULL},
  77. {-1, 0, RT_NULL, RT_NULL},
  78. {-1, 0, RT_NULL, RT_NULL},
  79. {-1, 0, RT_NULL, RT_NULL},
  80. {-1, 0, RT_NULL, RT_NULL},
  81. {-1, 0, RT_NULL, RT_NULL},
  82. {-1, 0, RT_NULL, RT_NULL},
  83. {-1, 0, RT_NULL, RT_NULL},
  84. {-1, 0, RT_NULL, RT_NULL},
  85. {-1, 0, RT_NULL, RT_NULL},
  86. };
  87. static uint32_t pin_irq_enable_mask = 0;
  88. #define ITEM_NUM(items) sizeof(items) / sizeof(items[0])
  89. static void hk32_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value)
  90. {
  91. GPIO_TypeDef *gpio_port;
  92. uint16_t gpio_pin;
  93. if (PIN_PORT(pin) < PIN_HKPORT_MAX)
  94. {
  95. gpio_port = PIN_HKPORT(pin);
  96. gpio_pin = PIN_HKPIN(pin);
  97. GPIO_WriteBit(gpio_port, gpio_pin, (BitAction)value);
  98. }
  99. }
  100. static rt_int8_t hk32_pin_read(rt_device_t dev, rt_base_t pin)
  101. {
  102. GPIO_TypeDef *gpio_port;
  103. uint16_t gpio_pin;
  104. rt_int8_t value;
  105. value = PIN_LOW;
  106. if (PIN_PORT(pin) < PIN_HKPORT_MAX)
  107. {
  108. gpio_port = PIN_HKPORT(pin);
  109. gpio_pin = PIN_HKPIN(pin);
  110. value = GPIO_ReadInputDataBit(gpio_port, gpio_pin);
  111. }
  112. return value;
  113. }
  114. static void hk32_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode)
  115. {
  116. GPIO_InitTypeDef GPIO_InitStruct;
  117. GPIO_TypeDef *gpio_port;
  118. uint16_t gpio_pin;
  119. if (PIN_PORT(pin) < PIN_HKPORT_MAX)
  120. {
  121. gpio_port = PIN_HKPORT(pin);
  122. gpio_pin = PIN_HKPIN(pin);
  123. }
  124. else
  125. {
  126. return;
  127. }
  128. /* Configure GPIO_InitStructure */
  129. GPIO_StructInit(&GPIO_InitStruct);
  130. GPIO_InitStruct.GPIO_Pin = gpio_pin;
  131. GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
  132. GPIO_InitStruct.GPIO_OType = GPIO_OType_PP;
  133. GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_NOPULL;
  134. GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
  135. if (mode == PIN_MODE_OUTPUT)
  136. {
  137. /* output setting */
  138. GPIO_InitStruct.GPIO_Mode = GPIO_Mode_OUT;
  139. }
  140. else if (mode == PIN_MODE_INPUT)
  141. {
  142. /* input setting: not pull. */
  143. GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN;
  144. }
  145. else if (mode == PIN_MODE_INPUT_PULLUP)
  146. {
  147. /* input setting: pull up. */
  148. GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN;
  149. GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
  150. }
  151. else if (mode == PIN_MODE_INPUT_PULLDOWN)
  152. {
  153. /* input setting: pull down. */
  154. GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IN;
  155. GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_DOWN;
  156. }
  157. else if (mode == PIN_MODE_OUTPUT_OD)
  158. {
  159. /* output setting: od. */
  160. GPIO_InitStruct.GPIO_OType = GPIO_OType_OD;
  161. }
  162. GPIO_Init(gpio_port, &GPIO_InitStruct);
  163. }
  164. rt_inline rt_int32_t bit2bitno(rt_uint32_t bit)
  165. {
  166. int i;
  167. for (i = 0; i < 32; i++)
  168. {
  169. if ((0x01 << i) == bit)
  170. {
  171. return i;
  172. }
  173. }
  174. return -1;
  175. }
  176. rt_inline const struct pin_irq_map *get_pin_irq_map(uint32_t pinbit)
  177. {
  178. rt_int32_t mapindex = bit2bitno(pinbit);
  179. if (mapindex < 0 || mapindex >= ITEM_NUM(pin_irq_map))
  180. {
  181. return RT_NULL;
  182. }
  183. return &pin_irq_map[mapindex];
  184. };
  185. static rt_err_t hk32_pin_attach_irq(struct rt_device *device, rt_base_t pin,
  186. rt_uint8_t mode, void (*hdr)(void *args), void *args)
  187. {
  188. rt_base_t level;
  189. rt_int32_t irqindex = -1;
  190. uint16_t gpio_pin;
  191. if (PIN_PORT(pin) < PIN_HKPORT_MAX)
  192. {
  193. gpio_pin = PIN_HKPIN(pin);
  194. }
  195. else
  196. {
  197. return -RT_ENOSYS;
  198. }
  199. irqindex = bit2bitno(gpio_pin);
  200. if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
  201. {
  202. return -RT_ENOSYS;
  203. }
  204. level = rt_hw_interrupt_disable();
  205. if (pin_irq_hdr_tab[irqindex].pin == pin &&
  206. pin_irq_hdr_tab[irqindex].hdr == hdr &&
  207. pin_irq_hdr_tab[irqindex].mode == mode &&
  208. pin_irq_hdr_tab[irqindex].args == args)
  209. {
  210. rt_hw_interrupt_enable(level);
  211. return RT_EOK;
  212. }
  213. if (pin_irq_hdr_tab[irqindex].pin != -1)
  214. {
  215. rt_hw_interrupt_enable(level);
  216. return -RT_EBUSY;
  217. }
  218. pin_irq_hdr_tab[irqindex].pin = pin;
  219. pin_irq_hdr_tab[irqindex].hdr = hdr;
  220. pin_irq_hdr_tab[irqindex].mode = mode;
  221. pin_irq_hdr_tab[irqindex].args = args;
  222. rt_hw_interrupt_enable(level);
  223. return RT_EOK;
  224. }
  225. static rt_err_t hk32_pin_dettach_irq(struct rt_device *device, rt_base_t pin)
  226. {
  227. rt_base_t level;
  228. rt_int32_t irqindex = -1;
  229. uint16_t gpio_pin;
  230. if (PIN_PORT(pin) < PIN_HKPORT_MAX)
  231. {
  232. gpio_pin = PIN_HKPIN(pin);
  233. }
  234. else
  235. {
  236. return -RT_ENOSYS;
  237. }
  238. irqindex = bit2bitno(gpio_pin);
  239. if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
  240. {
  241. return -RT_ENOSYS;
  242. }
  243. level = rt_hw_interrupt_disable();
  244. if (pin_irq_hdr_tab[irqindex].pin == -1)
  245. {
  246. rt_hw_interrupt_enable(level);
  247. return RT_EOK;
  248. }
  249. pin_irq_hdr_tab[irqindex].pin = -1;
  250. pin_irq_hdr_tab[irqindex].hdr = RT_NULL;
  251. pin_irq_hdr_tab[irqindex].mode = 0;
  252. pin_irq_hdr_tab[irqindex].args = RT_NULL;
  253. rt_hw_interrupt_enable(level);
  254. return RT_EOK;
  255. }
  256. static rt_err_t hk32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
  257. rt_uint8_t enabled)
  258. {
  259. GPIO_InitTypeDef GPIO_InitStruct;
  260. EXTI_InitTypeDef EXTI_InitStruct;
  261. NVIC_InitTypeDef NVIC_InitStruct;
  262. const struct pin_irq_map *irqmap;
  263. rt_base_t level;
  264. rt_int32_t irqindex = -1;
  265. GPIO_TypeDef *gpio_port;
  266. uint16_t gpio_pin;
  267. if (PIN_PORT(pin) < PIN_HKPORT_MAX)
  268. {
  269. gpio_port = PIN_HKPORT(pin);
  270. gpio_pin = PIN_HKPIN(pin);
  271. }
  272. else
  273. {
  274. return -RT_ENOSYS;
  275. }
  276. if (enabled == PIN_IRQ_ENABLE)
  277. {
  278. irqindex = bit2bitno(gpio_pin);
  279. if (irqindex < 0 || irqindex >= ITEM_NUM(pin_irq_map))
  280. {
  281. return -RT_ENOSYS;
  282. }
  283. level = rt_hw_interrupt_disable();
  284. if (pin_irq_hdr_tab[irqindex].pin == -1)
  285. {
  286. rt_hw_interrupt_enable(level);
  287. return -RT_ENOSYS;
  288. }
  289. irqmap = &pin_irq_map[irqindex];
  290. /* Configure GPIO_InitStructure */
  291. GPIO_StructInit(&GPIO_InitStruct);
  292. EXTI_StructInit(&EXTI_InitStruct);
  293. GPIO_InitStruct.GPIO_Pin = irqmap->pinbit;
  294. GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
  295. EXTI_InitStruct.EXTI_Line = irqmap->pinbit;
  296. EXTI_InitStruct.EXTI_Mode = EXTI_Mode_Interrupt;
  297. EXTI_InitStruct.EXTI_LineCmd = ENABLE;
  298. switch (pin_irq_hdr_tab[irqindex].mode)
  299. {
  300. case PIN_IRQ_MODE_RISING:
  301. GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_DOWN;
  302. EXTI_InitStruct.EXTI_Trigger = EXTI_Trigger_Rising;
  303. break;
  304. case PIN_IRQ_MODE_FALLING:
  305. GPIO_InitStruct.GPIO_PuPd = GPIO_PuPd_UP;
  306. EXTI_InitStruct.EXTI_Trigger = EXTI_Trigger_Falling;
  307. break;
  308. case PIN_IRQ_MODE_RISING_FALLING:
  309. EXTI_InitStruct.EXTI_Trigger = EXTI_Trigger_Rising_Falling;
  310. break;
  311. }
  312. GPIO_Init(gpio_port, &GPIO_InitStruct);
  313. SYSCFG_EXTILineConfig(PIN_HKPORTSOURCE(pin), PIN_HKPINSOURCE(pin));
  314. EXTI_Init(&EXTI_InitStruct);
  315. NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
  316. NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
  317. NVIC_InitStruct.NVIC_IRQChannelPriority = 3;
  318. NVIC_Init(&NVIC_InitStruct);
  319. pin_irq_enable_mask |= irqmap->pinbit;
  320. rt_hw_interrupt_enable(level);
  321. }
  322. else if (enabled == PIN_IRQ_DISABLE)
  323. {
  324. irqmap = get_pin_irq_map(gpio_pin);
  325. if (irqmap == RT_NULL)
  326. {
  327. return -RT_ENOSYS;
  328. }
  329. level = rt_hw_interrupt_disable();
  330. pin_irq_enable_mask &= ~irqmap->pinbit;
  331. NVIC_InitStruct.NVIC_IRQChannelCmd = DISABLE;
  332. NVIC_InitStruct.NVIC_IRQChannelPriority = 3;
  333. if ((irqmap->pinbit >= GPIO_Pin_0) && (irqmap->pinbit <= GPIO_Pin_1))
  334. {
  335. if (!(pin_irq_enable_mask & (GPIO_Pin_0 | GPIO_Pin_1)))
  336. {
  337. NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
  338. }
  339. }
  340. else if ((irqmap->pinbit >= GPIO_Pin_2) && \
  341. (irqmap->pinbit <= GPIO_Pin_3))
  342. {
  343. if (!(pin_irq_enable_mask & (GPIO_Pin_2 | GPIO_Pin_3)))
  344. {
  345. NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
  346. }
  347. }
  348. else if ((irqmap->pinbit >= GPIO_Pin_4) && \
  349. (irqmap->pinbit <= GPIO_Pin_15))
  350. {
  351. if (!(pin_irq_enable_mask & (GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | \
  352. GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | \
  353. GPIO_Pin_10 | GPIO_Pin_11 | GPIO_Pin_12 | \
  354. GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15)))
  355. {
  356. NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
  357. }
  358. }
  359. else
  360. {
  361. NVIC_InitStruct.NVIC_IRQChannel = irqmap->irqno;
  362. }
  363. NVIC_Init(&NVIC_InitStruct);
  364. rt_hw_interrupt_enable(level);
  365. }
  366. else
  367. {
  368. return -RT_ENOSYS;
  369. }
  370. return RT_EOK;
  371. }
  372. const static struct rt_pin_ops _hk32_pin_ops =
  373. {
  374. hk32_pin_mode,
  375. hk32_pin_write,
  376. hk32_pin_read,
  377. hk32_pin_attach_irq,
  378. hk32_pin_dettach_irq,
  379. hk32_pin_irq_enable,
  380. RT_NULL,
  381. };
  382. rt_inline void pin_irq_hdr(int irqno)
  383. {
  384. EXTI_ClearITPendingBit(pin_irq_map[irqno].lineno);
  385. if (pin_irq_hdr_tab[irqno].hdr)
  386. {
  387. pin_irq_hdr_tab[irqno].hdr(pin_irq_hdr_tab[irqno].args);
  388. }
  389. }
  390. void GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
  391. {
  392. pin_irq_hdr(bit2bitno(GPIO_Pin));
  393. }
  394. void EXTI0_1_IRQHandler(void)
  395. {
  396. rt_interrupt_enter();
  397. if (RESET != EXTI_GetITStatus(EXTI_Line0))
  398. {
  399. GPIO_EXTI_IRQHandler(GPIO_Pin_0);
  400. }
  401. if (RESET != EXTI_GetITStatus(EXTI_Line1))
  402. {
  403. GPIO_EXTI_IRQHandler(GPIO_Pin_1);
  404. }
  405. rt_interrupt_leave();
  406. }
  407. void EXTI2_3_IRQHandler(void)
  408. {
  409. rt_interrupt_enter();
  410. if (RESET != EXTI_GetITStatus(EXTI_Line2))
  411. {
  412. GPIO_EXTI_IRQHandler(GPIO_Pin_2);
  413. }
  414. if (RESET != EXTI_GetITStatus(EXTI_Line3))
  415. {
  416. GPIO_EXTI_IRQHandler(GPIO_Pin_3);
  417. }
  418. rt_interrupt_leave();
  419. }
  420. void EXTI4_15_IRQHandler(void)
  421. {
  422. rt_interrupt_enter();
  423. if (RESET != EXTI_GetITStatus(EXTI_Line4))
  424. {
  425. GPIO_EXTI_IRQHandler(GPIO_Pin_4);
  426. }
  427. if (RESET != EXTI_GetITStatus(EXTI_Line5))
  428. {
  429. GPIO_EXTI_IRQHandler(GPIO_Pin_5);
  430. }
  431. if (RESET != EXTI_GetITStatus(EXTI_Line6))
  432. {
  433. GPIO_EXTI_IRQHandler(GPIO_Pin_6);
  434. }
  435. if (RESET != EXTI_GetITStatus(EXTI_Line7))
  436. {
  437. GPIO_EXTI_IRQHandler(GPIO_Pin_7);
  438. }
  439. if (RESET != EXTI_GetITStatus(EXTI_Line8))
  440. {
  441. GPIO_EXTI_IRQHandler(GPIO_Pin_8);
  442. }
  443. if (RESET != EXTI_GetITStatus(EXTI_Line9))
  444. {
  445. GPIO_EXTI_IRQHandler(GPIO_Pin_9);
  446. }
  447. if (RESET != EXTI_GetITStatus(EXTI_Line10))
  448. {
  449. GPIO_EXTI_IRQHandler(GPIO_Pin_10);
  450. }
  451. if (RESET != EXTI_GetITStatus(EXTI_Line11))
  452. {
  453. GPIO_EXTI_IRQHandler(GPIO_Pin_11);
  454. }
  455. if (RESET != EXTI_GetITStatus(EXTI_Line12))
  456. {
  457. GPIO_EXTI_IRQHandler(GPIO_Pin_12);
  458. }
  459. if (RESET != EXTI_GetITStatus(EXTI_Line13))
  460. {
  461. GPIO_EXTI_IRQHandler(GPIO_Pin_13);
  462. }
  463. if (RESET != EXTI_GetITStatus(EXTI_Line14))
  464. {
  465. GPIO_EXTI_IRQHandler(GPIO_Pin_14);
  466. }
  467. if (RESET != EXTI_GetITStatus(EXTI_Line15))
  468. {
  469. GPIO_EXTI_IRQHandler(GPIO_Pin_15);
  470. }
  471. rt_interrupt_leave();
  472. }
  473. int rt_hw_pin_init(void)
  474. {
  475. RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
  476. #ifdef GPIOA
  477. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
  478. #endif
  479. #ifdef GPIOB
  480. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOB, ENABLE);
  481. #endif
  482. #ifdef GPIOC
  483. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOC, ENABLE);
  484. #endif
  485. #ifdef GPIOD
  486. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOD, ENABLE);
  487. #endif
  488. #ifdef GPIOE
  489. RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOE, ENABLE);
  490. #endif
  491. #ifdef GPIOF
  492. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOF, ENABLE);
  493. #endif
  494. #ifdef GPIOG
  495. RCC_APB2PeriphClockCmd(RCC_APB2PERIPH_GPIOG, ENABLE);
  496. #endif
  497. return rt_device_pin_register("pin", &_hk32_pin_ops, RT_NULL);
  498. }
  499. INIT_BOARD_EXPORT(rt_hw_pin_init);
  500. #endif /* RT_USING_PIN */