drv_enet.h 2.6 KB

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  1. /*
  2. * Copyright (c) 2021-2022 HPMicro
  3. *
  4. * SPDX-License-Identifier: BSD-3-Clause
  5. *
  6. */
  7. #ifndef DRV_ENET_H
  8. #define DRV_ENET_H
  9. #include <netif/ethernetif.h>
  10. #include "hpm_enet_drv.h"
  11. #include "board.h"
  12. typedef struct {
  13. ENET_Type * instance;
  14. enet_desc_t desc;
  15. enet_mac_config_t mac_config;
  16. uint8_t media_interface;
  17. uint32_t irq_number;
  18. bool int_refclk;
  19. uint8_t tx_delay;
  20. uint8_t rx_delay;
  21. enet_int_config_t int_config;
  22. #if __USE_ENET_PTP
  23. bool ptp_enable;
  24. uint32_t ptp_clk_src;
  25. enet_ptp_config_t ptp_config;
  26. enet_ptp_ts_update_t ptp_timestamp;
  27. #endif
  28. } enet_device;
  29. typedef struct _hpm_enet
  30. {
  31. const char *name;
  32. ENET_Type *base;
  33. clock_name_t clock_name;
  34. int32_t irq_num;
  35. uint8_t inf;
  36. struct eth_device *eth_dev;
  37. enet_device *enet_dev;
  38. enet_buff_config_t *rx_buff_cfg;
  39. enet_buff_config_t *tx_buff_cfg;
  40. volatile enet_rx_desc_t *dma_rx_desc_tab;
  41. volatile enet_tx_desc_t *dma_tx_desc_tab;
  42. uint8_t tx_delay;
  43. uint8_t rx_delay;
  44. bool int_refclk;
  45. #if __USE_ENET_PTP
  46. bool ptp_enable;
  47. uint32_t ptp_clk_src;
  48. enet_ptp_config_t *ptp_config;
  49. enet_ptp_ts_update_t *ptp_timestamp;
  50. #endif
  51. } hpm_enet_t;
  52. #define IS_UUID_INVALID(UUID) (UUID[0] == 0 && \
  53. UUID[1] == 0 && \
  54. UUID[2] == 0 && \
  55. UUID[3] == 0)
  56. #if ENET_SOC_RGMII_EN
  57. #ifndef ENET0_TX_BUFF_COUNT
  58. #define ENET0_TX_BUFF_COUNT (50U)
  59. #endif
  60. #ifndef ENET0_RX_BUFF_COUNT
  61. #define ENET0_RX_BUFF_COUNT (60U)
  62. #endif
  63. #else
  64. #ifndef ENET0_TX_BUFF_COUNT
  65. #define ENET0_TX_BUFF_COUNT (10U)
  66. #endif
  67. #ifndef ENET0_RX_BUFF_COUNT
  68. #define ENET0_RX_BUFF_COUNT (20U)
  69. #endif
  70. #endif
  71. #ifndef ENET0_RX_BUFF_SIZE
  72. #define ENET0_RX_BUFF_SIZE ENET_MAX_FRAME_SIZE
  73. #endif
  74. #ifndef ENET0_TX_BUFF_SIZE
  75. #define ENET0_TX_BUFF_SIZE ENET_MAX_FRAME_SIZE
  76. #endif
  77. #ifndef ENET1_TX_BUFF_COUNT
  78. #define ENET1_TX_BUFF_COUNT (10U)
  79. #endif
  80. #ifndef ENET1_RX_BUFF_COUNT
  81. #define ENET1_RX_BUFF_COUNT (30U)
  82. #endif
  83. #ifndef ENET1_RX_BUFF_SIZE
  84. #define ENET1_RX_BUFF_SIZE ENET_MAX_FRAME_SIZE
  85. #endif
  86. #ifndef ENET1_TX_BUFF_SIZE
  87. #define ENET1_TX_BUFF_SIZE ENET_MAX_FRAME_SIZE
  88. #endif
  89. #ifndef MAC_ADDR0
  90. #define MAC_ADDR0 (0x98U)
  91. #endif
  92. #ifndef MAC_ADDR1
  93. #define MAC_ADDR1 (0x2CU)
  94. #endif
  95. #ifndef MAC_ADDR2
  96. #define MAC_ADDR2 (0xBCU)
  97. #endif
  98. #ifndef MAC_ADDR3
  99. #define MAC_ADDR3 (0xB1U)
  100. #endif
  101. #ifndef MAC_ADDR4
  102. #define MAC_ADDR4 (0x9FU)
  103. #endif
  104. #ifndef MAC_ADDR5
  105. #define MAC_ADDR5 (0x17U)
  106. #endif
  107. int rt_hw_eth_init(void);
  108. #endif /* DRV_ENET_H */
  109. /* DRV_GPIO_H */