drv_adc.c 4.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157
  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2023-03-17 letian first version
  9. */
  10. #include <HAL_device.h>
  11. #include <rtdevice.h>
  12. #include "drv_adc.h"
  13. #include <hal_gpio.h>
  14. #include <hal_adc.h>
  15. #include <hal_rcc.h>
  16. #include <hal_misc.h>
  17. #if defined(BSP_USING_ADC)
  18. #define ADC_CONFIG_GPIORCC RCC_AHBENR_GPIOA
  19. #define ADC_CONFIG_GPIOX GPIOA
  20. #define ADC_CONFIG_IOX GPIO_Pin_5 | GPIO_Pin_4
  21. struct mm32_adc
  22. {
  23. struct rt_adc_device mm32_adc_device;
  24. ADC_TypeDef *adc_x;
  25. char *name;
  26. };
  27. #if defined(BSP_USING_ADC1)
  28. struct mm32_adc mm32_adc1_config = {
  29. .adc_x = ADC1,
  30. .name = "adc1",
  31. };
  32. #endif /* BSP_USING_ADC1 */
  33. #if defined(BSP_USING_ADC2)
  34. struct mm32_adc mm32_adc2_config = {
  35. .adc_x = ADC2,
  36. .name = "adc2",
  37. };
  38. #endif /* BSP_USING_ADC2 */
  39. static void ADCxChannelEnable(ADC_TypeDef* ADCn, ADCCHANNEL_TypeDef channel)
  40. {
  41. ADCn->CHSR &= ~(1 << channel);
  42. ADCn->CHSR |= (1 << channel);
  43. }
  44. static rt_err_t mm32_adc_init(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
  45. {
  46. ADC_InitTypeDef ADC_InitStruct;
  47. ADC_TypeDef *adc_x;
  48. RT_ASSERT(device != RT_NULL);
  49. adc_x = device->parent.user_data;
  50. #if defined(BSP_USING_ADC1)
  51. RCC_APB2PeriphClockCmd(RCC_APB2ENR_ADC1, ENABLE); //Enable ADC1 clock
  52. #endif /* BSP_USING_ADC1 */
  53. #if defined(BSP_USING_ADC2)
  54. RCC_APB2PeriphClockCmd(RCC_APB2ENR_ADC2, ENABLE); //Enable ADC2 clock
  55. #endif /* BSP_USING_ADC2 */
  56. ADC_StructInit(&ADC_InitStruct);
  57. ADC_InitStruct.ADC_Resolution = ADC_Resolution_12b;
  58. ADC_InitStruct.ADC_PRESCARE = ADC_PCLK2_PRESCARE_16; //ADC prescale factor
  59. ADC_InitStruct.ADC_Mode = ADC_Mode_Continue; //Set ADC mode to continuous conversion mode
  60. ADC_InitStruct.ADC_DataAlign = ADC_DataAlign_Right; //AD data right-justified
  61. ADC_InitStruct.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
  62. ADC_Init(adc_x, &ADC_InitStruct);
  63. ADC_RegularChannelConfig(adc_x, channel, 0, ADC_Samctl_239_5);
  64. ADC_Cmd(adc_x, ENABLE);
  65. ADCxChannelEnable(adc_x, channel);
  66. //config gpio
  67. GPIO_InitTypeDef GPIO_InitStruct;
  68. GPIO_StructInit(&GPIO_InitStruct);
  69. RCC_AHBPeriphClockCmd(ADC_CONFIG_GPIORCC, ENABLE);
  70. GPIO_InitStruct.GPIO_Pin = ADC_CONFIG_IOX;
  71. GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
  72. GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AIN;
  73. GPIO_Init(ADC_CONFIG_GPIOX, &GPIO_InitStruct);
  74. return RT_EOK;
  75. }
  76. static rt_err_t mm32_get_adc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
  77. {
  78. ADC_TypeDef *adc_x;
  79. RT_ASSERT(device != RT_NULL);
  80. adc_x = device->parent.user_data;
  81. ADC_SoftwareStartConvCmd(adc_x, ENABLE);
  82. while(ADC_GetFlagStatus(adc_x, ADC_IT_EOC) == 0);
  83. ADC_ClearFlag(adc_x, ADC_IT_EOC);
  84. *value = ADC_GetConversionValue(adc_x);
  85. return RT_EOK;
  86. }
  87. static rt_uint8_t mm32_adc_get_resolution(struct rt_adc_device *device)
  88. {
  89. ADC_TypeDef *adc_x = device->parent.user_data;
  90. RT_ASSERT(device != RT_NULL);
  91. switch( ((adc_x->CFGR)&(0x00000380)) )
  92. {
  93. case ADC_Resolution_12b:
  94. return 12;
  95. case ADC_Resolution_11b:
  96. return 11;
  97. case ADC_Resolution_10b:
  98. return 10;
  99. case ADC_Resolution_9b:
  100. return 9;
  101. case ADC_Resolution_8b:
  102. return 8;
  103. default:
  104. return 0;
  105. }
  106. }
  107. static rt_int16_t mm32_adc_get_vref(struct rt_adc_device *device)
  108. {
  109. if(device == RT_NULL)
  110. return -RT_ERROR;
  111. return 3300;
  112. }
  113. static const struct rt_adc_ops mm32_adc_ops =
  114. {
  115. .enabled = mm32_adc_init,
  116. .convert = mm32_get_adc_value,
  117. .get_resolution = mm32_adc_get_resolution,
  118. .get_vref = mm32_adc_get_vref,
  119. };
  120. int rt_hw_adc_init(void)
  121. {
  122. #if defined(BSP_USING_ADC1)
  123. rt_hw_adc_register(&mm32_adc1_config.mm32_adc_device, mm32_adc1_config.name, &mm32_adc_ops, mm32_adc1_config.adc_x);
  124. #endif /* BSP_USING_ADC1 */
  125. #if defined(BSP_USING_ADC2)
  126. rt_hw_adc_register(&mm32_adc2_config.mm32_adc_device, mm32_adc2_config.name, &mm32_adc_ops, mm32_adc2_config.adc_x);
  127. #endif /* BSP_USING_ADC2 */
  128. return RT_EOK;
  129. }
  130. INIT_BOARD_EXPORT(rt_hw_adc_init);
  131. #endif /* BSP_USING_ADC */