drv_rtc.c 6.8 KB

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  1. /*
  2. * Copyright (c) 2006-2022, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2022-10-19 Nations first version
  9. */
  10. #include "board.h"
  11. #include <sys/time.h>
  12. #include <rtdevice.h>
  13. #ifdef BSP_USING_RTC
  14. uint32_t SynchPrediv, AsynchPrediv;
  15. static rt_err_t n32_rtc_get_timeval(struct timeval *tv)
  16. {
  17. struct tm tm_new = {0};
  18. RTC_DateType RTC_DateStructure;
  19. RTC_TimeType RTC_TimeStructure;
  20. RTC_GetTime(RTC_FORMAT_BIN, &RTC_TimeStructure);
  21. RTC_GetDate(RTC_FORMAT_BIN, &RTC_DateStructure);
  22. tm_new.tm_sec = RTC_TimeStructure.Seconds;
  23. tm_new.tm_min = RTC_TimeStructure.Minutes;
  24. tm_new.tm_hour = RTC_TimeStructure.Hours;
  25. tm_new.tm_wday = RTC_DateStructure.WeekDay;
  26. tm_new.tm_mday = RTC_DateStructure.Date;
  27. tm_new.tm_mon = RTC_DateStructure.Month - 1;
  28. tm_new.tm_year = RTC_DateStructure.Year + 100;
  29. tv->tv_sec = timegm(&tm_new);
  30. return RT_EOK;
  31. }
  32. static rt_err_t set_rtc_time_stamp(time_t time_stamp)
  33. {
  34. struct tm time = {0};
  35. RTC_DateType RTC_DateStructure={0};
  36. RTC_TimeType RTC_TimeStructure={0};
  37. gmtime_r(&time_stamp, &time);
  38. if (time.tm_year < 100)
  39. {
  40. return -RT_ERROR;
  41. }
  42. RTC_TimeStructure.Seconds = time.tm_sec ;
  43. RTC_TimeStructure.Minutes = time.tm_min ;
  44. RTC_TimeStructure.Hours = time.tm_hour;
  45. RTC_DateStructure.Date = time.tm_mday;
  46. RTC_DateStructure.Month = time.tm_mon + 1 ;
  47. RTC_DateStructure.Year = time.tm_year - 100;
  48. RTC_DateStructure.WeekDay = time.tm_wday + 1;
  49. /* Configure the RTC date register */
  50. if (RTC_SetDate(RTC_FORMAT_BIN, &RTC_DateStructure) != SUCCESS)
  51. {
  52. return -RT_ERROR;
  53. }
  54. /* Configure the RTC time register */
  55. if (RTC_ConfigTime(RTC_FORMAT_BIN, &RTC_TimeStructure) != SUCCESS)
  56. {
  57. return -RT_ERROR;
  58. }
  59. rt_kprintf("set rtc time.\n");
  60. return RT_EOK;
  61. }
  62. static rt_err_t rt_rtc_config(void)
  63. {
  64. RTC_InitType RTC_InitStructure;
  65. /* Configure the RTC data register and RTC prescaler */
  66. RTC_InitStructure.RTC_AsynchPrediv = AsynchPrediv;
  67. RTC_InitStructure.RTC_SynchPrediv = SynchPrediv;
  68. RTC_InitStructure.RTC_HourFormat = RTC_24HOUR_FORMAT;
  69. /* Check on RTC init */
  70. if (RTC_Init(&RTC_InitStructure) != SUCCESS)
  71. {
  72. return -RT_ERROR;
  73. }
  74. return RT_EOK;
  75. }
  76. static rt_err_t n32_rtc_init(void)
  77. {
  78. /* Enable the PWR clock */
  79. #if defined(SOC_N32G45X) || defined(SOC_N32WB452) || defined(SOC_N32G4FR)
  80. RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_PWR | RCC_APB1_PERIPH_BKP, ENABLE);
  81. RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
  82. #elif defined(SOC_N32L43X) || defined(SOC_N32L40X) || defined(SOC_N32G43X)
  83. RCC_EnableAPB1PeriphClk(RCC_APB1_PERIPH_PWR, ENABLE);
  84. RCC_EnableAPB2PeriphClk(RCC_APB2_PERIPH_AFIO, ENABLE);
  85. #endif
  86. /* Allow access to RTC */
  87. PWR_BackupAccessEnable(ENABLE);
  88. #if defined(SOC_N32G45X) || defined(SOC_N32WB452)
  89. /* Reset Backup */
  90. BKP_DeInit();
  91. #endif
  92. /* Disable RTC clock */
  93. RCC_EnableRtcClk(DISABLE);
  94. #ifdef BSP_RTC_USING_HSE
  95. /* Enable the HSE OSC */
  96. RCC_EnableLsi(DISABLE);
  97. RCC_ConfigHse(RCC_HSE_ENABLE);
  98. while (RCC_WaitHseStable() == ERROR)
  99. {
  100. }
  101. #if defined(SOC_N32G45X) || defined(SOC_N32WB452) || defined(SOC_N32G4FR)
  102. rt_kprintf("rtc clock source is set hse/128!\n");
  103. RCC_ConfigRtcClk(RCC_RTCCLK_SRC_HSE_DIV128);
  104. #elif defined(SOC_N32L43X) || defined(SOC_N32L40X) || defined(SOC_N32G43X)
  105. rt_kprintf("rtc clock source is set hse/32!\n");
  106. RCC_ConfigRtcClk(RCC_RTCCLK_SRC_HSE_DIV32);
  107. #endif
  108. #if defined(SOC_N32G45X) || defined(SOC_N32WB452) || defined(SOC_N32G4FR)
  109. SynchPrediv = 0x1E8; // 8M/128 = 62.5KHz
  110. AsynchPrediv = 0x7F; // value range: 0-7F
  111. #elif defined(SOC_N32L43X) || defined(SOC_N32L40X) || defined(SOC_N32G43X)
  112. SynchPrediv = 0x7A0; // 8M/32 = 250KHz
  113. AsynchPrediv = 0x7F; // value range: 0-7F
  114. #endif
  115. #endif /* BSP_RTC_USING_HSE */
  116. #ifdef BSP_RTC_USING_LSE
  117. rt_kprintf("rtc clock source is set lse!\n");
  118. /* Enable the LSE OSC32_IN PC14 */
  119. RCC_EnableLsi(DISABLE); // LSI is turned off here to ensure that only one clock is turned on
  120. #if defined(SOC_N32G45X) || defined(SOC_N32WB452) || defined(SOC_N32G4FR)
  121. RCC_ConfigLse(RCC_LSE_ENABLE);
  122. while (RCC_GetFlagStatus(RCC_FLAG_LSERD) == RESET)
  123. {
  124. }
  125. #elif defined(SOC_N32L43X) || defined(SOC_N32L40X) || defined(SOC_N32G43X)
  126. RCC_ConfigLse(RCC_LSE_ENABLE,0x28);
  127. while (RCC_GetFlagStatus(RCC_LDCTRL_FLAG_LSERD) == RESET)
  128. {
  129. }
  130. #endif
  131. RCC_ConfigRtcClk(RCC_RTCCLK_SRC_LSE);
  132. SynchPrediv = 0xFF; // 32.768KHz
  133. AsynchPrediv = 0x7F; // value range: 0-7F
  134. #endif /* BSP_RTC_USING_LSE */
  135. #ifdef BSP_RTC_USING_LSI
  136. rt_kprintf("rtc clock source is set lsi!\n");
  137. /* Enable the LSI OSC */
  138. RCC_EnableLsi(ENABLE);
  139. #if defined(SOC_N32G45X) || defined(SOC_N32WB452) || defined(SOC_N32G4FR)
  140. while (RCC_GetFlagStatus(RCC_FLAG_LSIRD) == RESET)
  141. {
  142. }
  143. #elif defined(SOC_N32L43X) || defined(SOC_N32L40X) || defined(SOC_N32G43X)
  144. while (RCC_GetFlagStatus(RCC_CTRLSTS_FLAG_LSIRD) == RESET)
  145. {
  146. }
  147. #endif
  148. RCC_ConfigRtcClk(RCC_RTCCLK_SRC_LSI);
  149. #if defined(SOC_N32G45X) || defined(SOC_N32WB452) || defined(SOC_N32G4FR)
  150. SynchPrediv = 0x136; // 39.64928KHz
  151. AsynchPrediv = 0x7F; // value range: 0-7F
  152. #elif defined(SOC_N32L43X) || defined(SOC_N32L40X) || defined(SOC_N32G43X)
  153. SynchPrediv = 0x14A; // 41828Hz
  154. AsynchPrediv = 0x7F; // value range: 0-7F
  155. #endif
  156. #endif /* BSP_RTC_USING_LSI */
  157. /* Enable the RTC Clock */
  158. RCC_EnableRtcClk(ENABLE);
  159. RTC_WaitForSynchro();
  160. if (rt_rtc_config() != RT_EOK)
  161. {
  162. rt_kprintf("rtc init failed.\n");
  163. return -RT_ERROR;
  164. }
  165. return RT_EOK;
  166. }
  167. static rt_err_t n32_rtc_get_secs(time_t *sec)
  168. {
  169. struct timeval tv;
  170. n32_rtc_get_timeval(&tv);
  171. *(time_t *) sec = tv.tv_sec;
  172. rt_kprintf("RTC: get rtc_time %d.\n", *sec);
  173. return RT_EOK;
  174. }
  175. static rt_err_t n32_rtc_set_secs(time_t *sec)
  176. {
  177. rt_err_t result = RT_EOK;
  178. if (set_rtc_time_stamp(*sec))
  179. {
  180. result = -RT_ERROR;
  181. }
  182. rt_kprintf("RTC: set rtc_time %d.\n", *sec);
  183. return result;
  184. }
  185. static const struct rt_rtc_ops n32_rtc_ops =
  186. {
  187. n32_rtc_init,
  188. n32_rtc_get_secs,
  189. n32_rtc_set_secs,
  190. RT_NULL,
  191. RT_NULL,
  192. n32_rtc_get_timeval,
  193. RT_NULL,
  194. };
  195. static rt_rtc_dev_t n32_rtc_dev;
  196. static int rt_hw_rtc_init(void)
  197. {
  198. rt_err_t result;
  199. n32_rtc_dev.ops = &n32_rtc_ops;
  200. result = rt_hw_rtc_register(&n32_rtc_dev, "rtc", RT_DEVICE_FLAG_RDWR, RT_NULL);
  201. if (result != RT_EOK)
  202. {
  203. rt_kprintf("rtc register error code: %d.\n", result);
  204. return result;
  205. }
  206. else
  207. {
  208. rt_kprintf("rtc initialize success.\n");
  209. }
  210. return RT_EOK;
  211. }
  212. INIT_DEVICE_EXPORT(rt_hw_rtc_init);
  213. #endif /* BSP_USING_RTC */