pulse_encoder_config.h 36 KB

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  1. /*
  2. * Copyright (C) 2022-2024, Xiaohua Semiconductor Co., Ltd.
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2023-06-09 CDT first version
  9. */
  10. #ifndef __PULSE_ENCODER_CONFIG_H__
  11. #define __PULSE_ENCODER_CONFIG_H__
  12. #include <rtthread.h>
  13. #ifdef __cplusplus
  14. extern "C" {
  15. #endif
  16. #if defined(RT_USING_PULSE_ENCODER)
  17. #ifdef BSP_USING_PULSE_ENCODER_TMRA_1
  18. #ifndef PULSE_ENCODER_TMRA_1_CONFIG
  19. #define PULSE_ENCODER_TMRA_1_CONFIG \
  20. { \
  21. .tmr_handler = CM_TMRA_1, \
  22. .u32Fcg2Periph = FCG2_PERIPH_TMRA_1, \
  23. .hw_count = \
  24. { \
  25. .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \
  26. .u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING, \
  27. }, \
  28. .isr = \
  29. { \
  30. .enIntSrc_Ovf = INT_SRC_TMRA_1_OVF, \
  31. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_NUM, \
  32. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_PRIO, \
  33. .enIntSrc_Udf = INT_SRC_TMRA_1_UDF, \
  34. .enIRQn_Udf = BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_NUM, \
  35. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_PRIO, \
  36. }, \
  37. .u32PeriodValue = 1000UL, \
  38. .name = "pulse_a1" \
  39. }
  40. #endif /* PULSE_ENCODER_TMRA_1_CONFIG */
  41. #endif /* BSP_USING_PULSE_ENCODER_TMRA_1 */
  42. #ifdef BSP_USING_PULSE_ENCODER_TMRA_2
  43. #ifndef PULSE_ENCODER_TMRA_2_CONFIG
  44. #define PULSE_ENCODER_TMRA_2_CONFIG \
  45. { \
  46. .tmr_handler = CM_TMRA_2, \
  47. .u32Fcg2Periph = FCG2_PERIPH_TMRA_2, \
  48. .hw_count = \
  49. { \
  50. .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \
  51. .u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING, \
  52. }, \
  53. .isr = \
  54. { \
  55. .enIntSrc_Ovf = INT_SRC_TMRA_2_OVF, \
  56. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_NUM, \
  57. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_PRIO, \
  58. .enIntSrc_Udf = INT_SRC_TMRA_2_UDF, \
  59. .enIRQn_Udf = BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_NUM, \
  60. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_PRIO, \
  61. }, \
  62. .u32PeriodValue = 1000UL, \
  63. .name = "pulse_a2" \
  64. }
  65. #endif /* PULSE_ENCODER_TMRA_2_CONFIG */
  66. #endif /* BSP_USING_PULSE_ENCODER_TMRA_2 */
  67. #ifdef BSP_USING_PULSE_ENCODER_TMRA_3
  68. #ifndef PULSE_ENCODER_TMRA_3_CONFIG
  69. #define PULSE_ENCODER_TMRA_3_CONFIG \
  70. { \
  71. .tmr_handler = CM_TMRA_3, \
  72. .u32Fcg2Periph = FCG2_PERIPH_TMRA_3, \
  73. .hw_count = \
  74. { \
  75. .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \
  76. .u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING, \
  77. }, \
  78. .isr = \
  79. { \
  80. .enIntSrc_Ovf = INT_SRC_TMRA_3_OVF, \
  81. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_NUM, \
  82. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_PRIO, \
  83. .enIntSrc_Udf = INT_SRC_TMRA_3_UDF, \
  84. .enIRQn_Udf = BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_NUM, \
  85. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_PRIO, \
  86. }, \
  87. .u32PeriodValue = 1000UL, \
  88. .name = "pulse_a3" \
  89. }
  90. #endif /* PULSE_ENCODER_TMRA_3_CONFIG */
  91. #endif /* BSP_USING_PULSE_ENCODER_TMRA_3 */
  92. #ifdef BSP_USING_PULSE_ENCODER_TMRA_4
  93. #ifndef PULSE_ENCODER_TMRA_4_CONFIG
  94. #define PULSE_ENCODER_TMRA_4_CONFIG \
  95. { \
  96. .tmr_handler = CM_TMRA_4, \
  97. .u32Fcg2Periph = FCG2_PERIPH_TMRA_4, \
  98. .hw_count = \
  99. { \
  100. .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \
  101. .u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING, \
  102. }, \
  103. .isr = \
  104. { \
  105. .enIntSrc_Ovf = INT_SRC_TMRA_4_OVF, \
  106. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_NUM, \
  107. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_PRIO, \
  108. .enIntSrc_Udf = INT_SRC_TMRA_4_UDF, \
  109. .enIRQn_Udf = BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_NUM, \
  110. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_PRIO, \
  111. }, \
  112. .u32PeriodValue = 1000UL, \
  113. .name = "pulse_a4" \
  114. }
  115. #endif /* PULSE_ENCODER_TMRA_4_CONFIG */
  116. #endif /* BSP_USING_PULSE_ENCODER_TMRA_4 */
  117. #ifdef BSP_USING_PULSE_ENCODER_TMRA_5
  118. #ifndef PULSE_ENCODER_TMRA_5_CONFIG
  119. #define PULSE_ENCODER_TMRA_5_CONFIG \
  120. { \
  121. .tmr_handler = CM_TMRA_5, \
  122. .u32Fcg2Periph = FCG2_PERIPH_TMRA_5, \
  123. .hw_count = \
  124. { \
  125. .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \
  126. .u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING, \
  127. }, \
  128. .isr = \
  129. { \
  130. .enIntSrc_Ovf = INT_SRC_TMRA_5_OVF, \
  131. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_NUM, \
  132. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_PRIO, \
  133. .enIntSrc_Udf = INT_SRC_TMRA_5_UDF, \
  134. .enIRQn_Udf = BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_NUM, \
  135. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_PRIO, \
  136. }, \
  137. .u32PeriodValue = 1000UL, \
  138. .name = "pulse_a5" \
  139. }
  140. #endif /* PULSE_ENCODER_TMRA_5_CONFIG */
  141. #endif /* BSP_USING_PULSE_ENCODER_TMRA_5 */
  142. #ifdef BSP_USING_PULSE_ENCODER_TMRA_6
  143. #ifndef PULSE_ENCODER_TMRA_6_CONFIG
  144. #define PULSE_ENCODER_TMRA_6_CONFIG \
  145. { \
  146. .tmr_handler = CM_TMRA_6, \
  147. .u32Fcg2Periph = FCG2_PERIPH_TMRA_6, \
  148. .hw_count = \
  149. { \
  150. .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \
  151. .u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING, \
  152. }, \
  153. .isr = \
  154. { \
  155. .enIntSrc_Ovf = INT_SRC_TMRA_6_OVF, \
  156. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_NUM, \
  157. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_PRIO, \
  158. .enIntSrc_Udf = INT_SRC_TMRA_6_UDF, \
  159. .enIRQn_Udf = BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_NUM, \
  160. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_PRIO, \
  161. }, \
  162. .u32PeriodValue = 1000UL, \
  163. .name = "pulse_a6" \
  164. }
  165. #endif /* PULSE_ENCODER_TMRA_6_CONFIG */
  166. #endif /* BSP_USING_PULSE_ENCODER_TMRA_6 */
  167. #ifdef BSP_USING_PULSE_ENCODER_TMRA_7
  168. #ifndef PULSE_ENCODER_TMRA_7_CONFIG
  169. #define PULSE_ENCODER_TMRA_7_CONFIG \
  170. { \
  171. .tmr_handler = CM_TMRA_7, \
  172. .u32Fcg2Periph = FCG2_PERIPH_TMRA_7, \
  173. .hw_count = \
  174. { \
  175. .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \
  176. .u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING, \
  177. }, \
  178. .isr = \
  179. { \
  180. .enIntSrc_Ovf = INT_SRC_TMRA_7_OVF, \
  181. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMRA_7_OVF_IRQ_NUM, \
  182. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_7_OVF_IRQ_PRIO, \
  183. .enIntSrc_Udf = INT_SRC_TMRA_7_UDF, \
  184. .enIRQn_Udf = BSP_PULSE_ENCODER_TMRA_7_UDF_IRQ_NUM, \
  185. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_7_UDF_IRQ_PRIO, \
  186. }, \
  187. .u32PeriodValue = 1000UL, \
  188. .name = "pulse_a7" \
  189. }
  190. #endif /* PULSE_ENCODER_TMRA_7_CONFIG */
  191. #endif /* BSP_USING_PULSE_ENCODER_TMRA_7 */
  192. #ifdef BSP_USING_PULSE_ENCODER_TMRA_8
  193. #ifndef PULSE_ENCODER_TMRA_8_CONFIG
  194. #define PULSE_ENCODER_TMRA_8_CONFIG \
  195. { \
  196. .tmr_handler = CM_TMRA_8, \
  197. .u32Fcg2Periph = FCG2_PERIPH_TMRA_8, \
  198. .hw_count = \
  199. { \
  200. .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \
  201. .u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING, \
  202. }, \
  203. .isr = \
  204. { \
  205. .enIntSrc_Ovf = INT_SRC_TMRA_8_OVF, \
  206. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMRA_8_OVF_IRQ_NUM, \
  207. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_8_OVF_IRQ_PRIO, \
  208. .enIntSrc_Udf = INT_SRC_TMRA_8_UDF, \
  209. .enIRQn_Udf = BSP_PULSE_ENCODER_TMRA_8_UDF_IRQ_NUM, \
  210. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_8_UDF_IRQ_PRIO, \
  211. }, \
  212. .u32PeriodValue = 1000UL, \
  213. .name = "pulse_a8" \
  214. }
  215. #endif /* PULSE_ENCODER_TMRA_8_CONFIG */
  216. #endif /* BSP_USING_PULSE_ENCODER_TMRA_8 */
  217. #ifdef BSP_USING_PULSE_ENCODER_TMRA_9
  218. #ifndef PULSE_ENCODER_TMRA_9_CONFIG
  219. #define PULSE_ENCODER_TMRA_9_CONFIG \
  220. { \
  221. .tmr_handler = CM_TMRA_9, \
  222. .u32Fcg2Periph = FCG2_PERIPH_TMRA_9, \
  223. .hw_count = \
  224. { \
  225. .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \
  226. .u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING, \
  227. }, \
  228. .isr = \
  229. { \
  230. .enIntSrc_Ovf = INT_SRC_TMRA_9_OVF, \
  231. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMRA_9_OVF_IRQ_NUM, \
  232. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_9_OVF_IRQ_PRIO, \
  233. .enIntSrc_Udf = INT_SRC_TMRA_9_UDF, \
  234. .enIRQn_Udf = BSP_PULSE_ENCODER_TMRA_9_UDF_IRQ_NUM, \
  235. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_9_UDF_IRQ_PRIO, \
  236. }, \
  237. .u32PeriodValue = 1000UL, \
  238. .name = "pulse_a9" \
  239. }
  240. #endif /* PULSE_ENCODER_TMRA_9_CONFIG */
  241. #endif /* BSP_USING_PULSE_ENCODER_TMRA_9 */
  242. #ifdef BSP_USING_PULSE_ENCODER_TMRA_10
  243. #ifndef PULSE_ENCODER_TMRA_10_CONFIG
  244. #define PULSE_ENCODER_TMRA_10_CONFIG \
  245. { \
  246. .tmr_handler = CM_TMRA_10, \
  247. .u32Fcg2Periph = FCG2_PERIPH_TMRA_10, \
  248. .hw_count = \
  249. { \
  250. .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \
  251. .u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING, \
  252. }, \
  253. .isr = \
  254. { \
  255. .enIntSrc_Ovf = INT_SRC_TMRA_10_OVF, \
  256. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMRA_10_OVF_IRQ_NUM, \
  257. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_10_OVF_IRQ_PRIO, \
  258. .enIntSrc_Udf = INT_SRC_TMRA_10_UDF, \
  259. .enIRQn_Udf = BSP_PULSE_ENCODER_TMRA_10_UDF_IRQ_NUM, \
  260. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_10_UDF_IRQ_PRIO, \
  261. }, \
  262. .u32PeriodValue = 1000UL, \
  263. .name = "pulse_a10" \
  264. }
  265. #endif /* PULSE_ENCODER_TMRA_10_CONFIG */
  266. #endif /* BSP_USING_PULSE_ENCODER_TMRA_10 */
  267. #ifdef BSP_USING_PULSE_ENCODER_TMRA_11
  268. #ifndef PULSE_ENCODER_TMRA_11_CONFIG
  269. #define PULSE_ENCODER_TMRA_11_CONFIG \
  270. { \
  271. .tmr_handler = CM_TMRA_11, \
  272. .u32Fcg2Periph = FCG2_PERIPH_TMRA_11, \
  273. .hw_count = \
  274. { \
  275. .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \
  276. .u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING, \
  277. }, \
  278. .isr = \
  279. { \
  280. .enIntSrc_Ovf = INT_SRC_TMRA_11_OVF, \
  281. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMRA_11_OVF_IRQ_NUM, \
  282. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_11_OVF_IRQ_PRIO, \
  283. .enIntSrc_Udf = INT_SRC_TMRA_11_UDF, \
  284. .enIRQn_Udf = BSP_PULSE_ENCODER_TMRA_11_UDF_IRQ_NUM, \
  285. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_11_UDF_IRQ_PRIO, \
  286. }, \
  287. .u32PeriodValue = 1000UL, \
  288. .name = "pulse_a11" \
  289. }
  290. #endif /* PULSE_ENCODER_TMRA_11_CONFIG */
  291. #endif /* BSP_USING_PULSE_ENCODER_TMRA_11 */
  292. #ifdef BSP_USING_PULSE_ENCODER_TMRA_12
  293. #ifndef PULSE_ENCODER_TMRA_12_CONFIG
  294. #define PULSE_ENCODER_TMRA_12_CONFIG \
  295. { \
  296. .tmr_handler = CM_TMRA_12, \
  297. .u32Fcg2Periph = FCG2_PERIPH_TMRA_12, \
  298. .hw_count = \
  299. { \
  300. .u16CountUpCond = TMRA_CNT_UP_COND_CLKA_HIGH_CLKB_RISING, \
  301. .u16CountDownCond = TMRA_CNT_DOWN_COND_CLKB_HIGH_CLKA_RISING, \
  302. }, \
  303. .isr = \
  304. { \
  305. .enIntSrc_Ovf = INT_SRC_TMRA_12_OVF, \
  306. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMRA_12_OVF_IRQ_NUM, \
  307. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMRA_12_OVF_IRQ_PRIO, \
  308. .enIntSrc_Udf = INT_SRC_TMRA_12_UDF, \
  309. .enIRQn_Udf = BSP_PULSE_ENCODER_TMRA_12_UDF_IRQ_NUM, \
  310. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMRA_12_UDF_IRQ_PRIO, \
  311. }, \
  312. .u32PeriodValue = 1000UL, \
  313. .name = "pulse_a12" \
  314. }
  315. #endif /* PULSE_ENCODER_TMRA_12_CONFIG */
  316. #endif /* BSP_USING_PULSE_ENCODER_TMRA_12 */
  317. #ifdef BSP_USING_PULSE_ENCODER_TMR6_1
  318. #ifndef PULSE_ENCODER_TMR6_1_CONFIG
  319. #define PULSE_ENCODER_TMR6_1_CONFIG \
  320. { \
  321. .tmr_handler = CM_TMR6_1, \
  322. .u32Fcg2Periph = FCG2_PERIPH_TMR6_1, \
  323. .hw_count = \
  324. { \
  325. .u32CountUpCond = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING, \
  326. .u32CountDownCond = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING, \
  327. }, \
  328. .isr = \
  329. { \
  330. .enIntSrc_Ovf = INT_SRC_TMR6_1_OVF, \
  331. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_NUM, \
  332. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_PRIO, \
  333. .enIntSrc_Udf = INT_SRC_TMR6_1_UDF, \
  334. .enIRQn_Udf = BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_NUM, \
  335. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_PRIO, \
  336. }, \
  337. .u32PeriodValue = 1000UL, \
  338. .name = "pulse_61" \
  339. }
  340. #endif /* PULSE_ENCODER_TMR6_1_CONFIG */
  341. #endif /* BSP_USING_PULSE_ENCODER_TMR6_1 */
  342. #ifdef BSP_USING_PULSE_ENCODER_TMR6_2
  343. #ifndef PULSE_ENCODER_TMR6_2_CONFIG
  344. #define PULSE_ENCODER_TMR6_2_CONFIG \
  345. { \
  346. .tmr_handler = CM_TMR6_2, \
  347. .u32Fcg2Periph = FCG2_PERIPH_TMR6_2, \
  348. .hw_count = \
  349. { \
  350. .u32CountUpCond = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING, \
  351. .u32CountDownCond = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING, \
  352. }, \
  353. .isr = \
  354. { \
  355. .enIntSrc_Ovf = INT_SRC_TMR6_2_OVF, \
  356. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_NUM, \
  357. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_PRIO, \
  358. .enIntSrc_Udf = INT_SRC_TMR6_2_UDF, \
  359. .enIRQn_Udf = BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_NUM, \
  360. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_PRIO, \
  361. }, \
  362. .u32PeriodValue = 1000UL, \
  363. .name = "pulse_62" \
  364. }
  365. #endif /* PULSE_ENCODER_TMR6_2_CONFIG */
  366. #endif /* BSP_USING_PULSE_ENCODER_TMR6_2 */
  367. #ifdef BSP_USING_PULSE_ENCODER_TMR6_3
  368. #ifndef PULSE_ENCODER_TMR6_3_CONFIG
  369. #define PULSE_ENCODER_TMR6_3_CONFIG \
  370. { \
  371. .tmr_handler = CM_TMR6_3, \
  372. .u32Fcg2Periph = FCG2_PERIPH_TMR6_3, \
  373. .hw_count = \
  374. { \
  375. .u32CountUpCond = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING, \
  376. .u32CountDownCond = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING, \
  377. }, \
  378. .isr = \
  379. { \
  380. .enIntSrc_Ovf = INT_SRC_TMR6_3_OVF, \
  381. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_NUM, \
  382. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_PRIO, \
  383. .enIntSrc_Udf = INT_SRC_TMR6_3_UDF, \
  384. .enIRQn_Udf = BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_NUM, \
  385. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_PRIO, \
  386. }, \
  387. .u32PeriodValue = 1000UL, \
  388. .name = "pulse_63" \
  389. }
  390. #endif /* PULSE_ENCODER_TMR6_3_CONFIG */
  391. #endif /* BSP_USING_PULSE_ENCODER_TMR6_3 */
  392. #ifdef BSP_USING_PULSE_ENCODER_TMR6_4
  393. #ifndef PULSE_ENCODER_TMR6_4_CONFIG
  394. #define PULSE_ENCODER_TMR6_4_CONFIG \
  395. { \
  396. .tmr_handler = CM_TMR6_4, \
  397. .u32Fcg2Periph = FCG2_PERIPH_TMR6_4, \
  398. .hw_count = \
  399. { \
  400. .u32CountUpCond = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING, \
  401. .u32CountDownCond = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING, \
  402. }, \
  403. .isr = \
  404. { \
  405. .enIntSrc_Ovf = INT_SRC_TMR6_4_OVF, \
  406. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMR6_4_OVF_IRQ_NUM, \
  407. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_4_OVF_IRQ_PRIO, \
  408. .enIntSrc_Udf = INT_SRC_TMR6_4_UDF, \
  409. .enIRQn_Udf = BSP_PULSE_ENCODER_TMR6_4_UDF_IRQ_NUM, \
  410. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_4_UDF_IRQ_PRIO, \
  411. }, \
  412. .u32PeriodValue = 1000UL, \
  413. .name = "pulse_64" \
  414. }
  415. #endif /* PULSE_ENCODER_TMR6_4_CONFIG */
  416. #endif /* BSP_USING_PULSE_ENCODER_TMR6_4 */
  417. #ifdef BSP_USING_PULSE_ENCODER_TMR6_5
  418. #ifndef PULSE_ENCODER_TMR6_5_CONFIG
  419. #define PULSE_ENCODER_TMR6_5_CONFIG \
  420. { \
  421. .tmr_handler = CM_TMR6_5, \
  422. .u32Fcg2Periph = FCG2_PERIPH_TMR6_5, \
  423. .hw_count = \
  424. { \
  425. .u32CountUpCond = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING, \
  426. .u32CountDownCond = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING, \
  427. }, \
  428. .isr = \
  429. { \
  430. .enIntSrc_Ovf = INT_SRC_TMR6_5_OVF, \
  431. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMR6_5_OVF_IRQ_NUM, \
  432. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_5_OVF_IRQ_PRIO, \
  433. .enIntSrc_Udf = INT_SRC_TMR6_5_UDF, \
  434. .enIRQn_Udf = BSP_PULSE_ENCODER_TMR6_5_UDF_IRQ_NUM, \
  435. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_5_UDF_IRQ_PRIO, \
  436. }, \
  437. .u32PeriodValue = 1000UL, \
  438. .name = "pulse_65" \
  439. }
  440. #endif /* PULSE_ENCODER_TMR6_5_CONFIG */
  441. #endif /* BSP_USING_PULSE_ENCODER_TMR6_5 */
  442. #ifdef BSP_USING_PULSE_ENCODER_TMR6_6
  443. #ifndef PULSE_ENCODER_TMR6_6_CONFIG
  444. #define PULSE_ENCODER_TMR6_6_CONFIG \
  445. { \
  446. .tmr_handler = CM_TMR6_6, \
  447. .u32Fcg2Periph = FCG2_PERIPH_TMR6_6, \
  448. .hw_count = \
  449. { \
  450. .u32CountUpCond = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING, \
  451. .u32CountDownCond = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING, \
  452. }, \
  453. .isr = \
  454. { \
  455. .enIntSrc_Ovf = INT_SRC_TMR6_6_OVF, \
  456. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMR6_6_OVF_IRQ_NUM, \
  457. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_6_OVF_IRQ_PRIO, \
  458. .enIntSrc_Udf = INT_SRC_TMR6_6_UDF, \
  459. .enIRQn_Udf = BSP_PULSE_ENCODER_TMR6_6_UDF_IRQ_NUM, \
  460. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_6_UDF_IRQ_PRIO, \
  461. }, \
  462. .u32PeriodValue = 1000UL, \
  463. .name = "pulse_66" \
  464. }
  465. #endif /* PULSE_ENCODER_TMR6_6_CONFIG */
  466. #endif /* BSP_USING_PULSE_ENCODER_TMR6_6 */
  467. #ifdef BSP_USING_PULSE_ENCODER_TMR6_7
  468. #ifndef PULSE_ENCODER_TMR6_7_CONFIG
  469. #define PULSE_ENCODER_TMR6_7_CONFIG \
  470. { \
  471. .tmr_handler = CM_TMR6_7, \
  472. .u32Fcg2Periph = FCG2_PERIPH_TMR6_7, \
  473. .hw_count = \
  474. { \
  475. .u32CountUpCond = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING, \
  476. .u32CountDownCond = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING, \
  477. }, \
  478. .isr = \
  479. { \
  480. .enIntSrc_Ovf = INT_SRC_TMR6_7_OVF, \
  481. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMR6_7_OVF_IRQ_NUM, \
  482. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_7_OVF_IRQ_PRIO, \
  483. .enIntSrc_Udf = INT_SRC_TMR6_7_UDF, \
  484. .enIRQn_Udf = BSP_PULSE_ENCODER_TMR6_7_UDF_IRQ_NUM, \
  485. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_7_UDF_IRQ_PRIO, \
  486. }, \
  487. .u32PeriodValue = 1000UL, \
  488. .name = "pulse_67" \
  489. }
  490. #endif /* PULSE_ENCODER_TMR6_7_CONFIG */
  491. #endif /* BSP_USING_PULSE_ENCODER_TMR6_7 */
  492. #ifdef BSP_USING_PULSE_ENCODER_TMR6_8
  493. #ifndef PULSE_ENCODER_TMR6_8_CONFIG
  494. #define PULSE_ENCODER_TMR6_8_CONFIG \
  495. { \
  496. .tmr_handler = CM_TMR6_8, \
  497. .u32Fcg2Periph = FCG2_PERIPH_TMR6_8, \
  498. .hw_count = \
  499. { \
  500. .u32CountUpCond = TMR6_CNT_UP_COND_PWMA_HIGH_PWMB_RISING, \
  501. .u32CountDownCond = TMR6_CNT_DOWN_COND_PWMB_HIGH_PWMA_RISING, \
  502. }, \
  503. .isr = \
  504. { \
  505. .enIntSrc_Ovf = INT_SRC_TMR6_8_OVF, \
  506. .enIRQn_Ovf = BSP_PULSE_ENCODER_TMR6_8_OVF_IRQ_NUM, \
  507. .u8Int_Prio_Ovf = BSP_PULSE_ENCODER_TMR6_8_OVF_IRQ_PRIO, \
  508. .enIntSrc_Udf = INT_SRC_TMR6_8_UDF, \
  509. .enIRQn_Udf = BSP_PULSE_ENCODER_TMR6_8_UDF_IRQ_NUM, \
  510. .u8Int_Prio_Udf = BSP_PULSE_ENCODER_TMR6_8_UDF_IRQ_PRIO, \
  511. }, \
  512. .u32PeriodValue = 1000UL, \
  513. .name = "pulse_68" \
  514. }
  515. #endif /* PULSE_ENCODER_TMR6_8_CONFIG */
  516. #endif /* BSP_USING_PULSE_ENCODER_TMR6_8 */
  517. #endif /* RT_USING_PULSE_ENCODER */
  518. #endif /* __PULSE_ENCODER_CONFIG_H__ */