spi_flash.c 5.0 KB

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  1. #include <stm32f10x.h>
  2. #include "spi_flash.h"
  3. extern unsigned char SPI_WriteByte(unsigned char data);
  4. /********************** hardware *************************************/
  5. /* SPI_FLASH_CS PA4 */
  6. /* SPI_FLASH_RST PA3 */
  7. #define FLASH_RST_0() GPIO_ResetBits(GPIOA,GPIO_Pin_3)
  8. #define FLASH_RST_1() GPIO_SetBits(GPIOA,GPIO_Pin_3)
  9. #define FLASH_CS_0() GPIO_ResetBits(GPIOA,GPIO_Pin_4)
  10. #define FLASH_CS_1() GPIO_SetBits(GPIOA,GPIO_Pin_4)
  11. /********************** hardware *************************************/
  12. static void GPIO_Configuration(void)
  13. {
  14. GPIO_InitTypeDef GPIO_InitStructure;
  15. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA,ENABLE);
  16. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_3;
  17. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
  18. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  19. GPIO_Init(GPIOA,&GPIO_InitStructure);
  20. FLASH_RST_0(); // RESET
  21. FLASH_RST_1();
  22. }
  23. static unsigned char SPI_HostReadByte(void)
  24. {
  25. return SPI_WriteByte(0x00);
  26. }
  27. static void SPI_HostWriteByte(unsigned char wByte)
  28. {
  29. SPI_WriteByte(wByte);
  30. }
  31. /*****************************************************************************/
  32. /*Status Register Format: */
  33. /* ------------------------------------------------------------------------- */
  34. /* | bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 | */
  35. /* |--------|--------|--------|--------|--------|--------|--------|--------| */
  36. /* |RDY/BUSY| COMP | device density | X | X | */
  37. /* ------------------------------------------------------------------------- */
  38. /* 0:busy | | AT45DB041:0111 | protect|page size */
  39. /* 1:ready | | AT45DB161:1011 | */
  40. /* --------------------------------------------------------------------------*/
  41. /*****************************************************************************/
  42. static unsigned char AT45DB_StatusRegisterRead(void)
  43. {
  44. unsigned char i;
  45. FLASH_CS_0();
  46. SPI_HostWriteByte(AT45DB_READ_STATE_REGISTER);
  47. i=SPI_HostReadByte();
  48. FLASH_CS_1();
  49. return i;
  50. }
  51. static void wait_busy(void)
  52. {
  53. unsigned int i=0;
  54. while (i++<2000)
  55. {
  56. if (AT45DB_StatusRegisterRead()&0x80)
  57. {
  58. break;
  59. }
  60. }
  61. }
  62. static void read_page(unsigned int page,unsigned char * pHeader)
  63. {
  64. unsigned int i=0;
  65. wait_busy();
  66. FLASH_CS_0();
  67. SPI_HostWriteByte(AT45DB_MM_PAGE_TO_B1_XFER);
  68. SPI_HostWriteByte((unsigned char)(page >> 6));
  69. SPI_HostWriteByte((unsigned char)(page << 2));
  70. SPI_HostWriteByte(0x00);
  71. FLASH_CS_1();
  72. wait_busy();
  73. FLASH_CS_0();
  74. SPI_HostWriteByte(AT45DB_BUFFER_1_READ);
  75. SPI_HostWriteByte(0x00);
  76. SPI_HostWriteByte(0x00);
  77. SPI_HostWriteByte(0x00);
  78. SPI_HostWriteByte(0x00);
  79. for (i=0; i<512; i++)
  80. {
  81. *pHeader++ = SPI_HostReadByte();
  82. }
  83. FLASH_CS_1();
  84. }
  85. static void write_page(unsigned int page,unsigned char * pHeader)
  86. {
  87. unsigned int i;
  88. wait_busy();
  89. FLASH_CS_0();
  90. SPI_HostWriteByte(AT45DB_BUFFER_2_WRITE);
  91. SPI_HostWriteByte(0);
  92. SPI_HostWriteByte(0);
  93. SPI_HostWriteByte(0);
  94. for(i=0; i<512; i++)
  95. {
  96. SPI_HostWriteByte(*pHeader++);
  97. }
  98. FLASH_CS_1();
  99. wait_busy();
  100. FLASH_CS_0();
  101. SPI_HostWriteByte(AT45DB_B2_TO_MM_PAGE_PROG_WITH_ERASE);
  102. SPI_HostWriteByte((unsigned char)(page>>6));
  103. SPI_HostWriteByte((unsigned char)(page<<2));
  104. SPI_HostWriteByte(0x00);
  105. FLASH_CS_1();
  106. }
  107. #include <rtthread.h>
  108. /* SPI DEVICE */
  109. static struct rt_device spi_flash_device;
  110. /* RT-Thread Device Driver Interface */
  111. static rt_err_t rt_spi_flash_init(rt_device_t dev)
  112. {
  113. return RT_EOK;
  114. }
  115. static rt_err_t rt_spi_flash_open(rt_device_t dev, rt_uint16_t oflag)
  116. {
  117. return RT_EOK;
  118. }
  119. static rt_err_t rt_spi_flash_close(rt_device_t dev)
  120. {
  121. return RT_EOK;
  122. }
  123. static rt_err_t rt_spi_flash_control(rt_device_t dev, rt_uint8_t cmd, void *args)
  124. {
  125. return RT_EOK;
  126. }
  127. static rt_size_t rt_spi_flash_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
  128. {
  129. /* only supply single block read: block size 512Byte */
  130. read_page(pos/512,buffer);
  131. return RT_EOK;
  132. }
  133. static rt_size_t rt_spi_flash_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
  134. {
  135. /* only supply single block write: block size 512Byte */
  136. write_page(pos/512,(unsigned char*)buffer);
  137. return RT_EOK;
  138. }
  139. void rt_hw_spi_flash_init(void)
  140. {
  141. GPIO_Configuration();
  142. /* register spi_flash device */
  143. spi_flash_device.init = rt_spi_flash_init;
  144. spi_flash_device.open = rt_spi_flash_open;
  145. spi_flash_device.close = rt_spi_flash_close;
  146. spi_flash_device.read = rt_spi_flash_read;
  147. spi_flash_device.write = rt_spi_flash_write;
  148. spi_flash_device.control = rt_spi_flash_control;
  149. /* no private */
  150. spi_flash_device.private = RT_NULL;
  151. rt_device_register(&spi_flash_device, "spi0",
  152. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_REMOVABLE | RT_DEVICE_FLAG_STANDALONE);
  153. }