serial.c 16 KB

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  1. /*
  2. * File : serial.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006, RT-Thread Development Team
  5. *
  6. * The license and distribution terms for this file may be
  7. * found in the file LICENSE in this distribution or at
  8. * http://www.rt-thread.org/license/LICENSE
  9. *
  10. * Change Logs:
  11. * Date Author Notes
  12. * 2006-03-13 Bernard first version
  13. * 2011-05-15 lgnq modified according bernard's implementation.
  14. */
  15. #include <rtthread.h>
  16. #include "serial.h"
  17. /**
  18. * @addtogroup FM3 MB9B500
  19. */
  20. /*@{*/
  21. /* RT-Thread Device Interface */
  22. /**
  23. * This function initializes serial
  24. */
  25. static rt_err_t rt_serial_init(rt_device_t dev)
  26. {
  27. struct serial_device *uart = (struct serial_device*)dev->user_data;
  28. if (!(dev->flag & RT_DEVICE_FLAG_ACTIVATED))
  29. {
  30. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  31. {
  32. rt_memset(uart->int_rx->rx_buffer, 0,
  33. sizeof(uart->int_rx->rx_buffer));
  34. uart->int_rx->read_index = uart->int_rx->save_index = 0;
  35. }
  36. if (dev->flag & RT_DEVICE_FLAG_INT_TX)
  37. {
  38. rt_memset(uart->int_tx->tx_buffer, 0,
  39. sizeof(uart->int_tx->tx_buffer));
  40. uart->int_tx->write_index = uart->int_tx->save_index = 0;
  41. }
  42. dev->flag |= RT_DEVICE_FLAG_ACTIVATED;
  43. }
  44. return RT_EOK;
  45. }
  46. /* save a char to serial buffer */
  47. static void rt_serial_savechar(struct serial_device *uart, char ch)
  48. {
  49. rt_base_t level;
  50. /* disable interrupt */
  51. level = rt_hw_interrupt_disable();
  52. uart->int_rx->rx_buffer[uart->int_rx->save_index] = ch;
  53. uart->int_rx->save_index ++;
  54. if (uart->int_rx->save_index >= UART_RX_BUFFER_SIZE)
  55. uart->int_rx->save_index = 0;
  56. /* if the next position is read index, discard this 'read char' */
  57. if (uart->int_rx->save_index == uart->int_rx->read_index)
  58. {
  59. uart->int_rx->read_index ++;
  60. if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
  61. uart->int_rx->read_index = 0;
  62. }
  63. /* enable interrupt */
  64. rt_hw_interrupt_enable(level);
  65. }
  66. static rt_err_t rt_serial_open(rt_device_t dev, rt_uint16_t oflag)
  67. {
  68. struct serial_device *uart;
  69. RT_ASSERT(dev != RT_NULL);
  70. uart = (struct serial_device*)dev->user_data;
  71. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  72. {
  73. /* enable interrupt */
  74. UART_ENABLE_IRQ(uart->rx_irq);
  75. }
  76. return RT_EOK;
  77. }
  78. static rt_err_t rt_serial_close(rt_device_t dev)
  79. {
  80. struct serial_device *uart;
  81. RT_ASSERT(dev != RT_NULL);
  82. uart = (struct serial_device*)dev->user_data;
  83. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  84. {
  85. /* disable interrupt */
  86. UART_DISABLE_IRQ(uart->rx_irq);
  87. }
  88. return RT_EOK;
  89. }
  90. static rt_size_t rt_serial_read(rt_device_t dev, rt_off_t pos, void *buffer,
  91. rt_size_t size)
  92. {
  93. rt_uint8_t *ptr;
  94. rt_err_t err_code;
  95. struct serial_device *uart;
  96. ptr = buffer;
  97. err_code = RT_EOK;
  98. uart = (struct serial_device*)dev->user_data;
  99. if (dev->flag & RT_DEVICE_FLAG_INT_RX)
  100. {
  101. rt_base_t level;
  102. /* interrupt mode Rx */
  103. while (size)
  104. {
  105. if (uart->int_rx->read_index != uart->int_rx->save_index)
  106. {
  107. *ptr++ = uart->int_rx->rx_buffer[uart->int_rx->read_index];
  108. size --;
  109. /* disable interrupt */
  110. level = rt_hw_interrupt_disable();
  111. uart->int_rx->read_index ++;
  112. if (uart->int_rx->read_index >= UART_RX_BUFFER_SIZE)
  113. uart->int_rx->read_index = 0;
  114. /* enable interrupt */
  115. rt_hw_interrupt_enable(level);
  116. }
  117. else
  118. {
  119. /* set error code */
  120. err_code = -RT_EEMPTY;
  121. break;
  122. }
  123. }
  124. }
  125. else
  126. {
  127. /* polling mode */
  128. while ((rt_uint32_t)ptr - (rt_uint32_t)buffer < size)
  129. {
  130. while (uart->uart_device->SSR & SSR_RDRF)
  131. {
  132. *ptr = uart->uart_device->RDR & 0xff;
  133. ptr ++;
  134. }
  135. }
  136. }
  137. /* set error code */
  138. rt_set_errno(err_code);
  139. return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
  140. }
  141. static rt_size_t rt_serial_write(rt_device_t dev, rt_off_t pos,
  142. const void *buffer, rt_size_t size)
  143. {
  144. rt_uint8_t *ptr;
  145. rt_err_t err_code;
  146. struct serial_device *uart;
  147. err_code = RT_EOK;
  148. ptr = (rt_uint8_t*)buffer;
  149. uart = (struct serial_device*)dev->user_data;
  150. if (dev->flag & RT_DEVICE_FLAG_INT_TX)
  151. {
  152. /* interrupt mode Tx */
  153. while (uart->int_tx->save_index != uart->int_tx->write_index)
  154. {
  155. /* save on tx buffer */
  156. uart->int_tx->tx_buffer[uart->int_tx->save_index] = *ptr++;
  157. -- size;
  158. /* move to next position */
  159. uart->int_tx->save_index ++;
  160. /* wrap save index */
  161. if (uart->int_tx->save_index >= UART_TX_BUFFER_SIZE)
  162. uart->int_tx->save_index = 0;
  163. }
  164. /* set error code */
  165. if (size > 0)
  166. err_code = -RT_EFULL;
  167. }
  168. else
  169. {
  170. /* polling mode */
  171. while (size)
  172. {
  173. /*
  174. * to be polite with serial console add a line feed
  175. * to the carriage return character
  176. */
  177. if (*ptr == '\n' && (dev->flag & RT_DEVICE_FLAG_STREAM))
  178. {
  179. while (!(uart->uart_device->SSR & SSR_TDRE));
  180. uart->uart_device->TDR = '\r';
  181. }
  182. while (!(uart->uart_device->SSR & SSR_TDRE));
  183. uart->uart_device->TDR = (*ptr & 0x1FF);
  184. ++ptr;
  185. --size;
  186. }
  187. }
  188. /* set error code */
  189. rt_set_errno(err_code);
  190. return (rt_uint32_t)ptr - (rt_uint32_t)buffer;
  191. }
  192. static rt_err_t rt_serial_control(rt_device_t dev, rt_uint8_t cmd, void *args)
  193. {
  194. RT_ASSERT(dev != RT_NULL);
  195. switch (cmd)
  196. {
  197. case RT_DEVICE_CTRL_SUSPEND:
  198. /* suspend device */
  199. dev->flag |= RT_DEVICE_FLAG_SUSPENDED;
  200. break;
  201. case RT_DEVICE_CTRL_RESUME:
  202. /* resume device */
  203. dev->flag &= ~RT_DEVICE_FLAG_SUSPENDED;
  204. break;
  205. }
  206. return RT_EOK;
  207. }
  208. /*
  209. * serial register
  210. */
  211. rt_err_t rt_hw_serial_register(rt_device_t device, const char *name,
  212. rt_uint32_t flag, struct serial_device *serial)
  213. {
  214. RT_ASSERT(device != RT_NULL);
  215. device->type = RT_Device_Class_Char;
  216. device->rx_indicate = RT_NULL;
  217. device->tx_complete = RT_NULL;
  218. device->init = rt_serial_init;
  219. device->open = rt_serial_open;
  220. device->close = rt_serial_close;
  221. device->read = rt_serial_read;
  222. device->write = rt_serial_write;
  223. device->control = rt_serial_control;
  224. device->user_data = serial;
  225. /* register a character device */
  226. return rt_device_register(device, name, flag);
  227. }
  228. /* ISR for serial interrupt */
  229. void rt_hw_serial_isr(rt_device_t device)
  230. {
  231. struct serial_device *uart = (struct serial_device*)device->user_data;
  232. /* interrupt mode receive */
  233. RT_ASSERT(device->flag & RT_DEVICE_FLAG_INT_RX);
  234. /* save on rx buffer */
  235. while (uart->uart_device->SSR & SSR_RDRF)
  236. {
  237. rt_serial_savechar(uart, uart->uart_device->RDR & 0xff);
  238. }
  239. /* invoke callback */
  240. if (device->rx_indicate != RT_NULL)
  241. {
  242. rt_size_t rx_length;
  243. /* get rx length */
  244. rx_length = uart->int_rx->read_index > uart->int_rx->save_index ?
  245. UART_RX_BUFFER_SIZE - uart->int_rx->read_index + uart->int_rx->save_index :
  246. uart->int_rx->save_index - uart->int_rx->read_index;
  247. device->rx_indicate(device, rx_length);
  248. }
  249. }
  250. #if (defined(RT_USING_UART0_0) || defined(RT_USING_UART0_1))
  251. /* UART0 device driver structure */
  252. struct serial_int_rx uart0_int_rx;
  253. struct serial_device uart0 =
  254. {
  255. FM3_MFS0_UART,
  256. MFS0RX_IRQn,
  257. MFS0TX_IRQn,
  258. &uart0_int_rx,
  259. RT_NULL
  260. };
  261. struct rt_device uart0_device;
  262. void MFS0RX_IRQHandler(void)
  263. {
  264. /* enter interrupt */
  265. rt_interrupt_enter();
  266. rt_hw_serial_isr(&uart0_device);
  267. /* leave interrupt */
  268. rt_interrupt_leave();
  269. }
  270. #endif
  271. #if (defined(RT_USING_UART1_0) || defined(RT_USING_UART1_1))
  272. /* UART1 device driver structure */
  273. struct serial_int_rx uart1_int_rx;
  274. struct serial_device uart1 =
  275. {
  276. FM3_MFS1_UART,
  277. MFS1RX_IRQn,
  278. MFS1TX_IRQn,
  279. &uart1_int_rx,
  280. RT_NULL
  281. };
  282. struct rt_device uart1_device;
  283. void MFS1RX_IRQHandler(void)
  284. {
  285. /* enter interrupt */
  286. rt_interrupt_enter();
  287. rt_hw_serial_isr(&uart1_device);
  288. /* leave interrupt */
  289. rt_interrupt_leave();
  290. }
  291. #endif
  292. #if (defined(RT_USING_UART2_0) || defined(RT_USING_UART2_1) || defined(RT_USING_UART2_2))
  293. /* UART2 device driver structure */
  294. struct serial_int_rx uart2_int_rx;
  295. struct serial_device uart2 =
  296. {
  297. FM3_MFS2_UART,
  298. MFS2RX_IRQn,
  299. MFS2TX_IRQn,
  300. &uart2_int_rx,
  301. RT_NULL
  302. };
  303. struct rt_device uart2_device;
  304. void MFS2RX_IRQHandler(void)
  305. {
  306. /* enter interrupt */
  307. rt_interrupt_enter();
  308. rt_hw_serial_isr(&uart2_device);
  309. /* leave interrupt */
  310. rt_interrupt_leave();
  311. }
  312. #endif
  313. #if (defined(RT_USING_UART3_0) || defined(RT_USING_UART3_1) || defined(RT_USING_UART3_2))
  314. /* UART3 device driver structure */
  315. struct serial_int_rx uart3_int_rx;
  316. struct serial_device uart3 =
  317. {
  318. FM3_MFS3_UART,
  319. MFS3RX_IRQn,
  320. MFS3TX_IRQn,
  321. &uart3_int_rx,
  322. RT_NULL
  323. };
  324. struct rt_device uart3_device;
  325. void MFS3RX_IRQHandler(void)
  326. {
  327. /* enter interrupt */
  328. rt_interrupt_enter();
  329. rt_hw_serial_isr(&uart3_device);
  330. /* leave interrupt */
  331. rt_interrupt_leave();
  332. }
  333. #endif
  334. void uart_pin_setup(void)
  335. {
  336. #if defined(RT_USING_UART0_0)
  337. /* Set UART Ch0 Port, SIN0_0(P21), SOT0_0(P22) */
  338. FM3_GPIO->PFR2_f.P1 = 1;
  339. FM3_GPIO->PFR2_f.P2 = 1;
  340. FM3_GPIO->EPFR07_f.SIN0S0 = 1;
  341. FM3_GPIO->EPFR07_f.SIN0S1 = 0;
  342. FM3_GPIO->EPFR07_f.SOT0B0 = 1;
  343. FM3_GPIO->EPFR07_f.SOT0B1 = 0;
  344. #elif defined(RT_USING_UART0_1)
  345. /* Set UART Ch0 Port, SIN0_1(P14), SOT0_1(P15) */
  346. FM3_GPIO->PFR1_f.P4 = 1;
  347. FM3_GPIO->PFR1_f.P5 = 1;
  348. FM3_GPIO->EPFR07_f.SIN0S0 = 0;
  349. FM3_GPIO->EPFR07_f.SIN0S1 = 1;
  350. FM3_GPIO->EPFR07_f.SOT0B0 = 0;
  351. FM3_GPIO->EPFR07_f.SOT0B1 = 1;
  352. #endif
  353. #if defined(RT_USING_UART1_0)
  354. /* Set UART Ch1 Port, SIN1_0(P56), SOT1_0(P57) */
  355. FM3_GPIO->PFR5_f.P6 = 1;
  356. FM3_GPIO->PFR5_f.P7 = 1;
  357. FM3_GPIO->EPFR07_f.SIN1S0 = 1;
  358. FM3_GPIO->EPFR07_f.SIN1S1 = 0;
  359. FM3_GPIO->EPFR07_f.SOT1B0 = 1;
  360. FM3_GPIO->EPFR07_f.SOT1B1 = 0;
  361. #elif defined(RT_USING_UART1_1)
  362. /* Set UART Ch1 Port, SIN1_1(P11), SOT1_1(P12) */
  363. FM3_GPIO->PFR1_f.P1 = 1;
  364. FM3_GPIO->PFR1_f.P2 = 1;
  365. FM3_GPIO->EPFR07_f.SIN1S0 = 0;
  366. FM3_GPIO->EPFR07_f.SIN1S1 = 1;
  367. FM3_GPIO->EPFR07_f.SOT1B0 = 0;
  368. FM3_GPIO->EPFR07_f.SOT1B1 = 1;
  369. #endif
  370. #if defined(RT_USING_UART2_0)
  371. /* Set UART Ch2 Port, SIN2_0(P72), SOT2_0(P73) */
  372. FM3_GPIO->PFR7_f.P2 = 1;
  373. FM3_GPIO->PFR7_f.P3 = 1;
  374. FM3_GPIO->EPFR07_f.SIN2S0 = 1;
  375. FM3_GPIO->EPFR07_f.SIN2S1 = 0;
  376. FM3_GPIO->EPFR07_f.SOT2B0 = 1;
  377. FM3_GPIO->EPFR07_f.SOT2B1 = 0;
  378. #elif defined(RT_USING_UART2_1)
  379. /* Set UART Ch2 Port, SIN2_1(P24), SOT2_1(P25) */
  380. FM3_GPIO->PFR2_f.P4 = 1;
  381. FM3_GPIO->PFR2_f.P5 = 1;
  382. FM3_GPIO->EPFR07_f.SIN2S0 = 0;
  383. FM3_GPIO->EPFR07_f.SIN2S1 = 1;
  384. FM3_GPIO->EPFR07_f.SOT2B0 = 0;
  385. FM3_GPIO->EPFR07_f.SOT2B1 = 1;
  386. #elif defined(RT_USING_UART2_2)
  387. /* Set UART Ch2 Port, SIN2_2(P17), SOT2_2(P18) */
  388. FM3_GPIO->PFR1_f.P7 = 1;
  389. FM3_GPIO->PFR1_f.P8 = 1;
  390. FM3_GPIO->EPFR07_f.SIN2S0 = 1;
  391. FM3_GPIO->EPFR07_f.SIN2S1 = 1;
  392. FM3_GPIO->EPFR07_f.SOT2B0 = 1;
  393. FM3_GPIO->EPFR07_f.SOT2B1 = 1;
  394. #endif
  395. #if defined(RT_USING_UART3_0)
  396. /* Set UART Ch3 Port, SIN3_0(P66), SOT3_0(P67) */
  397. FM3_GPIO->PFR6_f.P6 = 1;
  398. FM3_GPIO->PFR6_f.P7 = 1;
  399. FM3_GPIO->EPFR07_f.SIN3S0 = 1;
  400. FM3_GPIO->EPFR07_f.SIN3S1 = 0;
  401. FM3_GPIO->EPFR07_f.SOT3B0 = 1;
  402. FM3_GPIO->EPFR07_f.SOT3B1 = 0;
  403. #elif defined(RT_USING_UART3_1)
  404. /* Set UART Ch3 Port, SIN3_1(P50), SOT3_1(P51) */
  405. FM3_GPIO->PFR5_f.P0 = 1;
  406. FM3_GPIO->PFR5_f.P1 = 1;
  407. FM3_GPIO->EPFR07_f.SIN3S0 = 0;
  408. FM3_GPIO->EPFR07_f.SIN3S1 = 1;
  409. FM3_GPIO->EPFR07_f.SOT3B0 = 0;
  410. FM3_GPIO->EPFR07_f.SOT3B1 = 1;
  411. #elif defined(RT_USING_UART3_2)
  412. /* Set UART Ch3 Port, SIN3_2(P48), SOT3_2(P49) */
  413. FM3_GPIO->PFR4_f.P8 = 1;
  414. FM3_GPIO->PFR4_f.P9 = 1;
  415. FM3_GPIO->EPFR07_f.SIN3S0 = 1;
  416. FM3_GPIO->EPFR07_f.SIN3S1 = 1;
  417. FM3_GPIO->EPFR07_f.SOT3B0 = 1;
  418. FM3_GPIO->EPFR07_f.SOT3B1 = 1;
  419. #endif
  420. #if defined(RT_USING_UART4_0)
  421. /* Set UART Ch4 Port, SIN4_0(P0A), SOT4_0(P0B), CTS4_0(P0E), RTS4_0(P0D) */
  422. FM3_GPIO->PFR0_f.PA = 1;
  423. FM3_GPIO->PFR0_f.PB = 1;
  424. FM3_GPIO->PFR0_f.PD = 1;
  425. FM3_GPIO->PFR0_f.PE = 1;
  426. FM3_GPIO->EPFR08_f.SIN4S0 = 1;
  427. FM3_GPIO->EPFR08_f.SIN4S1 = 0;
  428. FM3_GPIO->EPFR08_f.SOT4B0 = 1;
  429. FM3_GPIO->EPFR08_f.SOT4B1 = 0;
  430. FM3_GPIO->EPFR08_f.CTS4S0 = 1;
  431. FM3_GPIO->EPFR08_f.CTS4S1 = 0;
  432. FM3_GPIO->EPFR08_f.RTS4E0 = 1;
  433. FM3_GPIO->EPFR08_f.RTS4E1 = 0;
  434. #elif defined(RT_USING_UART4_1)
  435. /* Set UART Ch4 Port, SIN4_1(P1A), SOT4_1(P1B), CTS4_1(P1D), RTS4_1(P1E) */
  436. FM3_GPIO->PFR1_f.PA = 1;
  437. FM3_GPIO->PFR1_f.PB = 1;
  438. FM3_GPIO->PFR1_f.PD = 1;
  439. FM3_GPIO->PFR1_f.PE = 1;
  440. FM3_GPIO->EPFR08_f.SIN4S0 = 0;
  441. FM3_GPIO->EPFR08_f.SIN4S1 = 1;
  442. FM3_GPIO->EPFR08_f.SOT4B0 = 0;
  443. FM3_GPIO->EPFR08_f.SOT4B1 = 1;
  444. FM3_GPIO->EPFR08_f.CTS4S0 = 0;
  445. FM3_GPIO->EPFR08_f.CTS4S1 = 1;
  446. FM3_GPIO->EPFR08_f.RTS4E0 = 0;
  447. FM3_GPIO->EPFR08_f.RTS4E1 = 1;
  448. #elif defined(RT_USING_UART4_2)
  449. /* Set UART Ch4 Port, SIN4_2(P05), SOT4_2(P06), CTS4_2(P08), RTS4_2(P09)*/
  450. FM3_GPIO->PFR0_f.P5 = 1;
  451. FM3_GPIO->PFR0_f.P6 = 1;
  452. FM3_GPIO->PFR0_f.P8 = 1;
  453. FM3_GPIO->PFR0_f.P9 = 1;
  454. FM3_GPIO->EPFR08_f.SIN4S0 = 1;
  455. FM3_GPIO->EPFR08_f.SIN4S1 = 1;
  456. FM3_GPIO->EPFR08_f.SOT4B0 = 1;
  457. FM3_GPIO->EPFR08_f.SOT4B1 = 1;
  458. FM3_GPIO->EPFR08_f.CTS4S0 = 1;
  459. FM3_GPIO->EPFR08_f.CTS4S1 = 1;
  460. FM3_GPIO->EPFR08_f.RTS4E0 = 1;
  461. FM3_GPIO->EPFR08_f.RTS4E1 = 1;
  462. #endif
  463. #if defined(RT_USING_UART5_0)
  464. /* Set UART Ch5 Port, SIN5_0(P60), SOT5_0(P61) */
  465. FM3_GPIO->PFR6_f.P0 = 1;
  466. FM3_GPIO->PFR6_f.P1 = 1;
  467. FM3_GPIO->EPFR08_f.SIN5S0 = 1;
  468. FM3_GPIO->EPFR08_f.SIN5S1 = 0;
  469. FM3_GPIO->EPFR08_f.SOT5B0 = 1;
  470. FM3_GPIO->EPFR08_f.SOT5B1 = 0;
  471. #elif defined(RT_USING_UART5_1)
  472. /* Set UART Ch5 Port, SIN5_1(P63), SOT5_1(P64) */
  473. FM3_GPIO->PFR6_f.P3 = 1;
  474. FM3_GPIO->PFR6_f.P4 = 1;
  475. FM3_GPIO->EPFR08_f.SIN5S0 = 0;
  476. FM3_GPIO->EPFR08_f.SIN5S1 = 1;
  477. FM3_GPIO->EPFR08_f.SOT5B0 = 0;
  478. FM3_GPIO->EPFR08_f.SOT5B1 = 1;
  479. #elif defined(RT_USING_UART5_2)
  480. /* Set UART Ch5 Port, SIN5_2(P36), SOT5_2(P37) */
  481. FM3_GPIO->PFR3_f.P6 = 1;
  482. FM3_GPIO->PFR3_f.P7 = 1;
  483. FM3_GPIO->EPFR08_f.SIN5S0 = 1;
  484. FM3_GPIO->EPFR08_f.SIN5S1 = 1;
  485. FM3_GPIO->EPFR08_f.SOT5B0 = 1;
  486. FM3_GPIO->EPFR08_f.SOT5B1 = 1;
  487. #endif
  488. #if defined(RT_USING_UART6_0)
  489. /* Set UART Ch6 Port, SIN6_0(P53), SOT6_0(P54) */
  490. FM3_GPIO->PFR5_f.P3 = 1;
  491. FM3_GPIO->PFR5_f.P4 = 1;
  492. FM3_GPIO->EPFR08_f.SIN6S0 = 1;
  493. FM3_GPIO->EPFR08_f.SIN6S1 = 0;
  494. FM3_GPIO->EPFR08_f.SOT6B0 = 1;
  495. FM3_GPIO->EPFR08_f.SOT6B1 = 0;
  496. #elif defined(RT_USING_UART6_1)
  497. /* Set UART Ch6 Port, SIN6_1(P33), SOT6_1(P32) */
  498. FM3_GPIO->PFR3_f.P2 = 1;
  499. FM3_GPIO->PFR3_f.P3 = 1;
  500. FM3_GPIO->EPFR08_f.SIN6S0 = 0;
  501. FM3_GPIO->EPFR08_f.SIN6S1 = 1;
  502. FM3_GPIO->EPFR08_f.SOT6B0 = 0;
  503. FM3_GPIO->EPFR08_f.SOT6B1 = 1;
  504. #endif
  505. #if defined(RT_USING_UART7_0)
  506. /* Set UART Ch7 Port, SIN7_0(P59), SOT7_0(P5A) */
  507. FM3_GPIO->PFR5_f.P9 = 1;
  508. FM3_GPIO->PFR5_f.PA = 1;
  509. FM3_GPIO->EPFR08_f.SIN7S0 = 1;
  510. FM3_GPIO->EPFR08_f.SIN7S1 = 0;
  511. FM3_GPIO->EPFR08_f.SOT7B0 = 1;
  512. FM3_GPIO->EPFR08_f.SOT7B1 = 0;
  513. #elif defined(RT_USING_UART7_1)
  514. /* Set UART Ch7 Port, SIN7_1(P4E), SOT7_1(P4D) */
  515. FM3_GPIO->PFR4_f.PD = 1;
  516. FM3_GPIO->PFR4_f.PE = 1;
  517. FM3_GPIO->EPFR08_f.SIN7S0 = 0;
  518. FM3_GPIO->EPFR08_f.SIN7S1 = 1;
  519. FM3_GPIO->EPFR08_f.SOT7B0 = 0;
  520. FM3_GPIO->EPFR08_f.SOT7B1 = 1;
  521. #endif
  522. }
  523. void rt_hw_serial_init(void)
  524. {
  525. uart_pin_setup();
  526. #if (defined(RT_USING_UART0_0) || defined(RT_USING_UART0_1))
  527. /* initialize UART0 */
  528. uart0.uart_device->SMR = SMR_MD_UART | SMR_SOE;
  529. uart0.uart_device->BGR = (40000000UL + (BPS/2))/BPS - 1;
  530. uart0.uart_device->ESCR = ESCR_DATABITS_8;
  531. uart0.uart_device->SCR = SCR_RXE | SCR_TXE | SCR_RIE;
  532. /* register UART0 device */
  533. rt_hw_serial_register(&uart0_device,
  534. "uart0",
  535. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  536. &uart0);
  537. #endif
  538. #if (defined(RT_USING_UART1_0) || defined(RT_USING_UART1_1))
  539. /* initialize UART1 */
  540. uart1.uart_device->SMR = SMR_MD_UART | SMR_SOE;
  541. uart1.uart_device->BGR = (40000000UL + (BPS/2))/BPS - 1;
  542. uart1.uart_device->ESCR = ESCR_DATABITS_8;
  543. uart1.uart_device->SCR = SCR_RXE | SCR_TXE | SCR_RIE;
  544. /* register UART1 device */
  545. rt_hw_serial_register(&uart1_device,
  546. "uart1",
  547. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  548. &uart1);
  549. #endif
  550. #if (defined(RT_USING_UART2_0) || defined(RT_USING_UART2_1) || defined(RT_USING_UART2_2))
  551. /* initialize UART2 */
  552. uart2.uart_device->SMR = SMR_MD_UART | SMR_SOE;
  553. uart2.uart_device->BGR = (40000000UL + (BPS/2))/BPS - 1;
  554. uart2.uart_device->ESCR = ESCR_DATABITS_8;
  555. uart2.uart_device->SCR = SCR_RXE | SCR_TXE | SCR_RIE;
  556. /* register UART2 device */
  557. rt_hw_serial_register(&uart2_device,
  558. "uart2",
  559. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  560. &uart2);
  561. #endif
  562. #if (defined(RT_USING_UART3_0) || defined(RT_USING_UART3_1) || defined(RT_USING_UART3_2))
  563. /* initialize UART3 */
  564. uart3.uart_device->SMR = SMR_MD_UART | SMR_SOE;
  565. uart3.uart_device->BGR = (40000000UL + (BPS/2))/BPS - 1;
  566. uart3.uart_device->ESCR = ESCR_DATABITS_8;
  567. uart3.uart_device->SCR = SCR_RXE | SCR_TXE | SCR_RIE;
  568. /* register UART3 device */
  569. rt_hw_serial_register(&uart3_device,
  570. "uart3",
  571. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
  572. &uart3);
  573. #endif
  574. }
  575. /*@}*/