drv_i2c.c 10.0 KB

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  1. /*
  2. * File : drv_i2c.c
  3. * This file is part of RT-Thread RTOS
  4. * COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. *
  20. * Change Logs:
  21. * Date Author Notes
  22. * 2017-06-05 tanek first implementation.
  23. * 2018-04-19 misonyo Porting for gd32f30x
  24. */
  25. #include "drv_i2c.h"
  26. #include <rtthread.h>
  27. #include "gd32f30x.h"
  28. #ifdef RT_USING_I2C
  29. #include <rtdevice.h>
  30. #define DBG_TAG "drv.I2C"
  31. #ifdef RT_I2C_DEBUG
  32. #define DBG_LVL DBG_LOG
  33. #else
  34. #define DBG_LVL DBG_INFO
  35. #endif
  36. #include <rtdbg.h>
  37. #ifdef RT_USING_I2C_BITOPS
  38. /*user can change this*/
  39. #define I2C_BUS_NAME "i2c2"
  40. /*user should change this to adapt specific board*/
  41. #define I2C_SCL_PIN GPIO_PIN_4
  42. #define I2C_SCL_PORT GPIOE
  43. #define I2C_SCL_CLK RCU_GPIOE
  44. #define I2C_SDA_PIN GPIO_PIN_5
  45. #define I2C_SDA_PORT GPIOE
  46. #define I2C_SDA_CLK RCU_GPIOE
  47. struct gd32_i2c_bit_data
  48. {
  49. struct
  50. {
  51. rcu_periph_enum clk;
  52. rt_uint32_t port;
  53. rt_uint32_t pin;
  54. }scl, sda;
  55. };
  56. static void gpio_set_sda(void *data, rt_int32_t state)
  57. {
  58. struct gd32_i2c_bit_data* bd = data;
  59. if (state)
  60. {
  61. gpio_bit_set(bd->sda.port, bd->sda.pin);
  62. }
  63. else
  64. {
  65. gpio_bit_reset(bd->sda.port, bd->sda.pin);
  66. }
  67. }
  68. static void gpio_set_scl(void *data, rt_int32_t state)
  69. {
  70. struct gd32_i2c_bit_data* bd = data;
  71. if (state)
  72. {
  73. gpio_bit_set(bd->scl.port, bd->scl.pin);
  74. }
  75. else
  76. {
  77. gpio_bit_reset(bd->scl.port, bd->scl.pin);
  78. }
  79. }
  80. static rt_int32_t gpio_get_sda(void *data)
  81. {
  82. struct gd32_i2c_bit_data* bd = data;
  83. return gpio_input_bit_get(bd->sda.port, bd->sda.pin);
  84. }
  85. static rt_int32_t gpio_get_scl(void *data)
  86. {
  87. struct gd32_i2c_bit_data* bd = data;
  88. return gpio_input_bit_get(bd->scl.port, bd->scl.pin);
  89. }
  90. static void gpio_udelay(rt_uint32_t us)
  91. {
  92. int i = ( rcu_clock_freq_get(CK_SYS) / 4000000 * us);
  93. while(i)
  94. {
  95. i--;
  96. }
  97. }
  98. static void drv_i2c_gpio_init(const struct gd32_i2c_bit_data* bd)
  99. {
  100. rcu_periph_clock_enable(bd->sda.clk);
  101. rcu_periph_clock_enable(bd->scl.clk);
  102. gpio_init(bd->sda.port, GPIO_MODE_OUT_OD, GPIO_OSPEED_10MHZ, bd->sda.pin);
  103. gpio_init(bd->scl.port, GPIO_MODE_OUT_OD, GPIO_OSPEED_10MHZ, bd->scl.pin);
  104. gpio_bit_set(bd->sda.port, bd->sda.pin);
  105. gpio_bit_set(bd->scl.port, bd->scl.pin);
  106. }
  107. #else /* use hardware i2c */
  108. struct gd32_i2c_bus
  109. {
  110. struct rt_i2c_bus_device parent;
  111. rt_uint32_t i2c_periph;
  112. };
  113. static int gd32_i2c_read(rt_uint32_t i2c_periph, rt_uint16_t slave_address, rt_uint8_t* p_buffer, rt_uint16_t data_byte)
  114. {
  115. /* wait until I2C bus is idle */
  116. while(i2c_flag_get(i2c_periph, I2C_FLAG_I2CBSY));
  117. /* send a start condition to I2C bus */
  118. i2c_start_on_bus(i2c_periph);
  119. /* wait until SBSEND bit is set */
  120. while(!i2c_flag_get(i2c_periph, I2C_FLAG_SBSEND));
  121. /* send slave address to I2C bus */
  122. i2c_master_addressing(i2c_periph, slave_address<<1, I2C_RECEIVER);
  123. /* wait until ADDSEND bit is set */
  124. while(!i2c_flag_get(i2c_periph, I2C_FLAG_ADDSEND));
  125. /* clear the ADDSEND bit */
  126. i2c_flag_clear(i2c_periph,I2C_FLAG_ADDSEND);
  127. if(1 == data_byte){
  128. /* disable acknowledge */
  129. i2c_ack_config(i2c_periph,I2C_ACK_DISABLE);
  130. /* send a stop condition to I2C bus */
  131. i2c_stop_on_bus(i2c_periph);
  132. }
  133. /* while there is data to be read */
  134. while(data_byte)
  135. {
  136. /* wait until the RBNE bit is set and clear it */
  137. if(i2c_flag_get(i2c_periph, I2C_FLAG_RBNE))
  138. {
  139. /* read a byte from the EEPROM */
  140. *p_buffer = i2c_data_receive(i2c_periph);
  141. /* point to the next location where the byte read will be saved */
  142. p_buffer++;
  143. /* decrement the read bytes counter */
  144. data_byte--;
  145. if(1 == data_byte)
  146. {
  147. /* disable acknowledge */
  148. i2c_ack_config(i2c_periph,I2C_ACK_DISABLE);
  149. /* send a stop condition to I2C bus */
  150. i2c_stop_on_bus(i2c_periph);
  151. }
  152. }
  153. }
  154. /* wait until the stop condition is finished */
  155. while(I2C_CTL0(i2c_periph)&0x0200);
  156. /* enable acknowledge */
  157. i2c_ack_config(i2c_periph,I2C_ACK_ENABLE);
  158. i2c_ackpos_config(i2c_periph,I2C_ACKPOS_CURRENT);
  159. return 0;
  160. }
  161. static int gd32_i2c_write(rt_uint32_t i2c_periph, uint16_t slave_address, uint8_t* p_buffer, uint16_t data_byte)
  162. {
  163. /* wait until I2C bus is idle */
  164. while(i2c_flag_get(i2c_periph, I2C_FLAG_I2CBSY));
  165. /* send a start condition to I2C bus */
  166. i2c_start_on_bus(i2c_periph);
  167. /* wait until SBSEND bit is set */
  168. while(!i2c_flag_get(i2c_periph, I2C_FLAG_SBSEND));
  169. /* send slave address to I2C bus */
  170. i2c_master_addressing(i2c_periph, slave_address<<1, I2C_TRANSMITTER);
  171. /* wait until ADDSEND bit is set */
  172. while(!i2c_flag_get(i2c_periph, I2C_FLAG_ADDSEND));
  173. /* clear the ADDSEND bit */
  174. i2c_flag_clear(i2c_periph,I2C_FLAG_ADDSEND);
  175. /* wait until the transmit data buffer is empty */
  176. while(SET != i2c_flag_get( i2c_periph , I2C_FLAG_TBE));
  177. /* while there is data to be read */
  178. while(data_byte)
  179. {
  180. i2c_data_transmit(i2c_periph, *p_buffer);
  181. /* point to the next byte to be written */
  182. p_buffer++;
  183. /* decrement the write bytes counter */
  184. data_byte --;
  185. /* wait until BTC bit is set */
  186. while(!i2c_flag_get(i2c_periph, I2C_FLAG_BTC));
  187. }
  188. /* send a stop condition to I2C bus */
  189. i2c_stop_on_bus(i2c_periph);
  190. /* wait until the stop condition is finished */
  191. while(I2C_CTL0(i2c_periph)&0x0200);
  192. return 0;
  193. }
  194. static rt_size_t gd32_i2c_xfer(struct rt_i2c_bus_device *bus, struct rt_i2c_msg msgs[], rt_uint32_t num)
  195. {
  196. struct rt_i2c_msg *msg;
  197. rt_uint32_t i;
  198. rt_err_t ret = RT_ERROR;
  199. struct gd32_i2c_bus *gd32_i2c = (struct gd32_i2c_bus *)bus;
  200. for (i = 0; i < num; i++)
  201. {
  202. msg = &msgs[i];
  203. if (msg->flags & RT_I2C_ADDR_10BIT)
  204. {
  205. i2c_mode_addr_config(gd32_i2c->i2c_periph,I2C_I2CMODE_ENABLE,I2C_ADDFORMAT_10BITS,0);
  206. }
  207. else
  208. {
  209. i2c_mode_addr_config(gd32_i2c->i2c_periph,I2C_I2CMODE_ENABLE,I2C_ADDFORMAT_7BITS,0);
  210. }
  211. if (msg->flags & RT_I2C_RD)
  212. {
  213. if (gd32_i2c_read(gd32_i2c->i2c_periph, msg->addr, msg->buf, msg->len) != 0)
  214. {
  215. LOG_E("i2c bus write failed,i2c bus stop!");
  216. goto out;
  217. }
  218. }
  219. else
  220. {
  221. if (gd32_i2c_write(gd32_i2c->i2c_periph, msg->addr, msg->buf, msg->len) != 0)
  222. {
  223. LOG_E("i2c bus write failed,i2c bus stop!");
  224. goto out;
  225. }
  226. }
  227. }
  228. ret = i;
  229. out:
  230. LOG_E("send stop condition\n");
  231. return ret;
  232. }
  233. static const struct rt_i2c_bus_device_ops i2c_ops =
  234. {
  235. gd32_i2c_xfer,
  236. RT_NULL,
  237. RT_NULL
  238. };
  239. #endif /* RT_USING_I2C_BITOPS */
  240. int rt_hw_i2c_init(void)
  241. {
  242. #ifdef RT_USING_I2C_BITOPS
  243. {
  244. static struct rt_i2c_bus_device i2c_device;
  245. static const struct gd32_i2c_bit_data _i2c_bdata =
  246. {
  247. /* SCL */
  248. { I2C_SCL_CLK, I2C_SCL_PORT, I2C_SCL_PIN},
  249. /* SDA */
  250. { I2C_SDA_CLK, I2C_SDA_PORT, I2C_SDA_PIN},
  251. };
  252. static const struct rt_i2c_bit_ops _i2c_bit_ops =
  253. {
  254. (void*)&_i2c_bdata,
  255. gpio_set_sda,
  256. gpio_set_scl,
  257. gpio_get_sda,
  258. gpio_get_scl,
  259. gpio_udelay,
  260. 1,
  261. 100
  262. };
  263. drv_i2c_gpio_init(&_i2c_bdata);
  264. i2c_device.priv = (void *)&_i2c_bit_ops;
  265. rt_i2c_bit_add_bus(&i2c_device, I2C_BUS_NAME);
  266. }
  267. #else /* register hardware I2C */
  268. #ifdef RT_USING_I2C0
  269. #define I2C0_SPEED 100000
  270. static struct gd32_i2c_bus gd32_i2c0;
  271. /* enable GPIOB clock */
  272. rcu_periph_clock_enable(RCU_GPIOB);
  273. /* connect PB6 to I2C0_SCL, PB7 to I2C0_SDA */
  274. gpio_init(GPIOB, GPIO_MODE_AF_OD, GPIO_OSPEED_50MHZ, GPIO_PIN_6 | GPIO_PIN_7);
  275. /* enable I2C clock */
  276. rcu_periph_clock_enable(RCU_I2C0);
  277. /* configure I2C clock */
  278. i2c_clock_config(I2C0,I2C0_SPEED,I2C_DTCY_2);
  279. i2c_enable(I2C0);
  280. /* enable acknowledge */
  281. i2c_ack_config(I2C0,I2C_ACK_ENABLE);
  282. rt_memset((void *)&gd32_i2c0, 0, sizeof(struct gd32_i2c_bus));
  283. gd32_i2c0.parent.ops = &i2c_ops;
  284. gd32_i2c0.i2c_periph = I2C0;
  285. rt_i2c_bus_device_register(&gd32_i2c0.parent, "i2c0");
  286. #endif
  287. #ifdef RT_USING_I2C1
  288. #define I2C1_SPEED 100000
  289. static struct gd32_i2c_bus gd32_i2c1;
  290. /* enable GPIOB clock */
  291. rcu_periph_clock_enable(RCU_GPIOB);
  292. /* connect PB10 to I2C1_SCL, PB11 to I2C1_SDA */
  293. gpio_init(GPIOB, GPIO_MODE_AF_OD, GPIO_OSPEED_50MHZ, GPIO_PIN_10 | GPIO_PIN_11);
  294. /* enable I2C clock */
  295. rcu_periph_clock_enable(RCU_I2C1);
  296. /* configure I2C clock */
  297. i2c_clock_config(I2C1,I2C1_SPEED,I2C_DTCY_2);
  298. i2c_enable(I2C1);
  299. /* enable acknowledge */
  300. i2c_ack_config(I2C1,I2C_ACK_ENABLE);
  301. rt_memset((void *)&gd32_i2c1, 0, sizeof(struct gd32_i2c_bus));
  302. gd32_i2c1.parent.ops = &i2c_ops;
  303. gd32_i2c1.i2c_periph = I2C1;
  304. rt_i2c_bus_device_register(&gd32_i2c1.parent, "i2c1");
  305. #endif
  306. #endif /* RT_USING_I2C_BITOPS */
  307. return 0;
  308. }
  309. INIT_DEVICE_EXPORT(rt_hw_i2c_init);
  310. #endif
  311. /* end of i2c driver */