start_gcc.S 6.7 KB

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  1. .section .bss.init
  2. .equ Stack_Size, 0x00000200
  3. .space Stack_Size
  4. Initial_spTop:
  5. .syntax unified
  6. .cpu cortex-m3
  7. .fpu softvfp
  8. .thumb
  9. .global g_pfnVectors
  10. .global Default_Handler
  11. /* start address for the initialization values of the .data section.
  12. defined in linker script */
  13. .word _sidata
  14. /* start address for the .data section. defined in linker script */
  15. .word _sdata
  16. /* end address for the .data section. defined in linker script */
  17. .word _edata
  18. /* start address for the .bss section. defined in linker script */
  19. .word _sbss
  20. /* end address for the .bss section. defined in linker script */
  21. .word _ebss
  22. /**
  23. * @brief This is the code that gets called when the processor first
  24. * starts execution following a reset event. Only the absolutely
  25. * necessary set is performed, after which the application
  26. * supplied main() routine is called.
  27. * @param None
  28. * @retval : None
  29. */
  30. .section .text.Reset_Handler
  31. .weak Reset_Handler
  32. .type Reset_Handler, %function
  33. Reset_Handler:
  34. /* restore original stack pointer */
  35. LDR r0, =Initial_spTop
  36. MSR msp, r0
  37. /* Copy the data segment initializers from flash to SRAM */
  38. movs r1, #0
  39. b LoopCopyDataInit
  40. CopyDataInit:
  41. ldr r3, =_sidata
  42. ldr r3, [r3, r1]
  43. str r3, [r0, r1]
  44. adds r1, r1, #4
  45. LoopCopyDataInit:
  46. ldr r0, =_sdata
  47. ldr r3, =_edata
  48. adds r2, r0, r1
  49. cmp r2, r3
  50. bcc CopyDataInit
  51. ldr r2, =_sbss
  52. b LoopFillZerobss
  53. /* Zero fill the bss segment. */
  54. FillZerobss:
  55. movs r3, #0
  56. str r3, [r2], #4
  57. LoopFillZerobss:
  58. ldr r3, = _ebss
  59. cmp r2, r3
  60. bcc FillZerobss
  61. /* Call the application's entry point.*/
  62. bl main
  63. bx lr
  64. .size Reset_Handler, .-Reset_Handler
  65. /**
  66. * @brief This is the code that gets called when the processor receives an
  67. * unexpected interrupt. This simply enters an infinite loop, preserving
  68. * the system state for examination by a debugger.
  69. *
  70. * @param None
  71. * @retval : None
  72. */
  73. .section .text.Default_Handler,"ax",%progbits
  74. Default_Handler:
  75. Infinite_Loop:
  76. b Infinite_Loop
  77. .size Default_Handler, .-Default_Handler
  78. /******************************************************************************
  79. *
  80. * The minimal vector table for a Cortex M3. Note that the proper constructs
  81. * must be placed on this to ensure that it ends up at physical address
  82. * 0x0000.0000.
  83. *
  84. ******************************************************************************/
  85. .section .isr_vector,"a",%progbits
  86. .type g_pfnVectors, %object
  87. .size g_pfnVectors, .-g_pfnVectors
  88. g_pfnVectors:
  89. .word Initial_spTop
  90. .word Reset_Handler
  91. .word Default_Handler //NMI_Handler
  92. .word rt_hw_hard_fault
  93. .word Default_Handler //MemManage_Handler
  94. .word Default_Handler //BusFault_Handler
  95. .word Default_Handler //UsageFault_Handler
  96. .word 0
  97. .word 0
  98. .word 0
  99. .word 0
  100. .word Default_Handler //SVC_Handler
  101. .word Default_Handler //DebugMon_Handler
  102. .word 0
  103. .word rt_hw_pend_sv
  104. .word rt_hw_timer_handler
  105. .word Default_Handler // GPIO Port A
  106. .word Default_Handler // GPIO Port B
  107. .word Default_Handler // GPIO Port C
  108. .word Default_Handler // GPIO Port D
  109. .word Default_Handler // GPIO Port E
  110. .word rt_hw_uart_isr_1 // UART0 Rx and Tx
  111. .word Default_Handler // UART1 Rx and Tx
  112. .word Default_Handler // SSI Rx and Tx
  113. .word Default_Handler // I2C Master and Slave
  114. .word Default_Handler // PWM Fault
  115. .word Default_Handler // PWM Generator 0
  116. .word Default_Handler // PWM Generator 1
  117. .word Default_Handler // PWM Generator 2
  118. .word Default_Handler // Quadrature Encoder
  119. .word Default_Handler // ADC Sequence 0
  120. .word Default_Handler // ADC Sequence 1
  121. .word Default_Handler // ADC Sequence 2
  122. .word Default_Handler // ADC Sequence 3
  123. .word Default_Handler // Watchdog timer
  124. .word Default_Handler // Timer 0 subtimer A
  125. .word Default_Handler // Timer 0 subtimer B
  126. .word Default_Handler // Timer 1 subtimer A
  127. .word Default_Handler // Timer 1 subtimer B
  128. .word Default_Handler // Timer 2 subtimer A
  129. .word Default_Handler // Timer 2 subtimer B
  130. .word Default_Handler // Analog Comparator 0
  131. .word Default_Handler // Analog Comparator 1
  132. .word Default_Handler // Analog Comparator 2
  133. .word Default_Handler // System Control (PLL, OSC,
  134. .word Default_Handler // FLASH Control
  135. .word Default_Handler // GPIO Port F
  136. .word Default_Handler // GPIO Port G
  137. .word Default_Handler // GPIO Port H
  138. .word Default_Handler // UART2 Rx and Tx
  139. .word Default_Handler // SSI1 Rx and Tx
  140. .word Default_Handler // Timer 3 subtimer A
  141. .word Default_Handler // Timer 3 subtimer B
  142. .word Default_Handler // I2C1 Master and Slave
  143. .word Default_Handler // Quadrature Encoder 1
  144. .word Default_Handler // CAN0
  145. .word Default_Handler // CAN1
  146. .word Default_Handler // CAN2
  147. .word luminaryif_isr // Ethernet
  148. .word Default_Handler // Hibernate
  149. .word Default_Handler // USB0
  150. .word Default_Handler // PWM Generator 3
  151. .word Default_Handler // uDMA Software Transfer
  152. .word Default_Handler // uDMA Error