start_rvds.S 9.0 KB

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  1. ;/*****************************************************************************
  2. ; * @file: startup_LPC11xx.s
  3. ; * @purpose: CMSIS Cortex-M0 Core Device Startup File
  4. ; * for the NXP LPC11xx Device Series
  5. ; * @version: V1.0
  6. ; * @date: 25. Nov. 2008
  7. ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
  8. ; *
  9. ; * Copyright (C) 2008 ARM Limited. All rights reserved.
  10. ; * ARM Limited (ARM) is supplying this software for use with Cortex-M0
  11. ; * processor based microcontrollers. This file can be freely distributed
  12. ; * within development tools that are supporting such ARM based processors.
  13. ; *
  14. ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
  15. ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
  16. ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
  17. ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
  18. ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
  19. ; *
  20. ; *****************************************************************************/
  21. ; <h> Stack Configuration
  22. ; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
  23. ; </h>
  24. Stack_Size EQU 0x00000100
  25. AREA STACK, NOINIT, READWRITE, ALIGN=3
  26. Stack_Mem SPACE Stack_Size
  27. __initial_sp
  28. ; <h> Heap Configuration
  29. ; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
  30. ; </h>
  31. Heap_Size EQU 0x00000000
  32. AREA HEAP, NOINIT, READWRITE, ALIGN=3
  33. __heap_base
  34. Heap_Mem SPACE Heap_Size
  35. __heap_limit
  36. PRESERVE8
  37. THUMB
  38. IMPORT rt_hw_hard_fault
  39. IMPORT rt_hw_pend_sv
  40. IMPORT rt_hw_timer_handler
  41. ; Vector Table Mapped to Address 0 at Reset
  42. AREA RESET, DATA, READONLY
  43. EXPORT __Vectors
  44. __Vectors DCD __initial_sp ; Top of Stack
  45. DCD Reset_Handler ; Reset Handler
  46. DCD NMI_Handler ; NMI Handler
  47. DCD rt_hw_hard_fault ; Hard Fault Handler
  48. DCD MemManage_Handler ; MPU Fault Handler
  49. DCD BusFault_Handler ; Bus Fault Handler
  50. DCD UsageFault_Handler ; Usage Fault Handler
  51. DCD 0 ; Reserved
  52. DCD 0 ; Reserved
  53. DCD 0 ; Reserved
  54. DCD 0 ; Reserved
  55. DCD SVC_Handler ; SVCall Handler
  56. DCD DebugMon_Handler ; Debug Monitor Handler
  57. DCD 0 ; Reserved
  58. DCD rt_hw_pend_sv ; PendSV Handler
  59. DCD rt_hw_timer_handler ; SysTick Handler
  60. ; External Interrupts
  61. DCD WAKEUP_IRQHandler ; 15 wakeup sources for all the
  62. DCD WAKEUP_IRQHandler ; I/O pins starting from PIO0 (0:11)
  63. DCD WAKEUP_IRQHandler ; all 40 are routed to the same ISR
  64. DCD WAKEUP_IRQHandler
  65. DCD WAKEUP_IRQHandler
  66. DCD WAKEUP_IRQHandler
  67. DCD WAKEUP_IRQHandler
  68. DCD WAKEUP_IRQHandler
  69. DCD WAKEUP_IRQHandler
  70. DCD WAKEUP_IRQHandler
  71. DCD WAKEUP_IRQHandler
  72. DCD WAKEUP_IRQHandler
  73. DCD WAKEUP_IRQHandler ; PIO1 (0:11)
  74. DCD CAN_IRQHandler ; CAN
  75. DCD SSP1_IRQHandler ; SSP1
  76. DCD I2C_IRQHandler ; I2C
  77. DCD TIMER16_0_IRQHandler ; 16-bit Timer0
  78. DCD TIMER16_1_IRQHandler ; 16-bit Timer1
  79. DCD TIMER32_0_IRQHandler ; 32-bit Timer0
  80. DCD TIMER32_1_IRQHandler ; 32-bit Timer1
  81. DCD SSP0_IRQHandler ; SSP0
  82. DCD UART_IRQHandler ; UART
  83. DCD USB_IRQHandler ; USB IRQ
  84. DCD USB_FIQHandler ; USB FIQ
  85. DCD ADC_IRQHandler ; A/D Converter
  86. DCD WDT_IRQHandler ; Watchdog timer
  87. DCD BOD_IRQHandler ; Brown Out Detect
  88. DCD FMC_IRQHandler ; IP2111 Flash Memory Controller
  89. DCD PIOINT3_IRQHandler ; PIO INT3
  90. DCD PIOINT2_IRQHandler ; PIO INT2
  91. DCD PIOINT1_IRQHandler ; PIO INT1
  92. DCD PIOINT0_IRQHandler ; PIO INT0
  93. IF :LNOT::DEF:NO_CRP
  94. AREA |.ARM.__at_0x02FC|, CODE, READONLY
  95. CRP_Key DCD 0xFFFFFFFF
  96. ENDIF
  97. AREA |.text|, CODE, READONLY
  98. ; Reset Handler
  99. Reset_Handler PROC
  100. EXPORT Reset_Handler [WEAK]
  101. IMPORT __main
  102. LDR R0, =__main
  103. BX R0
  104. ENDP
  105. ; Dummy Exception Handlers (infinite loops which can be modified)
  106. NMI_Handler PROC
  107. EXPORT NMI_Handler [WEAK]
  108. B .
  109. ENDP
  110. HardFault_Handler\
  111. PROC
  112. EXPORT HardFault_Handler [WEAK]
  113. B .
  114. ENDP
  115. MemManage_Handler\
  116. PROC
  117. EXPORT MemManage_Handler [WEAK]
  118. B .
  119. ENDP
  120. BusFault_Handler\
  121. PROC
  122. EXPORT BusFault_Handler [WEAK]
  123. B .
  124. ENDP
  125. UsageFault_Handler\
  126. PROC
  127. EXPORT UsageFault_Handler [WEAK]
  128. B .
  129. ENDP
  130. SVC_Handler PROC
  131. EXPORT SVC_Handler [WEAK]
  132. B .
  133. ENDP
  134. DebugMon_Handler\
  135. PROC
  136. EXPORT DebugMon_Handler [WEAK]
  137. B .
  138. ENDP
  139. PendSV_Handler PROC
  140. EXPORT PendSV_Handler [WEAK]
  141. B .
  142. ENDP
  143. SysTick_Handler PROC
  144. EXPORT SysTick_Handler [WEAK]
  145. B .
  146. ENDP
  147. Default_Handler PROC
  148. EXPORT WAKEUP_IRQHandler [WEAK]
  149. EXPORT CAN_IRQHandler [WEAK]
  150. EXPORT SSP1_IRQHandler [WEAK]
  151. EXPORT I2C_IRQHandler [WEAK]
  152. EXPORT TIMER16_0_IRQHandler [WEAK]
  153. EXPORT TIMER16_1_IRQHandler [WEAK]
  154. EXPORT TIMER32_0_IRQHandler [WEAK]
  155. EXPORT TIMER32_1_IRQHandler [WEAK]
  156. EXPORT SSP0_IRQHandler [WEAK]
  157. EXPORT UART_IRQHandler [WEAK]
  158. EXPORT USB_IRQHandler [WEAK]
  159. EXPORT USB_FIQHandler [WEAK]
  160. EXPORT ADC_IRQHandler [WEAK]
  161. EXPORT WDT_IRQHandler [WEAK]
  162. EXPORT BOD_IRQHandler [WEAK]
  163. EXPORT FMC_IRQHandler [WEAK]
  164. EXPORT PIOINT3_IRQHandler [WEAK]
  165. EXPORT PIOINT2_IRQHandler [WEAK]
  166. EXPORT PIOINT1_IRQHandler [WEAK]
  167. EXPORT PIOINT0_IRQHandler [WEAK]
  168. WAKEUP_IRQHandler
  169. CAN_IRQHandler
  170. SSP1_IRQHandler
  171. I2C_IRQHandler
  172. TIMER16_0_IRQHandler
  173. TIMER16_1_IRQHandler
  174. TIMER32_0_IRQHandler
  175. TIMER32_1_IRQHandler
  176. SSP0_IRQHandler
  177. UART_IRQHandler
  178. USB_IRQHandler
  179. USB_FIQHandler
  180. ADC_IRQHandler
  181. WDT_IRQHandler
  182. BOD_IRQHandler
  183. FMC_IRQHandler
  184. PIOINT3_IRQHandler
  185. PIOINT2_IRQHandler
  186. PIOINT1_IRQHandler
  187. PIOINT0_IRQHandler
  188. B .
  189. ENDP
  190. ALIGN
  191. ; User Initial Stack & Heap
  192. IF :DEF:__MICROLIB
  193. EXPORT __initial_sp
  194. EXPORT __heap_base
  195. EXPORT __heap_limit
  196. ELSE
  197. IMPORT __use_two_region_memory
  198. EXPORT __user_initial_stackheap
  199. __user_initial_stackheap
  200. LDR R0, = Heap_Mem
  201. LDR R1, =(Stack_Mem + Stack_Size)
  202. LDR R2, = (Heap_Mem + Heap_Size)
  203. LDR R3, = Stack_Mem
  204. BX LR
  205. ALIGN
  206. ENDIF
  207. END