context_rvds.S 4.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173
  1. ;/*
  2. ; * File : context_rvds.S
  3. ; * This file is part of RT-Thread RTOS
  4. ; * COPYRIGHT (C) 2009, RT-Thread Development Team
  5. ; *
  6. ; * The license and distribution terms for this file may be
  7. ; * found in the file LICENSE in this distribution or at
  8. ; * http://www.rt-thread.org/license/LICENSE
  9. ; *
  10. ; * Change Logs:
  11. ; * Date Author Notes
  12. ; * 2009-01-17 Bernard first version
  13. ; * 2010-02-04 Magicoe Edit for LPC17xx Series
  14. ; */
  15. ;/**
  16. ; * @addtogroup LPC17
  17. ; */
  18. ;/*@{*/
  19. NVIC_INT_CTRL EQU 0xE000ED04 ; interrupt control state register
  20. NVIC_SYSPRI2 EQU 0xE000ED20 ; system priority register (2)
  21. NVIC_PENDSV_PRI EQU 0x00FF0000 ; PendSV priority value (lowest)
  22. NVIC_PENDSVSET EQU 0x10000000 ; value to trigger PendSV exception
  23. AREA |.text|, CODE, READONLY, ALIGN=2
  24. THUMB
  25. REQUIRE8
  26. PRESERVE8
  27. IMPORT rt_thread_switch_interrput_flag
  28. IMPORT rt_interrupt_from_thread
  29. IMPORT rt_interrupt_to_thread
  30. ;/*
  31. ; * rt_base_t rt_hw_interrupt_disable();
  32. ; */
  33. rt_hw_interrupt_disable PROC
  34. EXPORT rt_hw_interrupt_disable
  35. MRS r0, PRIMASK
  36. CPSID I
  37. BX LR
  38. ENDP
  39. ;/*
  40. ; * void rt_hw_interrupt_enable(rt_base_t level);
  41. ; */
  42. rt_hw_interrupt_enable PROC
  43. EXPORT rt_hw_interrupt_enable
  44. MSR PRIMASK, r0
  45. BX LR
  46. ENDP
  47. ;/*
  48. ; * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
  49. ; * r0 --> from
  50. ; * r1 --> to
  51. ; */
  52. rt_hw_context_switch_interrupt
  53. EXPORT rt_hw_context_switch_interrupt
  54. rt_hw_context_switch PROC
  55. EXPORT rt_hw_context_switch
  56. ; set rt_thread_switch_interrput_flag to 1
  57. LDR r2, =rt_thread_switch_interrput_flag
  58. LDR r3, [r2]
  59. CMP r3, #1
  60. BEQ _reswitch
  61. MOV r3, #1
  62. STR r3, [r2]
  63. LDR r2, =rt_interrupt_from_thread ; set rt_interrupt_from_thread
  64. STR r0, [r2]
  65. _reswitch
  66. LDR r2, =rt_interrupt_to_thread ; set rt_interrupt_to_thread
  67. STR r1, [r2]
  68. LDR r0, =NVIC_INT_CTRL ; trigger the PendSV exception (causes context switch)
  69. LDR r1, =NVIC_PENDSVSET
  70. STR r1, [r0]
  71. BX LR
  72. ENDP
  73. ; r0 --> swith from thread stack
  74. ; r1 --> swith to thread stack
  75. ; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack
  76. rt_hw_pend_sv PROC
  77. EXPORT rt_hw_pend_sv
  78. ; disable interrupt to protect context switch
  79. MRS r2, PRIMASK
  80. CPSID I
  81. ; get rt_thread_switch_interrupt_flag
  82. LDR r0, =rt_thread_switch_interrput_flag
  83. LDR r1, [r0]
  84. CBZ r1, pendsv_exit ; pendsv already handled
  85. ; clear rt_thread_switch_interrput_flag to 0
  86. MOV r1, #0x00
  87. STR r1, [r0]
  88. LDR r0, =rt_interrupt_from_thread
  89. LDR r1, [r0]
  90. CBZ r1, swtich_to_thread ; skip register save at the first time
  91. MRS r1, psp ; get from thread stack pointer
  92. STMFD r1!, {r4 - r11} ; push r4 - r11 register
  93. LDR r0, [r0]
  94. STR r1, [r0] ; update from thread stack pointer
  95. swtich_to_thread
  96. LDR r1, =rt_interrupt_to_thread
  97. LDR r1, [r1]
  98. LDR r1, [r1] ; load thread stack pointer
  99. LDMFD r1!, {r4 - r11} ; pop r4 - r11 register
  100. MSR psp, r1 ; update stack pointer
  101. pendsv_exit
  102. ; restore interrupt
  103. MSR PRIMASK, r2
  104. ORR lr, lr, #0x04
  105. BX lr
  106. ENDP
  107. ;/*
  108. ; * void rt_hw_context_switch_to(rt_uint32 to);
  109. ; * r0 --> to
  110. ; * this fucntion is used to perform the first thread switch
  111. ; */
  112. rt_hw_context_switch_to PROC
  113. EXPORT rt_hw_context_switch_to
  114. ; set to thread
  115. LDR r1, =rt_interrupt_to_thread
  116. STR r0, [r1]
  117. ; set from thread to 0
  118. LDR r1, =rt_interrupt_from_thread
  119. MOV r0, #0x0
  120. STR r0, [r1]
  121. ; set interrupt flag to 1
  122. LDR r1, =rt_thread_switch_interrput_flag
  123. MOV r0, #1
  124. STR r0, [r1]
  125. ; set the PendSV exception priority
  126. LDR r0, =NVIC_SYSPRI2
  127. LDR r1, =NVIC_PENDSV_PRI
  128. STR r1, [r0]
  129. ; trigger the PendSV exception (causes context switch)
  130. LDR r0, =NVIC_INT_CTRL
  131. LDR r1, =NVIC_PENDSVSET
  132. STR r1, [r0]
  133. ; enable interrupts at processor level
  134. CPSIE I
  135. ; never reach here!
  136. ENDP
  137. ; compatible with old version
  138. rt_hw_interrupt_thread_switch PROC
  139. EXPORT rt_hw_interrupt_thread_switch
  140. BX lr
  141. NOP
  142. ENDP
  143. END