lpc177x_8x_uart.c 38 KB

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  1. /**********************************************************************
  2. * $Id$ lpc177x_8x_uart.c 2011-06-02
  3. *//**
  4. * @file lpc177x_8x_uart.c
  5. * @brief Contains all functions support for UART firmware library
  6. * on LPC177x_8x
  7. * @version 1.0
  8. * @date 02. June. 2011
  9. * @author NXP MCU SW Application Team
  10. *
  11. * Copyright(C) 2011, NXP Semiconductor
  12. * All rights reserved.
  13. *
  14. ***********************************************************************
  15. * Software that is described herein is for illustrative purposes only
  16. * which provides customers with programming information regarding the
  17. * products. This software is supplied "AS IS" without any warranties.
  18. * NXP Semiconductors assumes no responsibility or liability for the
  19. * use of the software, conveys no license or title under any patent,
  20. * copyright, or mask work right to the product. NXP Semiconductors
  21. * reserves the right to make changes in the software without
  22. * notification. NXP Semiconductors also make no representation or
  23. * warranty that such application will be suitable for the specified
  24. * use without further testing or modification.
  25. **********************************************************************/
  26. /* Peripheral group ----------------------------------------------------------- */
  27. /** @addtogroup UART
  28. * @{
  29. */
  30. /* Includes ------------------------------------------------------------------- */
  31. #include "lpc177x_8x_uart.h"
  32. #include "lpc177x_8x_clkpwr.h"
  33. /* Private Functions ---------------------------------------------------------- */
  34. static Status uart_set_divisors(LPC_UART_TypeDef *UARTx, uint32_t baudrate);
  35. /*********************************************************************//**
  36. * @brief Determines best dividers to get a target clock rate
  37. * @param[in] UARTx Pointer to selected UART peripheral, should be:
  38. * - LPC_UART0: UART0 peripheral
  39. * - LPC_UART1: UART1 peripheral
  40. * - LPC_UART2: UART2 peripheral
  41. * - LPC_UART3: UART3 peripheral
  42. * @param[in] baudrate Desired UART baud rate.
  43. * @return Error status, could be:
  44. * - SUCCESS
  45. * - ERROR
  46. **********************************************************************/
  47. static Status uart_set_divisors(LPC_UART_TypeDef *UARTx, uint32_t baudrate)
  48. {
  49. Status errorStatus = ERROR;
  50. uint32_t uClk;
  51. uint32_t d, m, bestd, bestm, tmp;
  52. uint64_t best_divisor, divisor;
  53. uint32_t current_error, best_error;
  54. uint32_t recalcbaud;
  55. /* get UART block clock */
  56. uClk = CLKPWR_GetCLK(CLKPWR_CLKTYPE_PER);
  57. /* In the Uart IP block, baud rate is calculated using FDR and DLL-DLM registers
  58. * The formula is :
  59. * BaudRate= uClk * (mulFracDiv/(mulFracDiv+dividerAddFracDiv) / (16 * (DLL)
  60. * It involves floating point calculations. That's the reason the formulae are adjusted with
  61. * Multiply and divide method.*/
  62. /* The value of mulFracDiv and dividerAddFracDiv should comply to the following expressions:
  63. * 0 < mulFracDiv <= 15, 0 <= dividerAddFracDiv <= 15 */
  64. best_error = 0xFFFFFFFF; /* Worst case */
  65. bestd = 0;
  66. bestm = 0;
  67. best_divisor = 0;
  68. for (m = 1 ; m <= 15 ;m++)
  69. {
  70. for (d = 0 ; d < m ; d++)
  71. {
  72. divisor = ((uint64_t)uClk << 28)*m / (baudrate*(m+d));
  73. current_error = divisor & 0xFFFFFFFF;
  74. tmp = divisor>>32;
  75. /* Adjust error */
  76. if(current_error > ((uint32_t)1<<31))
  77. {
  78. current_error = -current_error;
  79. tmp++;
  80. }
  81. /* Out of range */
  82. if(tmp < 1 || tmp > 65536)
  83. continue;
  84. if( current_error < best_error)
  85. {
  86. best_error = current_error;
  87. best_divisor = tmp;
  88. bestd = d;
  89. bestm = m;
  90. if(best_error == 0)
  91. break;
  92. }
  93. } /* end of inner for loop */
  94. if (best_error == 0)
  95. break;
  96. } /* end of outer for loop */
  97. /* can not find best match */
  98. if(best_divisor == 0)
  99. return ERROR;
  100. recalcbaud = (uClk >> 4) * bestm / (best_divisor * (bestm + bestd));
  101. /* reuse best_error to evaluate baud error*/
  102. if(baudrate > recalcbaud)
  103. best_error = baudrate - recalcbaud;
  104. else
  105. best_error = recalcbaud -baudrate;
  106. best_error = best_error * 100 / baudrate;
  107. if (best_error < UART_ACCEPTED_BAUDRATE_ERROR)
  108. {
  109. if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
  110. {
  111. ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_DLAB_EN;
  112. ((LPC_UART1_TypeDef *)UARTx)->DLM = UART_LOAD_DLM(best_divisor);
  113. ((LPC_UART1_TypeDef *)UARTx)->DLL = UART_LOAD_DLL(best_divisor);
  114. /* Then reset DLAB bit */
  115. ((LPC_UART1_TypeDef *)UARTx)->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
  116. ((LPC_UART1_TypeDef *)UARTx)->FDR = (UART_FDR_MULVAL(bestm)
  117. | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
  118. }
  119. else
  120. {
  121. UARTx->LCR |= UART_LCR_DLAB_EN;
  122. UARTx->DLM = UART_LOAD_DLM(best_divisor);
  123. UARTx->DLL = UART_LOAD_DLL(best_divisor);
  124. /* Then reset DLAB bit */
  125. UARTx->LCR &= (~UART_LCR_DLAB_EN) & UART_LCR_BITMASK;
  126. UARTx->FDR = (UART_FDR_MULVAL(bestm) \
  127. | UART_FDR_DIVADDVAL(bestd)) & UART_FDR_BITMASK;
  128. }
  129. errorStatus = SUCCESS;
  130. }
  131. return errorStatus;
  132. }
  133. /* End of Private Functions ---------------------------------------------------- */
  134. /* Public Functions ----------------------------------------------------------- */
  135. /** @addtogroup UART_Public_Functions
  136. * @{
  137. */
  138. /* UART Init/DeInit functions -------------------------------------------------*/
  139. /********************************************************************//**
  140. * @brief Initializes the UARTx peripheral according to the specified
  141. * parameters in the UART_ConfigStruct.
  142. * @param[in] UARTx UART peripheral selected, should be:
  143. * - LPC_UART0: UART0 peripheral
  144. * - LPC_UART1: UART1 peripheral
  145. * - LPC_UART2: UART2 peripheral
  146. * - LPC_UART3: UART3 peripheral
  147. * - LPC_UART4: UART4 peripheral
  148. * @param[in] UART_ConfigStruct Pointer to a UART_CFG_Type structure
  149. * that contains the configuration information for the
  150. * specified UART peripheral.
  151. * @return None
  152. *********************************************************************/
  153. void UART_Init(LPC_UART_TypeDef *UARTx, UART_CFG_Type *UART_ConfigStruct)
  154. {
  155. uint32_t tmp;
  156. if(UARTx == LPC_UART0)
  157. {
  158. /* Set up clock and power for UART module */
  159. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, ENABLE);
  160. }
  161. if(((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
  162. {
  163. /* Set up clock and power for UART module */
  164. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, ENABLE);
  165. }
  166. if(UARTx == LPC_UART2)
  167. {
  168. /* Set up clock and power for UART module */
  169. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, ENABLE);
  170. }
  171. if(UARTx == LPC_UART3)
  172. {
  173. /* Set up clock and power for UART module */
  174. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, ENABLE);
  175. }
  176. /* FIFOs are empty */
  177. UARTx->FCR = ( UART_FCR_FIFO_EN | UART_FCR_RX_RS | UART_FCR_TX_RS);
  178. // Disable FIFO
  179. UARTx->FCR = 0;
  180. // Dummy reading
  181. while (UARTx->LSR & UART_LSR_RDR)
  182. {
  183. tmp = UARTx->RBR;
  184. }
  185. UARTx->TER = UART_TER_TXEN;
  186. // Wait for current transmit complete
  187. while (!(UARTx->LSR & UART_LSR_THRE));
  188. // Disable Tx
  189. UARTx->TER = 0;
  190. // Disable interrupt
  191. UARTx->IER = 0;
  192. // Set LCR to default state
  193. UARTx->LCR = 0;
  194. // Set ACR to default state
  195. UARTx->ACR = 0;
  196. // Set RS485 control to default state
  197. UARTx->RS485CTRL = 0;
  198. // Set RS485 delay timer to default state
  199. UARTx->RS485DLY = 0;
  200. // Set RS485 addr match to default state
  201. UARTx->ADRMATCH = 0;
  202. // Dummy reading
  203. tmp = UARTx->LSR;
  204. if(((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
  205. {
  206. // Set Modem Control to default state
  207. ((LPC_UART1_TypeDef *)UARTx)->MCR = 0;
  208. //Dummy Reading to Clear Status
  209. tmp = ((LPC_UART1_TypeDef *)UARTx)->MSR;
  210. }
  211. else
  212. {
  213. // Set IrDA to default state for all UART other than UART1
  214. UARTx->ICR = 0;
  215. }
  216. // Set Line Control register ----------------------------
  217. uart_set_divisors(UARTx, (UART_ConfigStruct->Baud_rate));
  218. if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
  219. {
  220. tmp = (((LPC_UART1_TypeDef *)UARTx)->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) \
  221. & UART_LCR_BITMASK;
  222. }
  223. else
  224. {
  225. tmp = (UARTx->LCR & (UART_LCR_DLAB_EN | UART_LCR_BREAK_EN)) & UART_LCR_BITMASK;
  226. }
  227. switch (UART_ConfigStruct->Databits)
  228. {
  229. case UART_DATABIT_5:
  230. tmp |= UART_LCR_WLEN5;
  231. break;
  232. case UART_DATABIT_6:
  233. tmp |= UART_LCR_WLEN6;
  234. break;
  235. case UART_DATABIT_7:
  236. tmp |= UART_LCR_WLEN7;
  237. break;
  238. case UART_DATABIT_8:
  239. default:
  240. tmp |= UART_LCR_WLEN8;
  241. break;
  242. }
  243. if (UART_ConfigStruct->Parity == UART_PARITY_NONE)
  244. {
  245. // Do nothing...
  246. }
  247. else
  248. {
  249. tmp |= UART_LCR_PARITY_EN;
  250. switch (UART_ConfigStruct->Parity)
  251. {
  252. case UART_PARITY_ODD:
  253. tmp |= UART_LCR_PARITY_ODD;
  254. break;
  255. case UART_PARITY_EVEN:
  256. tmp |= UART_LCR_PARITY_EVEN;
  257. break;
  258. case UART_PARITY_SP_1:
  259. tmp |= UART_LCR_PARITY_F_1;
  260. break;
  261. case UART_PARITY_SP_0:
  262. tmp |= UART_LCR_PARITY_F_0;
  263. break;
  264. default:
  265. break;
  266. }
  267. }
  268. switch (UART_ConfigStruct->Stopbits)
  269. {
  270. case UART_STOPBIT_2:
  271. tmp |= UART_LCR_STOPBIT_SEL;
  272. break;
  273. case UART_STOPBIT_1:
  274. default:
  275. // Do no thing
  276. break;
  277. }
  278. // Write back to LCR, configure FIFO and Disable Tx
  279. if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
  280. {
  281. ((LPC_UART1_TypeDef *)UARTx)->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
  282. }
  283. else
  284. {
  285. UARTx->LCR = (uint8_t)(tmp & UART_LCR_BITMASK);
  286. }
  287. }
  288. /*********************************************************************//**
  289. * @brief De-initializes the UARTx peripheral registers to their
  290. * default reset values.
  291. * @param[in] UARTx UART peripheral selected, should be:
  292. * - LPC_UART0: UART0 peripheral
  293. * - LPC_UART1: UART1 peripheral
  294. * - LPC_UART2: UART2 peripheral
  295. * - LPC_UART3: UART3 peripheral
  296. * @return None
  297. **********************************************************************/
  298. void UART_DeInit(LPC_UART_TypeDef* UARTx)
  299. {
  300. UART_TxCmd(UARTx, DISABLE);
  301. if (UARTx == LPC_UART0)
  302. {
  303. /* Set up clock and power for UART module */
  304. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, DISABLE);
  305. }
  306. if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
  307. {
  308. /* Set up clock and power for UART module */
  309. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART1, DISABLE);
  310. }
  311. if (UARTx == LPC_UART2)
  312. {
  313. /* Set up clock and power for UART module */
  314. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART2, DISABLE);
  315. }
  316. if (UARTx == LPC_UART3)
  317. {
  318. /* Set up clock and power for UART module */
  319. CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART3, DISABLE);
  320. }
  321. }
  322. /*****************************************************************************//**
  323. * @brief Fills each UART_InitStruct member with its default value:
  324. * - 9600 bps
  325. * - 8-bit data
  326. * - 1 Stopbit
  327. * - None Parity
  328. * @param[in] UART_InitStruct Pointer to a UART_CFG_Type structure
  329. * which will be initialized.
  330. * @return None
  331. *******************************************************************************/
  332. void UART_ConfigStructInit(UART_CFG_Type *UART_InitStruct)
  333. {
  334. UART_InitStruct->Baud_rate = 9600;
  335. UART_InitStruct->Databits = UART_DATABIT_8;
  336. UART_InitStruct->Parity = UART_PARITY_NONE;
  337. UART_InitStruct->Stopbits = UART_STOPBIT_1;
  338. }
  339. /* UART Send/Recieve functions -------------------------------------------------*/
  340. /*********************************************************************//**
  341. * @brief Transmit a single data through UART peripheral
  342. * @param[in] UARTx UART peripheral selected, should be:
  343. * - LPC_UART0: UART0 peripheral
  344. * - LPC_UART1: UART1 peripheral
  345. * - LPC_UART2: UART2 peripheral
  346. * - LPC_UART3: UART3 peripheral
  347. * @param[in] Data Data to transmit (must be 8-bit long)
  348. * @return None
  349. **********************************************************************/
  350. void UART_SendByte(LPC_UART_TypeDef* UARTx, uint8_t Data)
  351. {
  352. if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
  353. {
  354. ((LPC_UART1_TypeDef *)UARTx)->THR = Data & UART_THR_MASKBIT;
  355. }
  356. else
  357. {
  358. UARTx->THR = Data & UART_THR_MASKBIT;
  359. }
  360. }
  361. /*********************************************************************//**
  362. * @brief Receive a single data from UART peripheral
  363. * @param[in] UARTx UART peripheral selected, should be:
  364. * - LPC_UART0: UART0 peripheral
  365. * - LPC_UART1: UART1 peripheral
  366. * - LPC_UART2: UART2 peripheral
  367. * - LPC_UART3: UART3 peripheral
  368. * @return Data received
  369. **********************************************************************/
  370. uint8_t UART_ReceiveByte(LPC_UART_TypeDef* UARTx)
  371. {
  372. if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
  373. {
  374. return (((LPC_UART1_TypeDef *)UARTx)->RBR & UART_RBR_MASKBIT);
  375. }
  376. else
  377. {
  378. return (UARTx->RBR & UART_RBR_MASKBIT);
  379. }
  380. }
  381. /*********************************************************************//**
  382. * @brief Send a block of data via UART peripheral
  383. * @param[in] UARTx Selected UART peripheral used to send data, should be:
  384. * - LPC_UART0: UART0 peripheral
  385. * - LPC_UART1: UART1 peripheral
  386. * - LPC_UART2: UART2 peripheral
  387. * - LPC_UART3: UART3 peripheral
  388. * @param[in] txbuf Pointer to Transmit buffer
  389. * @param[in] buflen Length of Transmit buffer
  390. * @param[in] flag Flag used in UART transfer, should be
  391. * NONE_BLOCKING or BLOCKING
  392. * @return Number of bytes sent.
  393. *
  394. * Note: when using UART in BLOCKING mode, a time-out condition is used
  395. * via defined symbol UART_BLOCKING_TIMEOUT.
  396. **********************************************************************/
  397. uint32_t UART_Send(LPC_UART_TypeDef *UARTx, uint8_t *txbuf,
  398. uint32_t buflen, TRANSFER_BLOCK_Type flag)
  399. {
  400. uint32_t bToSend, bSent, timeOut, fifo_cnt;
  401. uint8_t *pChar = txbuf;
  402. bToSend = buflen;
  403. // blocking mode
  404. if (flag == BLOCKING)
  405. {
  406. bSent = 0;
  407. while (bToSend)
  408. {
  409. timeOut = UART_BLOCKING_TIMEOUT;
  410. // Wait for THR empty with timeout
  411. while (!(UARTx->LSR & UART_LSR_THRE))
  412. {
  413. if (timeOut == 0)
  414. break;
  415. timeOut--;
  416. }
  417. // Time out!
  418. if(timeOut == 0)
  419. break;
  420. fifo_cnt = UART_TX_FIFO_SIZE;
  421. while (fifo_cnt && bToSend)
  422. {
  423. UART_SendByte(UARTx, (*pChar++));
  424. fifo_cnt--;
  425. bToSend--;
  426. bSent++;
  427. }
  428. }
  429. }
  430. // None blocking mode
  431. else
  432. {
  433. bSent = 0;
  434. while (bToSend)
  435. {
  436. if (bToSend == 0)
  437. break;
  438. if (!(UARTx->LSR & UART_LSR_THRE))
  439. {
  440. break;
  441. }
  442. fifo_cnt = UART_TX_FIFO_SIZE;
  443. while (fifo_cnt && bToSend)
  444. {
  445. UART_SendByte(UARTx, (*pChar++));
  446. bToSend--;
  447. fifo_cnt--;
  448. bSent++;
  449. }
  450. }
  451. }
  452. return bSent;
  453. }
  454. /*********************************************************************//**
  455. * @brief Receive a block of data via UART peripheral
  456. * @param[in] UARTx Selected UART peripheral used to send data,
  457. * should be:
  458. * - LPC_UART0: UART0 peripheral
  459. * - LPC_UART1: UART1 peripheral
  460. * - LPC_UART2: UART2 peripheral
  461. * - LPC_UART3: UART3 peripheral
  462. * @param[out] rxbuf Pointer to Received buffer
  463. * @param[in] buflen Length of Received buffer
  464. * @param[in] flag Flag mode, should be NONE_BLOCKING or BLOCKING
  465. * @return Number of bytes received
  466. *
  467. * Note: when using UART in BLOCKING mode, a time-out condition is used
  468. * via defined symbol UART_BLOCKING_TIMEOUT.
  469. **********************************************************************/
  470. uint32_t UART_Receive(LPC_UART_TypeDef *UARTx, uint8_t *rxbuf,
  471. uint32_t buflen, TRANSFER_BLOCK_Type flag)
  472. {
  473. uint32_t bToRecv, bRecv, timeOut;
  474. uint8_t *pChar = rxbuf;
  475. bToRecv = buflen;
  476. // Blocking mode
  477. if (flag == BLOCKING)
  478. {
  479. bRecv = 0;
  480. while (bToRecv)
  481. {
  482. timeOut = UART_BLOCKING_TIMEOUT;
  483. while (!(UARTx->LSR & UART_LSR_RDR))
  484. {
  485. if (timeOut == 0)
  486. break;
  487. timeOut--;
  488. }
  489. // Time out!
  490. if(timeOut == 0)
  491. break;
  492. // Get data from the buffer
  493. (*pChar++) = UART_ReceiveByte(UARTx);
  494. bToRecv--;
  495. bRecv++;
  496. }
  497. }
  498. // None blocking mode
  499. else
  500. {
  501. bRecv = 0;
  502. while (bToRecv)
  503. {
  504. if (!(UARTx->LSR & UART_LSR_RDR))
  505. {
  506. break;
  507. }
  508. else
  509. {
  510. (*pChar++) = UART_ReceiveByte(UARTx);
  511. bRecv++;
  512. bToRecv--;
  513. }
  514. }
  515. }
  516. return bRecv;
  517. }
  518. /*********************************************************************//**
  519. * @brief Force BREAK character on UART line, output pin UARTx TXD is
  520. forced to logic 0.
  521. * @param[in] UARTx UART peripheral selected, should be:
  522. * - LPC_UART0: UART0 peripheral
  523. * - LPC_UART1: UART1 peripheral
  524. * - LPC_UART2: UART2 peripheral
  525. * - LPC_UART3: UART3 peripheral
  526. * @return None
  527. **********************************************************************/
  528. void UART_ForceBreak(LPC_UART_TypeDef* UARTx)
  529. {
  530. if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
  531. {
  532. ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_BREAK_EN;
  533. }
  534. else
  535. {
  536. UARTx->LCR |= UART_LCR_BREAK_EN;
  537. }
  538. }
  539. /********************************************************************//**
  540. * @brief Enable or disable specified UART interrupt.
  541. * @param[in] UARTx UART peripheral selected, should be
  542. * - LPC_UART0: UART0 peripheral
  543. * - LPC_UART1: UART1 peripheral
  544. * - LPC_UART2: UART2 peripheral
  545. * - LPC_UART3: UART3 peripheral
  546. * @param[in] UARTIntCfg Specifies the interrupt flag,
  547. * should be one of the following:
  548. - UART_INTCFG_RBR : RBR Interrupt enable
  549. - UART_INTCFG_THRE : THR Interrupt enable
  550. - UART_INTCFG_RLS : RX line status interrupt enable
  551. - UART1_INTCFG_MS : Modem status interrupt enable (UART1 only)
  552. - UART1_INTCFG_CTS : CTS1 signal transition interrupt enable (UART1 only)
  553. - UART_INTCFG_ABEO : Enables the end of auto-baud interrupt
  554. - UART_INTCFG_ABTO : Enables the auto-baud time-out interrupt
  555. * @param[in] NewState New state of specified UART interrupt type,
  556. * should be:
  557. * - ENALBE: Enable this UART interrupt type.
  558. * - DISALBE: Disable this UART interrupt type.
  559. * @return None
  560. *********************************************************************/
  561. void UART_IntConfig(LPC_UART_TypeDef *UARTx, UART_INT_Type UARTIntCfg, FunctionalState NewState)
  562. {
  563. uint32_t tmp;
  564. switch(UARTIntCfg)
  565. {
  566. case UART_INTCFG_RBR:
  567. tmp = UART_IER_RBRINT_EN;
  568. break;
  569. case UART_INTCFG_THRE:
  570. tmp = UART_IER_THREINT_EN;
  571. break;
  572. case UART_INTCFG_RLS:
  573. tmp = UART_IER_RLSINT_EN;
  574. break;
  575. case UART1_INTCFG_MS:
  576. tmp = UART1_IER_MSINT_EN;
  577. break;
  578. case UART1_INTCFG_CTS:
  579. tmp = UART1_IER_CTSINT_EN;
  580. break;
  581. case UART_INTCFG_ABEO:
  582. tmp = UART_IER_ABEOINT_EN;
  583. break;
  584. case UART_INTCFG_ABTO:
  585. tmp = UART_IER_ABTOINT_EN;
  586. break;
  587. }
  588. if (NewState == ENABLE)
  589. {
  590. if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1)
  591. {
  592. ((LPC_UART1_TypeDef *)UARTx)->IER |= tmp;
  593. }
  594. else
  595. {
  596. UARTx->IER |= tmp;
  597. }
  598. }
  599. else
  600. {
  601. if ((LPC_UART1_TypeDef *) UARTx == LPC_UART1)
  602. {
  603. ((LPC_UART1_TypeDef *)UARTx)->IER &= (~tmp) & UART1_IER_BITMASK;
  604. }
  605. else
  606. {
  607. UARTx->IER &= (~tmp) & UART_IER_BITMASK;
  608. }
  609. }
  610. }
  611. /********************************************************************//**
  612. * @brief Get current value of Line Status register in UART peripheral.
  613. * @param[in] UARTx UART peripheral selected, should be:
  614. * - LPC_UART0: UART0 peripheral
  615. * - LPC_UART1: UART1 peripheral
  616. * - LPC_UART2: UART2 peripheral
  617. * - LPC_UART3: UART3 peripheral
  618. * @return Current value of Line Status register in UART peripheral.
  619. * Note: The return value of this function must be ANDed with each member in
  620. * UART_LS_Type enumeration to determine current flag status
  621. * corresponding to each Line status type. Because some flags in
  622. * Line Status register will be cleared after reading, the next reading
  623. * Line Status register could not be correct. So this function used to
  624. * read Line status register in one time only, then the return value
  625. * used to check all flags.
  626. *********************************************************************/
  627. uint8_t UART_GetLineStatus(LPC_UART_TypeDef* UARTx)
  628. {
  629. if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
  630. {
  631. return ((((LPC_UART1_TypeDef *)LPC_UART1)->LSR) & UART_LSR_BITMASK);
  632. }
  633. else
  634. {
  635. return ((UARTx->LSR) & UART_LSR_BITMASK);
  636. }
  637. }
  638. /********************************************************************//**
  639. * @brief Get Interrupt Identification value
  640. * @param[in] UARTx UART peripheral selected, should be:
  641. * - LPC_UART0: UART0 peripheral
  642. * - LPC_UART1: UART1 peripheral
  643. * - LPC_UART2: UART2 peripheral
  644. * - LPC_UART3: UART3 peripheral
  645. * @return Current value of UART UIIR register in UART peripheral.
  646. *********************************************************************/
  647. uint32_t UART_GetIntId(LPC_UART_TypeDef* UARTx)
  648. {
  649. return (UARTx->IIR & 0x03CF);
  650. }
  651. /*********************************************************************//**
  652. * @brief Check whether if UART is busy or not
  653. * @param[in] UARTx UART peripheral selected, should be:
  654. * - LPC_UART0: UART0 peripheral
  655. * - LPC_UART1: UART1 peripheral
  656. * - LPC_UART2: UART2 peripheral
  657. * - LPC_UART3: UART3 peripheral
  658. * @return RESET if UART is not busy, otherwise return SET.
  659. **********************************************************************/
  660. FlagStatus UART_CheckBusy(LPC_UART_TypeDef *UARTx)
  661. {
  662. if (UARTx->LSR & UART_LSR_TEMT)
  663. {
  664. return RESET;
  665. }
  666. else
  667. {
  668. return SET;
  669. }
  670. }
  671. /*********************************************************************//**
  672. * @brief Configure FIFO function on selected UART peripheral
  673. * @param[in] UARTx UART peripheral selected, should be:
  674. * - LPC_UART0: UART0 peripheral
  675. * - LPC_UART1: UART1 peripheral
  676. * - LPC_UART2: UART2 peripheral
  677. * - LPC_UART3: UART3 peripheral
  678. * @param[in] FIFOCfg Pointer to a UART_FIFO_CFG_Type Structure that
  679. * contains specified information about FIFO configuration
  680. * @return none
  681. **********************************************************************/
  682. void UART_FIFOConfig(LPC_UART_TypeDef *UARTx, UART_FIFO_CFG_Type *FIFOCfg)
  683. {
  684. uint8_t tmp = 0;
  685. tmp |= UART_FCR_FIFO_EN;
  686. switch (FIFOCfg->FIFO_Level)
  687. {
  688. case UART_FIFO_TRGLEV0:
  689. tmp |= UART_FCR_TRG_LEV0;
  690. break;
  691. case UART_FIFO_TRGLEV1:
  692. tmp |= UART_FCR_TRG_LEV1;
  693. break;
  694. case UART_FIFO_TRGLEV2:
  695. tmp |= UART_FCR_TRG_LEV2;
  696. break;
  697. case UART_FIFO_TRGLEV3:
  698. default:
  699. tmp |= UART_FCR_TRG_LEV3;
  700. break;
  701. }
  702. if (FIFOCfg->FIFO_ResetTxBuf == ENABLE)
  703. {
  704. tmp |= UART_FCR_TX_RS;
  705. }
  706. if (FIFOCfg->FIFO_ResetRxBuf == ENABLE)
  707. {
  708. tmp |= UART_FCR_RX_RS;
  709. }
  710. if (FIFOCfg->FIFO_DMAMode == ENABLE)
  711. {
  712. tmp |= UART_FCR_DMAMODE_SEL;
  713. }
  714. //write to FIFO control register
  715. if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
  716. {
  717. ((LPC_UART1_TypeDef *)UARTx)->FCR = tmp & UART_FCR_BITMASK;
  718. }
  719. else
  720. {
  721. UARTx->FCR = tmp & UART_FCR_BITMASK;
  722. }
  723. }
  724. /*****************************************************************************//**
  725. * @brief Fills each UART_FIFOInitStruct member with its default value:
  726. * - FIFO_DMAMode = DISABLE
  727. * - FIFO_Level = UART_FIFO_TRGLEV0
  728. * - FIFO_ResetRxBuf = ENABLE
  729. * - FIFO_ResetTxBuf = ENABLE
  730. * - FIFO_State = ENABLE
  731. * @param[in] UART_FIFOInitStruct Pointer to a UART_FIFO_CFG_Type structure
  732. * which will be initialized.
  733. * @return None
  734. *******************************************************************************/
  735. void UART_FIFOConfigStructInit(UART_FIFO_CFG_Type *UART_FIFOInitStruct)
  736. {
  737. UART_FIFOInitStruct->FIFO_DMAMode = DISABLE;
  738. UART_FIFOInitStruct->FIFO_Level = UART_FIFO_TRGLEV0;
  739. UART_FIFOInitStruct->FIFO_ResetRxBuf = ENABLE;
  740. UART_FIFOInitStruct->FIFO_ResetTxBuf = ENABLE;
  741. }
  742. /*********************************************************************//**
  743. * @brief Start/Stop Auto Baudrate activity
  744. * @param[in] UARTx UART peripheral selected, should be
  745. * - LPC_UART0: UART0 peripheral
  746. * - LPC_UART1: UART1 peripheral
  747. * - LPC_UART2: UART2 peripheral
  748. * - LPC_UART3: UART3 peripheral
  749. * @param[in] ABConfigStruct A pointer to UART_AB_CFG_Type structure that
  750. * contains specified information about UART
  751. * auto baudrate configuration
  752. * @param[in] NewState New State of Auto baudrate activity, should be:
  753. * - ENABLE: Start this activity
  754. * - DISABLE: Stop this activity
  755. * Note: Auto-baudrate mode enable bit will be cleared once this mode
  756. * completed.
  757. * @return none
  758. **********************************************************************/
  759. void UART_ABCmd(LPC_UART_TypeDef *UARTx, UART_AB_CFG_Type *ABConfigStruct,
  760. FunctionalState NewState)
  761. {
  762. uint32_t tmp;
  763. tmp = 0;
  764. if (NewState == ENABLE)
  765. {
  766. if (ABConfigStruct->ABMode == UART_AUTOBAUD_MODE1)
  767. {
  768. tmp |= UART_ACR_MODE;
  769. }
  770. if (ABConfigStruct->AutoRestart == ENABLE)
  771. {
  772. tmp |= UART_ACR_AUTO_RESTART;
  773. }
  774. }
  775. if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
  776. {
  777. if (NewState == ENABLE)
  778. {
  779. // Clear DLL and DLM value
  780. ((LPC_UART1_TypeDef *)UARTx)->LCR |= UART_LCR_DLAB_EN;
  781. ((LPC_UART1_TypeDef *)UARTx)->DLL = 0;
  782. ((LPC_UART1_TypeDef *)UARTx)->DLM = 0;
  783. ((LPC_UART1_TypeDef *)UARTx)->LCR &= ~UART_LCR_DLAB_EN;
  784. // FDR value must be reset to default value
  785. ((LPC_UART1_TypeDef *)UARTx)->FDR = 0x10;
  786. ((LPC_UART1_TypeDef *)UARTx)->ACR = UART_ACR_START | tmp;
  787. }
  788. else
  789. {
  790. ((LPC_UART1_TypeDef *)UARTx)->ACR = 0;
  791. }
  792. }
  793. else
  794. {
  795. if (NewState == ENABLE)
  796. {
  797. // Clear DLL and DLM value
  798. UARTx->LCR |= UART_LCR_DLAB_EN;
  799. UARTx->DLL = 0;
  800. UARTx->DLM = 0;
  801. UARTx->LCR &= ~UART_LCR_DLAB_EN;
  802. // FDR value must be reset to default value
  803. UARTx->FDR = 0x10;
  804. UARTx->ACR = UART_ACR_START | tmp;
  805. }
  806. else
  807. {
  808. UARTx->ACR = 0;
  809. }
  810. }
  811. }
  812. /*********************************************************************//**
  813. * @brief Clear Autobaud Interrupt Pending
  814. * @param[in] UARTx UART peripheral selected, should be
  815. * - LPC_UART0: UART0 peripheral
  816. * - LPC_UART1: UART1 peripheral
  817. * - LPC_UART2: UART2 peripheral
  818. * - LPC_UART3: UART3 peripheral
  819. * @param[in] ABIntType type of auto-baud interrupt, should be:
  820. * - UART_AUTOBAUD_INTSTAT_ABEO: End of Auto-baud interrupt
  821. * - UART_AUTOBAUD_INTSTAT_ABTO: Auto-baud time out interrupt
  822. * @return none
  823. **********************************************************************/
  824. void UART_ABClearIntPending(LPC_UART_TypeDef *UARTx, UART_ABEO_Type ABIntType)
  825. {
  826. if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
  827. {
  828. UARTx->ACR |= ABIntType;
  829. }
  830. else
  831. UARTx->ACR |= ABIntType;
  832. }
  833. /*********************************************************************//**
  834. * @brief Enable/Disable transmission on UART TxD pin
  835. * @param[in] UARTx UART peripheral selected, should be:
  836. * - LPC_UART0: UART0 peripheral
  837. * - LPC_UART1: UART1 peripheral
  838. * - LPC_UART2: UART2 peripheral
  839. * - LPC_UART3: UART3 peripheral
  840. * @param[in] NewState New State of Tx transmission function, should be:
  841. * - ENABLE: Enable this function
  842. - DISABLE: Disable this function
  843. * @return none
  844. **********************************************************************/
  845. void UART_TxCmd(LPC_UART_TypeDef *UARTx, FunctionalState NewState)
  846. {
  847. if (NewState == ENABLE)
  848. {
  849. if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
  850. {
  851. ((LPC_UART1_TypeDef *)UARTx)->TER |= UART_TER_TXEN;
  852. }
  853. else
  854. {
  855. UARTx->TER |= UART_TER_TXEN;
  856. }
  857. }
  858. else
  859. {
  860. if (((LPC_UART1_TypeDef *)UARTx) == LPC_UART1)
  861. {
  862. ((LPC_UART1_TypeDef *)UARTx)->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK;
  863. }
  864. else
  865. {
  866. UARTx->TER &= (~UART_TER_TXEN) & UART_TER_BITMASK;
  867. }
  868. }
  869. }
  870. /* UART IrDA functions ---------------------------------------------------*/
  871. /*********************************************************************//**
  872. * @brief Enable or disable inverting serial input function of IrDA
  873. * on UART peripheral.
  874. * @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
  875. * @param[in] NewState New state of inverting serial input, should be:
  876. * - ENABLE: Enable this function.
  877. * - DISABLE: Disable this function.
  878. * @return none
  879. **********************************************************************/
  880. void UART_IrDAInvtInputCmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState)
  881. {
  882. if (NewState == ENABLE)
  883. {
  884. UARTx->ICR |= UART_ICR_IRDAINV;
  885. }
  886. else if (NewState == DISABLE)
  887. {
  888. UARTx->ICR &= (~UART_ICR_IRDAINV) & UART_ICR_BITMASK;
  889. }
  890. }
  891. /*********************************************************************//**
  892. * @brief Enable or disable IrDA function on UART peripheral.
  893. * @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
  894. * @param[in] NewState New state of IrDA function, should be:
  895. * - ENABLE: Enable this function.
  896. * - DISABLE: Disable this function.
  897. * @return none
  898. **********************************************************************/
  899. void UART_IrDACmd(LPC_UART_TypeDef* UARTx, FunctionalState NewState)
  900. {
  901. if (NewState == ENABLE)
  902. {
  903. UARTx->ICR |= UART_ICR_IRDAEN;
  904. }
  905. else
  906. {
  907. UARTx->ICR &= (~UART_ICR_IRDAEN) & UART_ICR_BITMASK;
  908. }
  909. }
  910. /*********************************************************************//**
  911. * @brief Configure Pulse divider for IrDA function on UART peripheral.
  912. * @param[in] UARTx UART peripheral selected, should be LPC_UART3 (only)
  913. * @param[in] PulseDiv Pulse Divider value from Peripheral clock,
  914. * should be one of the following:
  915. - UART_IrDA_PULSEDIV2 : Pulse width = 2 * Tpclk
  916. - UART_IrDA_PULSEDIV4 : Pulse width = 4 * Tpclk
  917. - UART_IrDA_PULSEDIV8 : Pulse width = 8 * Tpclk
  918. - UART_IrDA_PULSEDIV16 : Pulse width = 16 * Tpclk
  919. - UART_IrDA_PULSEDIV32 : Pulse width = 32 * Tpclk
  920. - UART_IrDA_PULSEDIV64 : Pulse width = 64 * Tpclk
  921. - UART_IrDA_PULSEDIV128 : Pulse width = 128 * Tpclk
  922. - UART_IrDA_PULSEDIV256 : Pulse width = 256 * Tpclk
  923. * @return none
  924. **********************************************************************/
  925. void UART_IrDAPulseDivConfig(LPC_UART_TypeDef *UARTx, UART_IrDA_PULSE_Type PulseDiv)
  926. {
  927. uint32_t tmp, tmp1;
  928. tmp1 = UART_ICR_PULSEDIV(PulseDiv);
  929. tmp = UARTx->ICR & (~ UART_ICR_PULSEDIV(7));
  930. tmp |= tmp1 | UART_ICR_FIXPULSE_EN;
  931. UARTx->ICR = tmp & UART_ICR_BITMASK;
  932. }
  933. /* UART1 FullModem function ---------------------------------------------*/
  934. /*********************************************************************//**
  935. * @brief Force pin DTR/RTS corresponding to given state (Full modem mode)
  936. * @param[in] UARTx LPC_UART1 (only)
  937. * @param[in] Pin Pin that NewState will be applied to, should be:
  938. * - UART1_MODEM_PIN_DTR: DTR pin.
  939. * - UART1_MODEM_PIN_RTS: RTS pin.
  940. * @param[in] NewState New State of DTR/RTS pin, should be:
  941. * - INACTIVE: Force the pin to inactive signal.
  942. - ACTIVE: Force the pin to active signal.
  943. * @return none
  944. **********************************************************************/
  945. void UART_FullModemForcePinState(LPC_UART1_TypeDef *UARTx,
  946. UART_MODEM_PIN_Type Pin,
  947. UART1_SignalState NewState)
  948. {
  949. uint8_t tmp = 0;
  950. switch (Pin)
  951. {
  952. case UART1_MODEM_PIN_DTR:
  953. tmp = UART1_MCR_DTR_CTRL;
  954. break;
  955. case UART1_MODEM_PIN_RTS:
  956. tmp = UART1_MCR_RTS_CTRL;
  957. break;
  958. default:
  959. break;
  960. }
  961. if (NewState == ACTIVE)
  962. {
  963. UARTx->MCR |= tmp;
  964. }
  965. else
  966. {
  967. UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK;
  968. }
  969. }
  970. /*********************************************************************//**
  971. * @brief Configure Full Modem mode for UART peripheral
  972. * @param[in] UARTx LPC_UART1 (only)
  973. * @param[in] Mode Full Modem mode, should be:
  974. * - UART1_MODEM_MODE_LOOPBACK: Loop back mode.
  975. * - UART1_MODEM_MODE_AUTO_RTS: Auto-RTS mode.
  976. * - UART1_MODEM_MODE_AUTO_CTS: Auto-CTS mode.
  977. * @param[in] NewState New State of this mode, should be:
  978. * - ENABLE: Enable this mode.
  979. - DISABLE: Disable this mode.
  980. * @return none
  981. **********************************************************************/
  982. void UART_FullModemConfigMode(LPC_UART1_TypeDef *UARTx, UART_MODEM_MODE_Type Mode,
  983. FunctionalState NewState)
  984. {
  985. uint8_t tmp;
  986. switch(Mode)
  987. {
  988. case UART1_MODEM_MODE_LOOPBACK:
  989. tmp = UART1_MCR_LOOPB_EN;
  990. break;
  991. case UART1_MODEM_MODE_AUTO_RTS:
  992. tmp = UART1_MCR_AUTO_RTS_EN;
  993. break;
  994. case UART1_MODEM_MODE_AUTO_CTS:
  995. tmp = UART1_MCR_AUTO_CTS_EN;
  996. break;
  997. default:
  998. break;
  999. }
  1000. if (NewState == ENABLE)
  1001. {
  1002. UARTx->MCR |= tmp;
  1003. }
  1004. else
  1005. {
  1006. UARTx->MCR &= (~tmp) & UART1_MCR_BITMASK;
  1007. }
  1008. }
  1009. /*********************************************************************//**
  1010. * @brief Get current status of modem status register
  1011. * @param[in] UARTx LPC_UART1 (only)
  1012. * @return Current value of modem status register
  1013. * Note: The return value of this function must be ANDed with each member
  1014. * UART_MODEM_STAT_type enumeration to determine current flag status
  1015. * corresponding to each modem flag status. Because some flags in
  1016. * modem status register will be cleared after reading, the next reading
  1017. * modem register could not be correct. So this function used to
  1018. * read modem status register in one time only, then the return value
  1019. * used to check all flags.
  1020. **********************************************************************/
  1021. uint8_t UART_FullModemGetStatus(LPC_UART1_TypeDef *UARTx)
  1022. {
  1023. return ((UARTx->MSR) & UART1_MSR_BITMASK);
  1024. }
  1025. /* UART RS485 functions --------------------------------------------------------------*/
  1026. /*********************************************************************//**
  1027. * @brief Configure UART peripheral in RS485 mode according to the specified
  1028. * parameters in the RS485ConfigStruct.
  1029. * @param[in] UARTx LPC_UART1 (only)
  1030. * @param[in] RS485ConfigStruct Pointer to a UART1_RS485_CTRLCFG_Type structure
  1031. * that contains the configuration information for specified UART
  1032. * in RS485 mode.
  1033. * @return None
  1034. **********************************************************************/
  1035. void UART_RS485Config(LPC_UART_TypeDef *UARTx, UART1_RS485_CTRLCFG_Type *RS485ConfigStruct)
  1036. {
  1037. uint32_t tmp;
  1038. tmp = 0;
  1039. // If Auto Direction Control is enabled - This function is used in Master mode
  1040. if (RS485ConfigStruct->AutoDirCtrl_State == ENABLE)
  1041. {
  1042. tmp |= UART1_RS485CTRL_DCTRL_EN;
  1043. // Set polar
  1044. if (RS485ConfigStruct->DirCtrlPol_Level == SET)
  1045. {
  1046. tmp |= UART1_RS485CTRL_OINV_1;
  1047. }
  1048. // Set pin according to. This condition is only with UART1. The others are used
  1049. // OE pin as default for control the direction of RS485 buffer IC
  1050. if ((RS485ConfigStruct->DirCtrlPin == UART1_RS485_DIRCTRL_DTR)
  1051. && ((LPC_UART1_TypeDef *)UARTx == LPC_UART1))
  1052. {
  1053. tmp |= UART1_RS485CTRL_SEL_DTR;
  1054. }
  1055. // Fill delay time
  1056. UARTx->RS485DLY = RS485ConfigStruct->DelayValue & UART1_RS485DLY_BITMASK;
  1057. }
  1058. // MultiDrop mode is enable
  1059. if (RS485ConfigStruct->NormalMultiDropMode_State == ENABLE)
  1060. {
  1061. tmp |= UART1_RS485CTRL_NMM_EN;
  1062. }
  1063. // Auto Address Detect function
  1064. if (RS485ConfigStruct->AutoAddrDetect_State == ENABLE)
  1065. {
  1066. tmp |= UART1_RS485CTRL_AADEN;
  1067. // Fill Match Address
  1068. UARTx->ADRMATCH = RS485ConfigStruct->MatchAddrValue & UART1_RS485ADRMATCH_BITMASK;
  1069. }
  1070. // Receiver is disable
  1071. if (RS485ConfigStruct->Rx_State == DISABLE)
  1072. {
  1073. tmp |= UART1_RS485CTRL_RX_DIS;
  1074. }
  1075. // write back to RS485 control register
  1076. UARTx->RS485CTRL = tmp & UART1_RS485CTRL_BITMASK;
  1077. // Enable Parity function and leave parity in stick '0' parity as default
  1078. UARTx->LCR |= (UART_LCR_PARITY_F_0 | UART_LCR_PARITY_EN);
  1079. }
  1080. /*********************************************************************//**
  1081. * @brief Enable/Disable receiver in RS485 module in UART1
  1082. * @param[in] UARTx LPC_UART1 (only)
  1083. * @param[in] NewState New State of command, should be:
  1084. * - ENABLE: Enable this function.
  1085. * - DISABLE: Disable this function.
  1086. * @return None
  1087. **********************************************************************/
  1088. void UART_RS485ReceiverCmd(LPC_UART_TypeDef *UARTx, FunctionalState NewState)
  1089. {
  1090. if (NewState == ENABLE)
  1091. {
  1092. UARTx->RS485CTRL &= ~UART1_RS485CTRL_RX_DIS;
  1093. }
  1094. else
  1095. {
  1096. UARTx->RS485CTRL |= UART1_RS485CTRL_RX_DIS;
  1097. }
  1098. }
  1099. /*********************************************************************//**
  1100. * @brief Send data on RS485 bus with specified parity stick value (9-bit mode).
  1101. * @param[in] UARTx LPC_UART1 (only)
  1102. * @param[in] pDatFrm Pointer to data frame.
  1103. * @param[in] size Size of data.
  1104. * @param[in] ParityStick Parity Stick value, should be 0 or 1.
  1105. * @return None
  1106. **********************************************************************/
  1107. uint32_t UART_RS485Send(LPC_UART_TypeDef *UARTx, uint8_t *pDatFrm,
  1108. uint32_t size, uint8_t ParityStick)
  1109. {
  1110. uint8_t tmp, save;
  1111. uint32_t cnt;
  1112. if (ParityStick)
  1113. {
  1114. save = tmp = UARTx->LCR & UART_LCR_BITMASK;
  1115. tmp &= ~(UART_LCR_PARITY_EVEN);
  1116. UARTx->LCR = tmp;
  1117. cnt = UART_Send((LPC_UART_TypeDef *)UARTx, pDatFrm, size, BLOCKING);
  1118. while (!(UARTx->LSR & UART_LSR_TEMT));
  1119. UARTx->LCR = save;
  1120. }
  1121. else
  1122. {
  1123. cnt = UART_Send((LPC_UART_TypeDef *)UARTx, pDatFrm, size, BLOCKING);
  1124. while (!(UARTx->LSR & UART_LSR_TEMT));
  1125. }
  1126. return cnt;
  1127. }
  1128. /*********************************************************************//**
  1129. * @brief Send Slave address frames on RS485 bus.
  1130. * @param[in] UARTx LPC_UART1 (only)
  1131. * @param[in] SlvAddr Slave Address.
  1132. * @return None
  1133. **********************************************************************/
  1134. void UART_RS485SendSlvAddr(LPC_UART_TypeDef *UARTx, uint8_t SlvAddr)
  1135. {
  1136. UART_RS485Send(UARTx, &SlvAddr, 1, 1);
  1137. }
  1138. /*********************************************************************//**
  1139. * @brief Send Data frames on RS485 bus.
  1140. * @param[in] UARTx LPC_UART1 (only)
  1141. * @param[in] pData Pointer to data to be sent.
  1142. * @param[in] size Size of data frame to be sent.
  1143. * @return None
  1144. **********************************************************************/
  1145. uint32_t UART_RS485SendData(LPC_UART_TypeDef *UARTx, uint8_t *pData, uint32_t size)
  1146. {
  1147. return (UART_RS485Send(UARTx, pData, size, 0));
  1148. }
  1149. /**
  1150. * @}
  1151. */
  1152. /**
  1153. * @}
  1154. */
  1155. /* --------------------------------- End Of File ------------------------------ */