board.h 1.2 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2020-01-15 shelton first version
  9. * 2021-02-09 shelton add flash macros
  10. */
  11. #ifndef __BOARD_H__
  12. #define __BOARD_H__
  13. #include <at32f4xx.h>
  14. #include "at32_msp.h"
  15. #ifdef __cplusplus
  16. extern "C" {
  17. #endif
  18. /* Just only support for AT32F40xxG */
  19. #define AT32_FLASH_START_ADRESS ((uint32_t)0x08000000)
  20. #define FLASH_PAGE_SIZE (2 * 1024)
  21. #define AT32_FLASH_SIZE (1024 * 1024)
  22. #define AT32_FLASH_END_ADDRESS ((uint32_t)(AT32_FLASH_START_ADRESS + AT32_FLASH_SIZE))
  23. /* Internal SRAM memory size[Kbytes] <96>, Default: 96*/
  24. #define AT32_SRAM_SIZE 96
  25. #define AT32_SRAM_END (0x20000000 + AT32_SRAM_SIZE * 1024)
  26. #if defined(__CC_ARM) || defined(__CLANG_ARM)
  27. extern int Image$$RW_IRAM1$$ZI$$Limit;
  28. #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
  29. #elif __ICCARM__
  30. #pragma section="CSTACK"
  31. #define HEAP_BEGIN (__segment_end("CSTACK"))
  32. #else
  33. extern int __bss_end;
  34. #define HEAP_BEGIN ((void *)&__bss_end)
  35. #endif
  36. #define HEAP_END AT32_SRAM_END
  37. #ifdef __cplusplus
  38. }
  39. #endif
  40. #endif /* __BOARD_H__ */