flash-interface-example.c 12 KB

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  1. /*
  2. This file is part of UFFS, the Ultra-low-cost Flash File System.
  3. Copyright (C) 2005-2009 Ricky Zheng <ricky_gz_zheng@yahoo.co.nz>
  4. UFFS is free software; you can redistribute it and/or modify it under
  5. the GNU Library General Public License as published by the Free Software
  6. Foundation; either version 2 of the License, or (at your option) any
  7. later version.
  8. UFFS is distributed in the hope that it will be useful, but WITHOUT
  9. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  11. or GNU Library General Public License, as applicable, for more details.
  12. You should have received a copy of the GNU General Public License
  13. and GNU Library General Public License along with UFFS; if not, write
  14. to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
  15. Boston, MA 02110-1301, USA.
  16. As a special exception, if other files instantiate templates or use
  17. macros or inline functions from this file, or you compile this file
  18. and link it with other works to produce a work based on this file,
  19. this file does not by itself cause the resulting work to be covered
  20. by the GNU General Public License. However the source code for this
  21. file must still be made available in accordance with section (3) of
  22. the GNU General Public License v2.
  23. This exception does not invalidate any other reasons why a work based
  24. on this file might be covered by the GNU General Public License.
  25. */
  26. /**
  27. * \file flash-interface-example.c
  28. * \brief example for using flash driver and multiple partitions, with static memory allocator.
  29. * \author Ricky Zheng, created at 27 Nov, 2007
  30. */
  31. #include <string.h>
  32. #include "uffs_config.h"
  33. #include "uffs/uffs_os.h"
  34. #include "uffs/uffs_device.h"
  35. #include "uffs/uffs_flash.h"
  36. #include "uffs/uffs_mtb.h"
  37. #include "uffs/uffs_fs.h"
  38. #define PFX "ndrv: "
  39. struct my_nand_chip {
  40. void *IOR_ADDR;
  41. void *IOW_ADDR;
  42. UBOOL inited;
  43. // ...
  44. };
  45. /*
  46. * Standard NAND flash commands
  47. */
  48. #define NAND_CMD_READ0 0
  49. #define NAND_CMD_READ1 1
  50. #define NAND_CMD_RNDOUT 5
  51. #define NAND_CMD_PAGEPROG 0x10
  52. #define NAND_CMD_READOOB 0x50
  53. #define NAND_CMD_ERASE1 0x60
  54. #define NAND_CMD_STATUS 0x70
  55. #define NAND_CMD_STATUS_MULTI 0x71
  56. #define NAND_CMD_SEQIN 0x80
  57. #define NAND_CMD_RNDIN 0x85
  58. #define NAND_CMD_READID 0x90
  59. #define NAND_CMD_ERASE2 0xd0
  60. #define NAND_CMD_RESET 0xff
  61. /* impelent the following functions for your NAND flash */
  62. #define CHIP_SET_CLE(chip) { chip = chip; }
  63. #define CHIP_CLR_CLE(chip) {}
  64. #define CHIP_SET_ALE(chip) {}
  65. #define CHIP_CLR_ALE(chip) {}
  66. #define CHIP_SET_NCS(chip) {}
  67. #define CHIP_CLR_NCS(chip) {}
  68. #define CHIP_BUSY(chip) {}
  69. #define CHIP_READY(chip) {}
  70. #define WRITE_COMMAND(chip, cmd) {}
  71. #define WRITE_DATA_ADDR(chip, block, page, offset) {}
  72. #define WRITE_ERASE_ADDR(chip, block) {}
  73. #define WRITE_DATA(chip, data, len) {}
  74. #define READ_DATA(chip, data, len) {}
  75. #define PARSE_STATUS(v) (UFFS_FLASH_NO_ERR) // parse status to UFFS_FLASH_NO_ERR or UFFS_FLASH_BAD_BLK
  76. #if CONFIG_USE_STATIC_MEMORY_ALLOCATOR == 0
  77. int main()
  78. {
  79. uffs_Perror(UFFS_MSG_NORMAL, "This example need CONFIG_USE_STATIC_MEMORY_ALLOCATOR = 1");
  80. return 0;
  81. }
  82. #else
  83. static int nand_read_page(uffs_Device *dev, u32 block, u32 page, u8 *data, int data_len, u8 *ecc,
  84. u8 *spare, int spare_len)
  85. {
  86. u8 val = 0;
  87. int ret = UFFS_FLASH_NO_ERR;
  88. struct my_nand_chip *chip = (struct my_nand_chip *) dev->attr->_private;
  89. CHIP_CLR_NCS(chip);
  90. if (data && data_len > 0) {
  91. CHIP_SET_CLE(chip);
  92. WRITE_COMMAND(chip, NAND_CMD_READ0);
  93. CHIP_CLR_CLE(chip);
  94. CHIP_SET_ALE(chip);
  95. WRITE_DATA_ADDR(chip, block, page, 0);
  96. CHIP_CLR_ALE(chip);
  97. READ_DATA(chip, data, data_len);
  98. // for now, we return all 0xFF to pass UFFS mount, you should remove this at your driver
  99. memset(data, 0xFF, data_len);
  100. }
  101. if (spare && spare_len > 0) {
  102. CHIP_SET_CLE(chip);
  103. WRITE_COMMAND(chip, NAND_CMD_READOOB);
  104. CHIP_CLR_CLE(chip);
  105. CHIP_SET_ALE(chip);
  106. WRITE_DATA_ADDR(chip, block, page, dev->attr->page_data_size);
  107. CHIP_CLR_ALE(chip);
  108. READ_DATA(chip, spare, spare_len);
  109. // for now, we return all 0xFF to pass UFFS mount, you should remove this at your driver
  110. memset(spare, 0xFF, spare_len);
  111. }
  112. if (data == NULL && spare == NULL) {
  113. // read bad block mark
  114. CHIP_SET_CLE(chip);
  115. WRITE_COMMAND(chip, NAND_CMD_READOOB);
  116. CHIP_CLR_CLE(chip);
  117. CHIP_SET_ALE(chip);
  118. WRITE_DATA_ADDR(chip, block, page, dev->attr->page_data_size + attr->block_status_offs);
  119. CHIP_CLR_ALE(chip);
  120. READ_DATA(chip, &val, 1);
  121. ret = (val == 0xFF ? UFFS_FLASH_NO_ERR : UFFS_FLASH_BAD_BLK);
  122. // for now, we return UFFS_FLASH_NO_ERR to pass UFFS mount, you should remove this at your driver
  123. ret = UFFS_FLASH_NO_ERR;
  124. }
  125. CHIP_SET_NCS(chip);
  126. return ret;
  127. }
  128. static int nand_write_page(uffs_Device *dev, u32 block, u32 page,
  129. const u8 *data, int data_len, const u8 *spare, int spare_len)
  130. {
  131. u8 val = 0;
  132. int ret = UFFS_FLASH_NO_ERR;
  133. UBOOL fall_through = FALSE;
  134. struct my_nand_chip *chip = (struct my_nand_chip *) dev->attr->_private;
  135. CHIP_CLR_NCS(chip);
  136. if (data && data_len > 0) {
  137. CHIP_SET_CLE(chip);
  138. WRITE_COMMAND(chip, NAND_CMD_READ0);
  139. WRITE_COMMAND(chip, NAND_CMD_SEQIN);
  140. CHIP_CLR_CLE(chip);
  141. CHIP_SET_ALE(chip);
  142. WRITE_DATA_ADDR(chip, block, page, 0);
  143. CHIP_CLR_ALE(chip);
  144. CHIP_BUSY(chip);
  145. WRITE_DATA(chip, data, data_len);
  146. if (data_len == dev->attr->page_data_size)
  147. fall_through = U_TRUE;
  148. else {
  149. CHIP_SET_CLE(chip);
  150. WRITE_COMMAND(chip, NAND_CMD_PAGEPROG);
  151. WRITE_COMMAND(chip, NAND_CMD_STATUS);
  152. CHIP_CLR_CLE(chip);
  153. CHIP_READY(chip);
  154. READ_DATA(chip, &val, 1);
  155. ret = PARSE_STATUS(val);
  156. }
  157. }
  158. if (ret != UFFS_FLASH_NO_ERR)
  159. goto ext;
  160. if (spare && spare_len > 0) {
  161. if (!fall_through) {
  162. CHIP_SET_CLE(chip);
  163. WRITE_COMMAND(chip, NAND_CMD_READOOB);
  164. WRITE_COMMAND(chip, NAND_CMD_SEQIN);
  165. CHIP_CLR_CLE(chip);
  166. CHIP_SET_ALE(chip);
  167. WRITE_DATA_ADDR(chip, block, page, dev->attr->page_data_size);
  168. CHIP_CLR_ALE(chip);
  169. CHIP_BUSY(chip);
  170. }
  171. WRITE_DATA(chip, spare, spare_len);
  172. CHIP_SET_CLE(chip);
  173. WRITE_COMMAND(chip, NAND_CMD_PAGEPROG);
  174. WRITE_COMMAND(chip, NAND_CMD_STATUS);
  175. CHIP_CLR_CLE(chip);
  176. CHIP_READY(chip);
  177. READ_DATA(chip, &val, 1);
  178. ret = PARSE_STATUS(val);
  179. }
  180. if (data == NULL && spare == NULL) {
  181. // mark bad block
  182. CHIP_SET_CLE(chip);
  183. WRITE_COMMAND(chip, NAND_CMD_READOOB);
  184. WRITE_COMMAND(chip, NAND_CMD_SEQIN);
  185. CHIP_CLR_CLE(chip);
  186. CHIP_SET_ALE(chip);
  187. WRITE_DATA_ADDR(chip, block, page, dev->attr->page_data_size + attr->block_status_offs);
  188. CHIP_CLR_ALE(chip);
  189. CHIP_BUSY(chip);
  190. val = 0;
  191. WRITE_DATA(chip, &val, 1);
  192. CHIP_SET_CLE(chip);
  193. WRITE_COMMAND(chip, NAND_CMD_PAGEPROG);
  194. WRITE_COMMAND(chip, NAND_CMD_STATUS);
  195. CHIP_CLR_CLE(chip);
  196. CHIP_READY(chip);
  197. READ_DATA(chip, &val, 1);
  198. ret = PARSE_STATUS(val);
  199. }
  200. ext:
  201. CHIP_SET_NCS(chip);
  202. return ret;
  203. }
  204. static int nand_erase_block(uffs_Device *dev, u32 block)
  205. {
  206. u8 val = 0;
  207. struct my_nand_chip *chip = (struct my_nand_chip *) dev->attr->_private;
  208. CHIP_CLR_NCS(chip);
  209. CHIP_SET_CLE(chip);
  210. WRITE_COMMAND(chip, NAND_CMD_ERASE1);
  211. CHIP_CLR_CLE(chip);
  212. CHIP_SET_ALE(chip);
  213. WRITE_ERASE_ADDR(chip, blcok);
  214. CHIP_CLR_ALE(chip);
  215. CHIP_SET_CLE(chip);
  216. WRITE_COMMAND(chip, NAND_CMD_ERASE2);
  217. WRITE_COMMAND(chip, NAND_CMD_STATUS);
  218. CHIP_CLR_CLE(chip);
  219. CHIP_READY(chip);
  220. READ_DATA(chip, &val, 1);
  221. CHIP_SET_NCS(chip);
  222. val = val; // just for eliminating warning
  223. return PARSE_STATUS(val);
  224. }
  225. static int nand_init_flash(uffs_Device *dev)
  226. {
  227. // initialize your hardware here ...
  228. struct my_nand_chip *chip = (struct my_nand_chip *) dev->attr->_private;
  229. if (!chip->inited) {
  230. // setup chip I/O address, setup NAND flash controller ... etc.
  231. // chip->IOR_ADDR = 0xF0000000
  232. // chip->IOW_ADDR = 0xF0000000
  233. chip->inited = U_TRUE;
  234. }
  235. return 0;
  236. }
  237. static int nand_release_flash(uffs_Device *dev)
  238. {
  239. // release your hardware here
  240. struct my_nand_chip *chip = (struct my_nand_chip *) dev->attr->_private;
  241. chip = chip;
  242. return 0;
  243. }
  244. static uffs_FlashOps g_my_nand_ops = {
  245. nand_init_flash, // InitFlash()
  246. nand_release_flash, // ReleaseFlash()
  247. nand_read_page, // ReadPage()
  248. NULL, // ReadPageWithLayout
  249. nand_write_page, // WritePage()
  250. NULL, // WritePageWithLayout
  251. NULL, // IsBadBlock(), let UFFS take care of it.
  252. NULL, // MarkBadBlock(), let UFFS take care of it.
  253. nand_erase_block, // EraseBlock()
  254. };
  255. /////////////////////////////////////////////////////////////////////////////////
  256. // change these parameters to fit your nand flash specification
  257. #define TOTAL_BLOCKS 1024
  258. #define PAGE_DATA_SIZE 512
  259. #define PAGE_SPARE_SIZE 16
  260. #define PAGES_PER_BLOCK 32
  261. #define PAGE_SIZE (PAGE_DATA_SIZE + PAGE_SPARE_SIZE)
  262. #define BLOCK_DATA_SIZE (PAGE_DATA_SIZE * PAGES_PER_BLOCK)
  263. #define NR_PARTITION 2 /* total partitions */
  264. #define PAR_1_BLOCKS 100 /* partition 1 */
  265. #define PAR_2_BLOCKS (TOTAL_BLOCKS - PAR_1_BLOCKS) /* partition 2 */
  266. struct my_nand_chip g_nand_chip = {0};
  267. static struct uffs_StorageAttrSt g_my_flash_storage = {0};
  268. /* define mount table */
  269. static uffs_Device demo_device_1 = {0};
  270. static uffs_Device demo_device_2 = {0};
  271. static uffs_MountTable demo_mount_table[] = {
  272. { &demo_device_1, 0, PAR_1_BLOCKS - 1, "/data/" },
  273. { &demo_device_2, PAR_1_BLOCKS, PAR_1_BLOCKS + PAR_2_BLOCKS - 1, "/" },
  274. { NULL, 0, 0, NULL }
  275. };
  276. /* static alloc the memory for each partition */
  277. static int static_buffer_par1[UFFS_STATIC_BUFF_SIZE(PAGES_PER_BLOCK, PAGE_SIZE, PAR_1_BLOCKS) / sizeof(int)];
  278. static int static_buffer_par2[UFFS_STATIC_BUFF_SIZE(PAGES_PER_BLOCK, PAGE_SIZE, PAR_2_BLOCKS) / sizeof(int)];;
  279. static void init_nand_chip(struct my_nand_chip *chip)
  280. {
  281. // init chip IO address, etc.
  282. }
  283. static void setup_flash_storage(struct uffs_StorageAttrSt *attr)
  284. {
  285. memset(attr, 0, sizeof(struct uffs_StorageAttrSt));
  286. // setup NAND flash attributes.
  287. attr->total_blocks = TOTAL_BLOCKS; /* total blocks */
  288. attr->page_data_size = PAGE_DATA_SIZE; /* page data size */
  289. attr->pages_per_block = PAGES_PER_BLOCK; /* pages per block */
  290. attr->spare_size = PAGE_SPARE_SIZE; /* page spare size */
  291. attr->block_status_offs = 4; /* block status offset is 5th byte in spare */
  292. attr->ecc_opt = UFFS_ECC_SOFT; /* ecc option */
  293. attr->layout_opt = UFFS_LAYOUT_UFFS; /* let UFFS do the spare layout */
  294. }
  295. static URET my_InitDevice(uffs_Device *dev)
  296. {
  297. dev->attr = &g_my_flash_storage; // NAND flash attributes
  298. dev->attr->_private = (void *) &g_nand_chip;// hook nand_chip data structure to attr->_private
  299. dev->ops = &g_my_nand_ops; // NAND driver
  300. init_nand_chip(&g_nand_chip);
  301. return U_SUCC;
  302. }
  303. static URET my_ReleaseDevice(uffs_Device *dev)
  304. {
  305. return U_SUCC;
  306. }
  307. static int my_init_filesystem(void)
  308. {
  309. uffs_MountTable *mtbl = &(demo_mount_table[0]);
  310. /* setup nand storage attributes */
  311. setup_flash_storage(&g_my_flash_storage);
  312. /* setup memory allocator */
  313. uffs_MemSetupStaticAllocator(&demo_device_1.mem, static_buffer_par1, sizeof(static_buffer_par1));
  314. uffs_MemSetupStaticAllocator(&demo_device_2.mem, static_buffer_par2, sizeof(static_buffer_par2));
  315. /* register mount table */
  316. while(mtbl->dev) {
  317. // setup device init/release entry
  318. mtbl->dev->Init = my_InitDevice;
  319. mtbl->dev->Release = my_ReleaseDevice;
  320. uffs_RegisterMountTable(mtbl);
  321. mtbl++;
  322. }
  323. // mount partitions
  324. for (mtbl = &(demo_mount_table[0]); mtbl->mount != NULL; mtbl++) {
  325. uffs_Mount(mtbl->mount);
  326. }
  327. return uffs_InitFileSystemObjects() == U_SUCC ? 0 : -1;
  328. }
  329. static int my_release_filesystem(void)
  330. {
  331. uffs_MountTable *mtb;
  332. int ret = 0;
  333. // unmount parttions
  334. for (mtb = &(demo_mount_table[0]); ret == 0 && mtb->mount != NULL; mtb++) {
  335. ret = uffs_UnMount(mtb->mount);
  336. }
  337. // release objects
  338. if (ret == 0)
  339. ret = (uffs_ReleaseFileSystemObjects() == U_SUCC ? 0 : -1);
  340. return ret;
  341. }
  342. /* application entry */
  343. int main()
  344. {
  345. uffs_SetupDebugOutput(); // setup debug output as early as possible
  346. my_init_filesystem();
  347. // ... my application codes ....
  348. // read/write/create/delete files ...
  349. my_release_filesystem();
  350. return 0;
  351. }
  352. #endif
  353. /////////////////////////////////////////////////////////////////////////////////