drv_spi.c 5.3 KB

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  1. #include <stdio.h>
  2. #include <stdlib.h>
  3. #include <ctype.h>
  4. #include <rtthread.h>
  5. #include <drivers/spi.h>
  6. #include "drv_spi.h"
  7. #ifdef RT_USING_SPI
  8. static void spi_init(uint8_t spre_spr, uint8_t copl, uint8_t cpha)
  9. {
  10. SET_SPI(SPSR, 0xc0 | (spre_spr & 0b00000011));
  11. SET_SPI(PARAM, 0x40);
  12. SET_SPI(PARAM2, 0x01);
  13. SET_SPI(SPER, (spre_spr & 0b00001100) >> 2);
  14. SET_SPI(SPCR, 0x50 | copl << 3 | cpha << 2);
  15. SET_SPI(SOFTCS, 0xff);
  16. }
  17. static void spi_set_csn(uint8_t val)
  18. {
  19. SET_SPI(SOFTCS, val);
  20. }
  21. #ifdef RT_USING_SPI_GPIOCS
  22. #include <drivers/pin.h>
  23. #endif
  24. static void spi_set_cs(unsigned char cs, int new_status)
  25. {
  26. if (cs < 4)
  27. {
  28. unsigned char val = 0;
  29. val = GET_SPI(SOFTCS);
  30. val |= 0x01 << cs ; // csen=1
  31. if (new_status) // cs = 1
  32. {
  33. val |= (0x10 << cs); // csn=1
  34. }
  35. else // cs = 0
  36. {
  37. val &= ~(0x10 << cs); // csn=0
  38. }
  39. SET_SPI(SOFTCS, val);
  40. return ;
  41. }
  42. #ifdef RT_USING_SPI_GPIOCS
  43. else
  44. {
  45. rt_pin_mode(cs, PIN_MODE_OUTPUT); // with RT_USING_SPI_GPIOCS feature enabled, gpio will be used as csn pin.
  46. rt_pin_write(cs, new_status);
  47. }
  48. #endif
  49. }
  50. static uint8_t spi_write_for_response(uint8_t data)
  51. {
  52. uint8_t val;
  53. SET_SPI(TXFIFO, data);
  54. while ((GET_SPI(SPSR))&RFEMPTY); //wait for echo
  55. val = GET_SPI(RXFIFO);
  56. return val;
  57. }
  58. static int cmd_spi_init(int argc, char *argv[])
  59. {
  60. uint8_t spre_spr, cpol, cpha;
  61. switch (argc)
  62. {
  63. case 2:
  64. spre_spr = strtoul(argv[1], NULL, 0);
  65. spi_init(spre_spr, 0, 0);
  66. break;
  67. case 4:
  68. spre_spr = strtoul(argv[1], NULL, 0);
  69. cpol = strtoul(argv[2], NULL, 0);
  70. cpha = strtoul(argv[3], NULL, 0);
  71. spi_init(spre_spr, 0, 0);
  72. break;
  73. default:
  74. printf("\nusage : cmd_spi_init spre_spr <cpol> <cpha>\n(cmd_spi_init 0x4 0x0 0x0)\n0x4:div8 0xb:div4096\n");
  75. break;
  76. }
  77. }
  78. MSH_CMD_EXPORT(cmd_spi_init, cmd_spi_init);
  79. static int cmd_spi_set_csn(int argc, char *argv[])
  80. {
  81. uint8_t val, csn;
  82. switch (argc)
  83. {
  84. case 3:
  85. csn = strtoul(argv[1], NULL, 0);
  86. val = strtoul(argv[2], NULL, 0);
  87. spi_set_cs(csn, val);
  88. break;
  89. default:
  90. printf("usage:cmd_spi_set_csn csn val\n(0xbf for csn1 enable,0xff for csn1 disable)\n");
  91. break;
  92. }
  93. }
  94. MSH_CMD_EXPORT(cmd_spi_set_csn, cmd_spi_set_csn);
  95. static int cmd_spi_write(int argc, char *argv[])
  96. {
  97. uint8_t data, resp;
  98. switch (argc)
  99. {
  100. case 2:
  101. data = strtoul(argv[1], NULL, 0);
  102. resp = spi_write_for_response(data);
  103. printf("resp:%2X\n", resp);
  104. break;
  105. default:
  106. printf("usage:cmd_spi_write data\n");
  107. break;
  108. }
  109. }
  110. MSH_CMD_EXPORT(cmd_spi_write, cmd_spi_write);
  111. static rt_err_t configure(struct rt_spi_device *device, struct rt_spi_configuration *configuration);
  112. static rt_uint32_t xfer(struct rt_spi_device *device, struct rt_spi_message *message);
  113. const static unsigned char SPI_DIV_TABLE[] = {0b0000, 0b0001, 0b0100, 0b0010, 0b0011, 0b0101, 0b0110, 0b0111, 0b1000, 0b1001, 0b1010, 0b1011};
  114. // 2 4 8 16 32 64 128 256 512 1024 2048 4096
  115. static rt_err_t configure(struct rt_spi_device *device,
  116. struct rt_spi_configuration *configuration)
  117. {
  118. unsigned char cpol = 0;
  119. unsigned char cpha = 0;
  120. RT_ASSERT(NULL != device);
  121. RT_ASSERT(NULL != configuration);
  122. // baudrate
  123. if (configuration->mode & RT_SPI_CPOL) // cpol
  124. {
  125. cpol = 1;
  126. }
  127. else
  128. {
  129. cpol = 0;
  130. }
  131. if (configuration->mode & RT_SPI_CPHA) // cpha
  132. {
  133. cpha = 1;
  134. }
  135. else
  136. {
  137. cpha = 0;
  138. }
  139. float spi_max_speed = ((float)APB_MAX_SPEED) / (8.0 / (float)APB_FREQSCALE);
  140. uint64_t div = (uint64_t)(spi_max_speed / (float)configuration->max_hz);
  141. int ctr = 0;
  142. while (div != 1 && ctr < 12)
  143. {
  144. ctr++;
  145. div = div >> 1;
  146. }
  147. spi_init(SPI_DIV_TABLE[ctr], cpol, cpha);
  148. return RT_EOK;
  149. }
  150. static rt_uint32_t xfer(struct rt_spi_device *device,
  151. struct rt_spi_message *message)
  152. {
  153. unsigned char cs = 0;
  154. rt_uint32_t size = 0;
  155. const rt_uint8_t *send_ptr = NULL;
  156. rt_uint8_t *recv_ptr = NULL;
  157. rt_uint8_t data = 0;
  158. RT_ASSERT(NULL != device);
  159. RT_ASSERT(NULL != message);
  160. cs = (unsigned char)(device->parent.user_data);
  161. size = message->length;
  162. if (message->cs_take)
  163. {
  164. spi_set_cs(cs, 0);
  165. }
  166. // send data
  167. send_ptr = message->send_buf;
  168. recv_ptr = message->recv_buf;
  169. while (size--)
  170. {
  171. data = 0xFF;
  172. if (NULL != send_ptr)
  173. {
  174. data = *send_ptr++;
  175. }
  176. if (NULL != recv_ptr)
  177. {
  178. *recv_ptr++ = spi_write_for_response(data);
  179. }
  180. else
  181. {
  182. spi_write_for_response(data);
  183. }
  184. }
  185. // release cs
  186. if (message->cs_release)
  187. {
  188. spi_set_cs(cs, 1);
  189. }
  190. return message->length;
  191. }
  192. static struct rt_spi_ops loongson_spi_ops =
  193. {
  194. .configure = configure,
  195. .xfer = xfer
  196. };
  197. static struct rt_spi_bus loongson_spi;
  198. static int loongson_spi_init()
  199. {
  200. //rt_kprintf("spi_init\n");
  201. return rt_spi_bus_register(&loongson_spi, "spi", &loongson_spi_ops);
  202. }
  203. INIT_BOARD_EXPORT(loongson_spi_init);
  204. #endif