drv_sci.c 26 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2023-09-24 Vandoul first version
  9. * 2023-09-27 Vandoul add sci uart
  10. */
  11. #include "drv_sci.h"
  12. #ifdef BSP_USING_SCI
  13. //#define DRV_DEBUG
  14. #define DBG_TAG "drv.sci"
  15. #ifdef DRV_DEBUG
  16. #define DBG_LVL DBG_LOG
  17. #else
  18. #define DBG_LVL DBG_INFO
  19. #endif /* DRV_DEBUG */
  20. #include <rtdbg.h>
  21. #ifdef R_SCI_B_SPI_H
  22. #define R_SCI_SPI_Write R_SCI_B_SPI_Write
  23. #define R_SCI_SPI_Read R_SCI_B_SPI_Read
  24. #define R_SCI_SPI_WriteRead R_SCI_B_SPI_WriteRead
  25. #define R_SCI_SPI_Open R_SCI_B_SPI_Open
  26. #define R_SCI_SPI_Close R_SCI_B_SPI_Close
  27. #define R_SCI_SPI_CallbackSet R_SCI_B_SPI_CallbackSet
  28. #endif
  29. enum
  30. {
  31. #ifdef BSP_USING_SCI0
  32. RA_SCI_INDEX0,
  33. #endif
  34. #ifdef BSP_USING_SCI1
  35. RA_SCI_INDEX1,
  36. #endif
  37. #ifdef BSP_USING_SCI2
  38. RA_SCI_INDEX2,
  39. #endif
  40. #ifdef BSP_USING_SCI3
  41. RA_SCI_INDEX3,
  42. #endif
  43. #ifdef BSP_USING_SCI4
  44. RA_SCI_INDEX4,
  45. #endif
  46. #ifdef BSP_USING_SCI5
  47. RA_SCI_INDEX5,
  48. #endif
  49. #ifdef BSP_USING_SCI6
  50. RA_SCI_INDEX6,
  51. #endif
  52. #ifdef BSP_USING_SCI7
  53. RA_SCI_INDEX7,
  54. #endif
  55. #ifdef BSP_USING_SCI8
  56. RA_SCI_INDEX8,
  57. #endif
  58. #ifdef BSP_USING_SCI9
  59. RA_SCI_INDEX9,
  60. #endif
  61. RA_SCI_INDEX_MAX,
  62. };
  63. struct ra_sci_param
  64. {
  65. const char bus_name[RT_NAME_MAX];
  66. const void *sci_ctrl;
  67. const void *sci_cfg;
  68. const void *ops;
  69. };
  70. #ifdef RT_USING_I2C
  71. rt_weak const struct rt_i2c_bus_device_ops sci_ops_i2c;
  72. #endif
  73. #ifdef RT_USING_SPI
  74. rt_weak const struct rt_spi_ops sci_ops_spi;
  75. #endif
  76. #ifdef RT_USING_UART
  77. rt_weak const struct rt_uart_ops sci_ops_uart;
  78. #endif
  79. struct ra_sci_object
  80. {
  81. union
  82. {
  83. #ifdef RT_USING_SPI
  84. struct
  85. {
  86. struct rt_spi_bus sbus;
  87. struct rt_spi_configuration *spi_cfg;
  88. };
  89. #endif
  90. #ifdef RT_USING_I2C
  91. struct
  92. {
  93. struct rt_i2c_bus_device ibus;
  94. };
  95. #endif
  96. #ifdef RT_USING_UART
  97. struct
  98. {
  99. struct rt_serial_device ubus;
  100. };
  101. #endif
  102. };
  103. const struct ra_sci_param *param;
  104. struct rt_event event;
  105. };
  106. #ifndef BIT
  107. #define BIT(idx) (1ul << (idx))
  108. #endif
  109. #ifndef BITS
  110. #define BITS(b,e) ((((uint32_t)-1)<<(b))&(((uint32_t)-1)>>(31-(e))))
  111. #endif
  112. #define _TO_STR(_a) #_a
  113. #define CONCAT3STR(_a,_b,_c) _TO_STR(_a##_b##_c)
  114. #define RA_SCI_EVENT_ABORTED BIT(0)
  115. #define RA_SCI_EVENT_RX_COMPLETE BIT(1)
  116. #define RA_SCI_EVENT_TX_COMPLETE BIT(2)
  117. #define RA_SCI_EVENT_ERROR BIT(3)
  118. #define RA_SCI_EVENT_ALL BITS(0,3)
  119. #define RA_SCI_HANDLE_ITEM(idx,type,id) {.bus_name=CONCAT3STR(sci,idx,id),.sci_ctrl=&g_sci##idx##_ctrl,.sci_cfg=&g_sci##idx##_cfg,.ops=&sci_ops_##type}
  120. const static struct ra_sci_param sci_param[] =
  121. {
  122. #ifdef BSP_USING_SCI0
  123. #ifdef BSP_USING_SCI0_SPI
  124. RA_SCI_HANDLE_ITEM(0, spi, s),
  125. #elif defined(BSP_USING_SCI0_I2C)
  126. RA_SCI_HANDLE_ITEM(0, i2c, i),
  127. #elif defined(BSP_USING_SCI0_UART)
  128. RA_SCI_HANDLE_ITEM(0, uart, u),
  129. #endif
  130. #endif
  131. #ifdef BSP_USING_SCI1
  132. #ifdef BSP_USING_SCI1_SPI
  133. RA_SCI_HANDLE_ITEM(1, spi, s),
  134. #elif defined(BSP_USING_SCI1_I2C)
  135. RA_SCI_HANDLE_ITEM(1, i2c, i),
  136. #elif defined(BSP_USING_SCI1_UART)
  137. RA_SCI_HANDLE_ITEM(1, uart, u),
  138. #endif
  139. #endif
  140. #ifdef BSP_USING_SCI2
  141. #ifdef BSP_USING_SCI2_SPI
  142. RA_SCI_HANDLE_ITEM(2, spi, s),
  143. #elif defined(BSP_USING_SCI2_I2C)
  144. RA_SCI_HANDLE_ITEM(2, i2c, i),
  145. #elif defined(BSP_USING_SCI2_UART)
  146. RA_SCI_HANDLE_ITEM(2, uart, u),
  147. #endif
  148. #endif
  149. #ifdef BSP_USING_SCI3
  150. #ifdef BSP_USING_SCI3_SPI
  151. RA_SCI_HANDLE_ITEM(3, spi, s),
  152. #elif defined(BSP_USING_SCI3_I2C)
  153. RA_SCI_HANDLE_ITEM(3, i2c, i),
  154. #elif defined(BSP_USING_SCI3_UART)
  155. RA_SCI_HANDLE_ITEM(3, uart, u),
  156. #endif
  157. #endif
  158. #ifdef BSP_USING_SCI4
  159. #ifdef BSP_USING_SCI4_SPI
  160. RA_SCI_HANDLE_ITEM(4, spi, s),
  161. #elif defined(BSP_USING_SCI4_I2C)
  162. RA_SCI_HANDLE_ITEM(4, i2c, i),
  163. #elif defined(BSP_USING_SCI4_UART)
  164. RA_SCI_HANDLE_ITEM(4, uart, u),
  165. #endif
  166. #endif
  167. #ifdef BSP_USING_SCI5
  168. #ifdef BSP_USING_SCI5_SPI
  169. RA_SCI_HANDLE_ITEM(5, spi, s),
  170. #elif defined(BSP_USING_SCI5_I2C)
  171. RA_SCI_HANDLE_ITEM(5, i2c, i),
  172. #elif defined(BSP_USING_SCI5_UART)
  173. RA_SCI_HANDLE_ITEM(5, uart, u),
  174. #endif
  175. #endif
  176. #ifdef BSP_USING_SCI6
  177. #ifdef BSP_USING_SCI6_SPI
  178. RA_SCI_HANDLE_ITEM(6, spi, s),
  179. #elif defined(BSP_USING_SCI6_I2C)
  180. RA_SCI_HANDLE_ITEM(6, i2c, i),
  181. #elif defined(BSP_USING_SCI6_UART)
  182. RA_SCI_HANDLE_ITEM(6, uart, u),
  183. #endif
  184. #endif
  185. #ifdef BSP_USING_SCI7
  186. #ifdef BSP_USING_SCI7_SPI
  187. RA_SCI_HANDLE_ITEM(7, spi, s),
  188. #elif defined(BSP_USING_SCI7_I2C)
  189. RA_SCI_HANDLE_ITEM(7, i2c, i),
  190. #elif defined(BSP_USING_SCI7_UART)
  191. RA_SCI_HANDLE_ITEM(7, uart, u),
  192. #endif
  193. #endif
  194. #ifdef BSP_USING_SCI8
  195. #ifdef BSP_USING_SCI8_SPI
  196. RA_SCI_HANDLE_ITEM(8, spi, s),
  197. #elif defined(BSP_USING_SCI8_I2C)
  198. RA_SCI_HANDLE_ITEM(8, i2c, i),
  199. #elif defined(BSP_USING_SCI8_UART)
  200. RA_SCI_HANDLE_ITEM(8, uart, u),
  201. #endif
  202. #endif
  203. #ifdef BSP_USING_SCI9
  204. #ifdef BSP_USING_SCI9_SPI
  205. RA_SCI_HANDLE_ITEM(9, spi, s),
  206. #elif defined(BSP_USING_SCI9_I2C)
  207. RA_SCI_HANDLE_ITEM(9, i2c, i),
  208. #elif defined(BSP_USING_SCI9_UART)
  209. RA_SCI_HANDLE_ITEM(9, uart, u),
  210. #endif
  211. #endif
  212. };
  213. static struct ra_sci_object sci_obj[RA_SCI_INDEX_MAX];
  214. rt_used static rt_err_t ra_wait_complete(struct ra_sci_object *obj)
  215. {
  216. rt_uint32_t event = 0;
  217. if (RT_EOK != rt_event_recv(&obj->event, RA_SCI_EVENT_ALL, RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR, (rt_int32_t)rt_tick_from_millisecond(400), &event))
  218. {
  219. return -RT_ETIMEOUT;
  220. }
  221. if ((event & (RA_SCI_EVENT_ABORTED | RA_SCI_EVENT_ERROR)) == 0)
  222. {
  223. return RT_EOK;
  224. }
  225. return -RT_ERROR;
  226. }
  227. /**
  228. * @brief SCI UART
  229. * @defgroup SCI_UART
  230. * @{
  231. */
  232. #ifdef BSP_USING_SCIn_UART
  233. const static int uart_buff_size[][2] =
  234. {
  235. #ifdef BSP_USING_SCI0_UART
  236. {BSP_SCI0_UART_RX_BUFSIZE, BSP_SCI0_UART_TX_BUFSIZE},
  237. #endif
  238. #ifdef BSP_USING_SCI1_UART
  239. {BSP_SCI1_UART_RX_BUFSIZE, BSP_SCI1_UART_TX_BUFSIZE},
  240. #endif
  241. #ifdef BSP_USING_SCI2_UART
  242. {BSP_SCI2_UART_RX_BUFSIZE, BSP_SCI2_UART_TX_BUFSIZE},
  243. #endif
  244. #ifdef BSP_USING_SCI3_UART
  245. {BSP_SCI3_UART_RX_BUFSIZE, BSP_SCI3_UART_TX_BUFSIZE},
  246. #endif
  247. #ifdef BSP_USING_SCI4_UART
  248. {BSP_SCI4_UART_RX_BUFSIZE, BSP_SCI4_UART_TX_BUFSIZE},
  249. #endif
  250. #ifdef BSP_USING_SCI5_UART
  251. {BSP_SCI5_UART_RX_BUFSIZE, BSP_SCI5_UART_TX_BUFSIZE},
  252. #endif
  253. #ifdef BSP_USING_SCI6_UART
  254. {BSP_SCI6_UART_RX_BUFSIZE, BSP_SCI6_UART_TX_BUFSIZE},
  255. #endif
  256. #ifdef BSP_USING_SCI7_UART
  257. {BSP_SCI7_UART_RX_BUFSIZE, BSP_SCI7_UART_TX_BUFSIZE},
  258. #endif
  259. #ifdef BSP_USING_SCI8_UART
  260. {BSP_SCI8_UART_RX_BUFSIZE, BSP_SCI8_UART_TX_BUFSIZE},
  261. #endif
  262. #ifdef BSP_USING_SCI9_UART
  263. {BSP_SCI9_UART_RX_BUFSIZE, BSP_SCI9_UART_TX_BUFSIZE},
  264. #endif
  265. {0, 0},
  266. };
  267. void sci_uart_irq_callback(uart_callback_args_t *p_args)
  268. {
  269. rt_interrupt_enter();
  270. if (NULL != p_args)
  271. {
  272. struct ra_sci_object *obj = (struct ra_sci_object *)p_args->p_context;
  273. RT_ASSERT(obj != RT_NULL);
  274. if (UART_EVENT_RX_CHAR == p_args->event)
  275. {
  276. struct rt_serial_device *serial = &obj->ubus;
  277. struct rt_serial_rx_fifo *rx_fifo;
  278. rx_fifo = (struct rt_serial_rx_fifo *) serial->serial_rx;
  279. RT_ASSERT(rx_fifo != RT_NULL);
  280. rt_ringbuffer_putchar(&(rx_fifo->rb), (rt_uint8_t)p_args->data);
  281. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  282. }
  283. }
  284. rt_interrupt_leave();
  285. }
  286. static rt_err_t ra_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  287. {
  288. struct ra_sci_object *obj;
  289. const struct ra_sci_param *param;
  290. RT_ASSERT(serial != RT_NULL);
  291. RT_ASSERT(cfg != RT_NULL);
  292. fsp_err_t err = FSP_SUCCESS;
  293. obj = rt_container_of(serial, struct ra_sci_object, ubus);
  294. param = obj->param;
  295. RT_ASSERT(param != RT_NULL);
  296. err = R_SCI_UART_Open((uart_ctrl_t *const)param->sci_ctrl, (uart_cfg_t *const)param->sci_cfg);
  297. if (FSP_SUCCESS != err)
  298. {
  299. return -RT_ERROR;
  300. }
  301. err = R_SCI_UART_CallbackSet((uart_ctrl_t *const)param->sci_ctrl, sci_uart_irq_callback, obj, NULL);
  302. if (FSP_SUCCESS != err)
  303. {
  304. //LOG_W("R_SCI_UART_CallbackSet API failed,%d", err);
  305. }
  306. return RT_EOK;
  307. }
  308. static rt_err_t ra_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
  309. {
  310. return RT_EOK;
  311. }
  312. static int ra_uart_putc(struct rt_serial_device *serial, char c)
  313. {
  314. struct ra_sci_object *obj;
  315. const struct ra_sci_param *param;
  316. RT_ASSERT(serial != RT_NULL);
  317. obj = rt_container_of(serial, struct ra_sci_object, ubus);
  318. param = obj->param;
  319. RT_ASSERT(param != RT_NULL);
  320. sci_uart_instance_ctrl_t *p_ctrl = (sci_uart_instance_ctrl_t *)param->sci_ctrl;
  321. p_ctrl->p_reg->TDR = c;
  322. while ((p_ctrl->p_reg->SSR_b.TEND) == 0);
  323. return RT_EOK;
  324. }
  325. static int ra_uart_getc(struct rt_serial_device *serial)
  326. {
  327. return RT_EOK;
  328. }
  329. static rt_ssize_t ra_uart_transmit(struct rt_serial_device *serial,
  330. rt_uint8_t *buf,
  331. rt_size_t size,
  332. rt_uint32_t tx_flag)
  333. {
  334. RT_ASSERT(serial != RT_NULL);
  335. RT_ASSERT(buf != RT_NULL);
  336. return 0;
  337. }
  338. const struct rt_uart_ops sci_ops_uart =
  339. {
  340. .configure = ra_uart_configure,
  341. .control = ra_uart_control,
  342. .putc = ra_uart_putc,
  343. .getc = ra_uart_getc,
  344. .transmit = ra_uart_transmit,
  345. };
  346. #else
  347. void sci_uart_irq_callback(uart_callback_args_t *p_args)
  348. {
  349. }
  350. #endif
  351. /**
  352. * @}
  353. */
  354. /**
  355. * @brief SCI I2C
  356. * @defgroup SCI_I2C
  357. * @{
  358. */
  359. #ifdef BSP_USING_SCIn_I2C
  360. void sci_i2c_irq_callback(i2c_master_callback_args_t *p_args)
  361. {
  362. rt_interrupt_enter();
  363. if (NULL != p_args)
  364. {
  365. /* capture callback event for validating the i2c transfer event*/
  366. struct ra_sci_object *obj = (struct ra_sci_object *)p_args->p_context;
  367. uint32_t event = 0;
  368. RT_ASSERT(obj != RT_NULL);
  369. switch (p_args->event)
  370. {
  371. case I2C_MASTER_EVENT_ABORTED:
  372. event |= RA_SCI_EVENT_ABORTED;
  373. break;
  374. case I2C_MASTER_EVENT_RX_COMPLETE:
  375. event |= RA_SCI_EVENT_RX_COMPLETE;
  376. break;
  377. case I2C_MASTER_EVENT_TX_COMPLETE:
  378. event |= RA_SCI_EVENT_TX_COMPLETE;
  379. break;
  380. }
  381. rt_event_send(&obj->event, event);
  382. LOG_D("event:%x", p_args->event);
  383. }
  384. rt_interrupt_leave();
  385. LOG_D("p_args:%p", p_args);
  386. }
  387. static rt_ssize_t ra_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
  388. struct rt_i2c_msg msgs[],
  389. rt_uint32_t num)
  390. {
  391. rt_size_t i;
  392. RT_ASSERT(bus != RT_NULL);
  393. struct ra_sci_object *obj = rt_container_of(bus, struct ra_sci_object, ibus);
  394. const struct ra_sci_param *param = obj->param;
  395. i2c_master_ctrl_t *master_ctrl = (i2c_master_ctrl_t *)param->sci_ctrl;
  396. int err = FSP_SUCCESS;
  397. bool restart = false;
  398. for (i = 0; i < num; i++)
  399. {
  400. struct rt_i2c_msg *msg = &msgs[i];
  401. if (msg->flags & RT_I2C_NO_STOP)
  402. {
  403. restart = true;
  404. }
  405. else
  406. {
  407. restart = false;
  408. }
  409. if (msg->flags & RT_I2C_ADDR_10BIT)
  410. {
  411. //LOG_E("10Bit not support");
  412. //break;
  413. #ifdef SOC_SERIES_R7FA8M85
  414. R_SCI_B_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_10BIT);
  415. #else
  416. R_SCI_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_10BIT);
  417. #endif
  418. }
  419. else
  420. {
  421. //master_ctrl->slave = msg->addr;
  422. #ifdef SOC_SERIES_R7FA8M85
  423. R_SCI_B_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_7BIT);
  424. #else
  425. R_SCI_I2C_SlaveAddressSet(master_ctrl, msg->addr, I2C_MASTER_ADDR_MODE_7BIT);
  426. #endif
  427. }
  428. if (msg->flags & RT_I2C_RD)
  429. {
  430. #ifdef SOC_SERIES_R7FA8M85
  431. err = R_SCI_B_I2C_Read(master_ctrl, msg->buf, msg->len, restart);
  432. #else
  433. err = R_SCI_I2C_Read(master_ctrl, msg->buf, msg->len, restart);
  434. #endif
  435. }
  436. else
  437. {
  438. #ifdef SOC_SERIES_R7FA8M85
  439. err = R_SCI_B_I2C_Write(master_ctrl, msg->buf, msg->len, restart);
  440. #else
  441. err = R_SCI_I2C_Write(master_ctrl, msg->buf, msg->len, restart);
  442. #endif
  443. }
  444. if (FSP_SUCCESS == err)
  445. {
  446. /* handle error */
  447. err = ra_wait_complete(obj);
  448. if (RT_EOK != err)
  449. {
  450. //LOG_E("POWER_CTL reg I2C write failed,%d,%d", err, i);
  451. break;
  452. }
  453. }
  454. /* handle error */
  455. else
  456. {
  457. /* Write API returns itself is not successful */
  458. LOG_E("R_IIC_MASTER_Write/Read API failed,%d", i);
  459. break;
  460. }
  461. }
  462. return (rt_ssize_t)i;
  463. }
  464. const struct rt_i2c_bus_device_ops sci_ops_i2c =
  465. {
  466. .master_xfer = ra_i2c_mst_xfer,
  467. .slave_xfer = RT_NULL,
  468. .i2c_bus_control = RT_NULL
  469. };
  470. #endif
  471. /**
  472. * @}
  473. */
  474. /**
  475. * @brief SCI SPI
  476. * @defgroup SCI_SPI
  477. * @{
  478. */
  479. #ifdef BSP_USING_SCIn_SPI
  480. void sci_spi_irq_callback(spi_callback_args_t *p_args)
  481. {
  482. rt_interrupt_enter();
  483. if (NULL != p_args)
  484. {
  485. /* capture callback event for validating the i2c transfer event*/
  486. struct ra_sci_object *obj = (struct ra_sci_object *)p_args->p_context;
  487. uint32_t event = 0;
  488. switch (p_args->event)
  489. {
  490. case SPI_EVENT_ERR_MODE_FAULT :
  491. case SPI_EVENT_ERR_READ_OVERFLOW:
  492. case SPI_EVENT_ERR_PARITY :
  493. case SPI_EVENT_ERR_OVERRUN :
  494. case SPI_EVENT_ERR_FRAMING :
  495. case SPI_EVENT_ERR_MODE_UNDERRUN:
  496. event |= RA_SCI_EVENT_ERROR;
  497. break;
  498. case SPI_EVENT_TRANSFER_ABORTED :
  499. event |= RA_SCI_EVENT_ABORTED;
  500. break;
  501. case SPI_EVENT_TRANSFER_COMPLETE:
  502. event |= RA_SCI_EVENT_TX_COMPLETE;
  503. break;
  504. }
  505. rt_event_send(&obj->event, event);
  506. LOG_D("event:%x", p_args->event);
  507. }
  508. rt_interrupt_leave();
  509. LOG_D("p_args:%p", p_args);
  510. }
  511. static spi_bit_width_t ra_width_shift(rt_uint8_t data_width)
  512. {
  513. spi_bit_width_t bit_width = SPI_BIT_WIDTH_8_BITS;
  514. if (data_width == 1)
  515. bit_width = SPI_BIT_WIDTH_8_BITS;
  516. else if (data_width == 2)
  517. bit_width = SPI_BIT_WIDTH_16_BITS;
  518. else if (data_width == 4)
  519. bit_width = SPI_BIT_WIDTH_32_BITS;
  520. return bit_width;
  521. }
  522. static rt_err_t ra_write_message(struct rt_spi_device *device, const void *send_buf, const rt_size_t len)
  523. {
  524. RT_ASSERT(device != NULL);
  525. RT_ASSERT(send_buf != NULL);
  526. RT_ASSERT(len > 0);
  527. rt_err_t err = RT_EOK;
  528. struct ra_sci_object *obj = rt_container_of(device->bus, struct ra_sci_object, sbus);
  529. const struct ra_sci_param *param = obj->param;
  530. spi_bit_width_t bit_width = ra_width_shift(obj->spi_cfg->data_width);
  531. /**< send msessage */
  532. err = R_SCI_SPI_Write((spi_ctrl_t *)param->sci_ctrl, send_buf, len, bit_width);
  533. if (RT_EOK != err)
  534. {
  535. LOG_E("%s write failed. %d", param->bus_name, err);
  536. return -RT_ERROR;
  537. }
  538. /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
  539. ra_wait_complete(obj);
  540. return len;
  541. }
  542. static rt_err_t ra_read_message(struct rt_spi_device *device, void *recv_buf, const rt_size_t len)
  543. {
  544. RT_ASSERT(device != NULL);
  545. RT_ASSERT(recv_buf != NULL);
  546. RT_ASSERT(len > 0);
  547. rt_err_t err = RT_EOK;
  548. struct ra_sci_object *obj = rt_container_of(device->bus, struct ra_sci_object, sbus);
  549. const struct ra_sci_param *param = obj->param;
  550. spi_bit_width_t bit_width = ra_width_shift(obj->spi_cfg->data_width);
  551. /**< receive message */
  552. err = R_SCI_SPI_Read((spi_ctrl_t *)param->sci_ctrl, recv_buf, len, bit_width);
  553. if (RT_EOK != err)
  554. {
  555. LOG_E("%s write failed. %d", param->bus_name, err);
  556. return -RT_ERROR;
  557. }
  558. /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
  559. ra_wait_complete(obj);
  560. return len;
  561. }
  562. static rt_err_t ra_write_read_message(struct rt_spi_device *device, struct rt_spi_message *message)
  563. {
  564. RT_ASSERT(device != NULL);
  565. RT_ASSERT(message != NULL);
  566. RT_ASSERT(message->length > 0);
  567. rt_err_t err = RT_EOK;
  568. struct ra_sci_object *obj = rt_container_of(device->bus, struct ra_sci_object, sbus);
  569. const struct ra_sci_param *param = obj->param;
  570. spi_bit_width_t bit_width = ra_width_shift(obj->spi_cfg->data_width);
  571. /**< write and receive message */
  572. err = R_SCI_SPI_WriteRead((spi_ctrl_t *)param->sci_ctrl, message->send_buf, message->recv_buf, message->length, bit_width);
  573. if (RT_EOK != err)
  574. {
  575. LOG_E("%s write and read failed. %d", param->bus_name, err);
  576. return -RT_ERROR;
  577. }
  578. /* Wait for SPI_EVENT_TRANSFER_COMPLETE callback event. */
  579. ra_wait_complete(obj);
  580. return message->length;
  581. }
  582. /**< init spi TODO : MSB does not support modification */
  583. static rt_err_t ra_hw_spi_configure(struct rt_spi_device *device,
  584. struct rt_spi_configuration *configuration)
  585. {
  586. RT_ASSERT(device != NULL);
  587. RT_ASSERT(configuration != NULL);
  588. rt_err_t err = RT_EOK;
  589. struct ra_sci_object *obj = rt_container_of(device->bus, struct ra_sci_object, sbus);
  590. const struct ra_sci_param *param = obj->param;
  591. const spi_cfg_t *cfg = (const spi_cfg_t *)param->sci_cfg;
  592. /**< data_width : 1 -> 8 bits , 2 -> 16 bits, 4 -> 32 bits, default 32 bits*/
  593. rt_uint8_t data_width = configuration->data_width / 8;
  594. RT_ASSERT(data_width == 1 || data_width == 2 || data_width == 4);
  595. configuration->data_width = configuration->data_width / 8;
  596. obj->spi_cfg = configuration;
  597. #ifdef R_SCI_B_SPI_H
  598. sci_b_spi_extended_cfg_t spi_cfg = *(sci_b_spi_extended_cfg_t *)cfg->p_extend;
  599. #else
  600. sci_spi_extended_cfg_t *spi_cfg = (sci_spi_extended_cfg_t *)cfg->p_extend;
  601. #endif
  602. /**< Configure Select Line */
  603. rt_pin_write(device->cs_pin, PIN_HIGH);
  604. /**< config bitrate */
  605. #ifdef R_SCI_B_SPI_H
  606. R_SCI_B_SPI_CalculateBitrate(obj->spi_cfg->max_hz, SCI_B_SPI_SOURCE_CLOCK_PCLK, &spi_cfg.clk_div);
  607. #else
  608. R_SCI_SPI_CalculateBitrate(obj->spi_cfg->max_hz, &cfg_ext->clk_div, false);
  609. #endif
  610. /**< init */
  611. err = R_SCI_SPI_Open((spi_ctrl_t *)param->sci_ctrl, cfg);
  612. /* handle error */
  613. if (err == FSP_ERR_IN_USE)
  614. {
  615. R_SCI_SPI_Close((spi_ctrl_t *)param->sci_ctrl);
  616. err = R_SCI_SPI_Open((spi_ctrl_t *)param->sci_ctrl, cfg);
  617. }
  618. if (RT_EOK != err)
  619. {
  620. LOG_E("%s init failed. %d", param->bus_name, err);
  621. return -RT_ERROR;
  622. }
  623. err = R_SCI_SPI_CallbackSet((spi_ctrl_t *)param->sci_ctrl, sci_spi_irq_callback, obj, NULL);
  624. if (FSP_SUCCESS != err)
  625. {
  626. LOG_E("R_SCI_I2C_CallbackSet API failed,%d", err);
  627. }
  628. return RT_EOK;
  629. }
  630. static rt_ssize_t ra_spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
  631. {
  632. RT_ASSERT(device != RT_NULL);
  633. RT_ASSERT(device->bus != RT_NULL);
  634. RT_ASSERT(message != RT_NULL);
  635. rt_err_t err = RT_EOK;
  636. if (message->cs_take && !(device->config.mode & RT_SPI_NO_CS) && (device->cs_pin != PIN_NONE))
  637. {
  638. if (device->config.mode & RT_SPI_CS_HIGH)
  639. rt_pin_write(device->cs_pin, PIN_HIGH);
  640. else
  641. rt_pin_write(device->cs_pin, PIN_LOW);
  642. }
  643. if (message->length > 0)
  644. {
  645. if (message->send_buf == RT_NULL && message->recv_buf != RT_NULL)
  646. {
  647. /**< receive message */
  648. err = ra_read_message(device, (void *)message->recv_buf, (const rt_size_t)message->length);
  649. }
  650. else if (message->send_buf != RT_NULL && message->recv_buf == RT_NULL)
  651. {
  652. /**< send message */
  653. err = ra_write_message(device, (const void *)message->send_buf, (const rt_size_t)message->length);
  654. }
  655. else if (message->send_buf != RT_NULL && message->recv_buf != RT_NULL)
  656. {
  657. /**< send and receive message */
  658. err = ra_write_read_message(device, message);
  659. }
  660. }
  661. if (message->cs_release && !(device->config.mode & RT_SPI_NO_CS) && (device->cs_pin != PIN_NONE))
  662. {
  663. if (device->config.mode & RT_SPI_CS_HIGH)
  664. rt_pin_write(device->cs_pin, PIN_LOW);
  665. else
  666. rt_pin_write(device->cs_pin, PIN_HIGH);
  667. }
  668. return err;
  669. }
  670. const struct rt_spi_ops sci_ops_spi =
  671. {
  672. .configure = ra_hw_spi_configure,
  673. .xfer = ra_spixfer,
  674. };
  675. #endif
  676. /**
  677. * @}
  678. */
  679. static int ra_hw_sci_init(void)
  680. {
  681. for (rt_uint8_t idx = 0; idx < RA_SCI_INDEX_MAX; idx++)
  682. {
  683. struct ra_sci_object *obj = &sci_obj[idx];
  684. const struct ra_sci_param *param = &sci_param[idx];
  685. obj->param = param;
  686. rt_err_t err;
  687. #ifdef BSP_USING_SCIn_SPI
  688. if ((uint32_t)param->ops == (uint32_t)&sci_ops_spi)
  689. {
  690. /**< register spi bus */
  691. err = rt_spi_bus_register(&obj->sbus, param->bus_name, param->ops);
  692. if (RT_EOK != err)
  693. {
  694. LOG_E("bus %s register failed. %d", param->bus_name, err);
  695. return -RT_ERROR;
  696. }
  697. }
  698. else
  699. #endif
  700. #ifdef BSP_USING_SCIn_I2C
  701. if ((uint32_t)param->ops == (uint32_t)&sci_ops_i2c)
  702. {
  703. obj->ibus.ops = param->ops;
  704. obj->ibus.priv = 0;
  705. /* opening IIC master module */
  706. #ifdef SOC_SERIES_R7FA8M85
  707. err = R_SCI_B_I2C_Open((i2c_master_ctrl_t *)param->sci_ctrl, param->sci_cfg);
  708. #else
  709. err = R_SCI_I2C_Open((i2c_master_ctrl_t *)param->sci_ctrl, param->sci_cfg);
  710. #endif
  711. if (err != FSP_SUCCESS)
  712. {
  713. LOG_E("R_IIC_MASTER_Open API failed,%d", err);
  714. continue;
  715. }
  716. #ifdef SOC_SERIES_R7FA8M85
  717. err = R_SCI_B_I2C_CallbackSet((i2c_master_ctrl_t *)param->sci_ctrl, sci_i2c_irq_callback, obj, NULL);
  718. #else
  719. err = R_SCI_I2C_CallbackSet((i2c_master_ctrl_t *)param->sci_ctrl, sci_i2c_irq_callback, obj, NULL);
  720. #endif
  721. /* handle error */
  722. if (FSP_SUCCESS != err)
  723. {
  724. LOG_E("R_SCI_I2C_CallbackSet API failed,%d", err);
  725. continue;
  726. }
  727. err = rt_i2c_bus_device_register(&obj->ibus, param->bus_name);
  728. if (RT_EOK != err)
  729. {
  730. LOG_E("i2c bus %s register failed,%d", param->bus_name, err);
  731. continue;
  732. }
  733. }
  734. else
  735. #endif
  736. #ifdef BSP_USING_SCIn_UART
  737. if ((uint32_t)param->ops == (uint32_t)&sci_ops_uart)
  738. {
  739. if (rt_device_find(param->bus_name) != RT_NULL)
  740. {
  741. continue;
  742. }
  743. struct rt_serial_device *serial = &obj->ubus;
  744. obj->ubus.ops = param->ops;
  745. serial->config.rx_bufsz = uart_buff_size[bufsz_idx][0];
  746. serial->config.tx_bufsz = uart_buff_size[bufsz_idx][1];
  747. bufsz_idx ++;
  748. err = rt_hw_serial_register(serial, param->bus_name, RT_DEVICE_FLAG_RDWR, RT_NULL);
  749. if (RT_EOK != err)
  750. {
  751. LOG_E("uart %s register failed,%d", param->bus_name, err);
  752. continue;
  753. }
  754. }
  755. #endif
  756. {
  757. }
  758. if (RT_EOK != rt_event_init(&obj->event, param->bus_name, RT_IPC_FLAG_PRIO))
  759. {
  760. LOG_E("sci event init fail!");
  761. return -RT_ERROR;
  762. }
  763. }
  764. return RT_EOK;
  765. }
  766. INIT_BOARD_EXPORT(ra_hw_sci_init);
  767. #ifdef BSP_USING_SCIn_UART
  768. rt_weak int rt_hw_usart_init(void)
  769. {
  770. int bufsz_idx = 0;
  771. for (rt_uint8_t idx = 0; idx < RA_SCI_INDEX_MAX; idx++)
  772. {
  773. struct ra_sci_object *obj = &sci_obj[idx];
  774. const struct ra_sci_param *param = &sci_param[idx];
  775. obj->param = param;
  776. rt_err_t err;
  777. if ((uint32_t)param->ops == (uint32_t)&sci_ops_uart)
  778. {
  779. if (rt_device_find(param->bus_name) != RT_NULL)
  780. {
  781. continue;
  782. }
  783. struct rt_serial_device *serial = &obj->ubus;
  784. obj->ubus.ops = param->ops;
  785. serial->config.rx_bufsz = uart_buff_size[bufsz_idx][0];
  786. serial->config.tx_bufsz = uart_buff_size[bufsz_idx][1];
  787. bufsz_idx ++;
  788. err = rt_hw_serial_register(serial, param->bus_name, RT_DEVICE_FLAG_RDWR, RT_NULL);
  789. if (RT_EOK != err)
  790. {
  791. continue;
  792. }
  793. if (RT_EOK != rt_event_init(&obj->event, param->bus_name, RT_IPC_FLAG_PRIO))
  794. {
  795. return -RT_ERROR;
  796. }
  797. }
  798. }
  799. return RT_EOK;
  800. }
  801. #endif
  802. /**
  803. * Attach the spi device to SPI bus, this function must be used after initialization.
  804. */
  805. #ifdef BSP_USING_SCIn_SPI
  806. rt_err_t rt_hw_sci_spi_device_attach(const char *bus_name, const char *device_name, rt_base_t cs_pin)
  807. {
  808. RT_ASSERT(bus_name != RT_NULL);
  809. RT_ASSERT(device_name != RT_NULL);
  810. rt_err_t result;
  811. struct rt_spi_device *spi_device;
  812. /* attach the device to spi bus*/
  813. spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
  814. RT_ASSERT(spi_device != RT_NULL);
  815. result = rt_spi_bus_attach_device_cspin(spi_device, device_name, bus_name, cs_pin, RT_NULL);
  816. if (result != RT_EOK)
  817. {
  818. LOG_E("%s attach to %s faild, %d\n", device_name, bus_name, result);
  819. }
  820. LOG_D("%s attach to %s done", device_name, bus_name);
  821. return result;
  822. }
  823. #endif
  824. #endif /* BSP_USING_SCI */